2019-05-28 10:01:39

by Faiz Abbas

[permalink] [raw]
Subject: [PATCH v3 0/3] Fix issues with phy configurations in am65x MMC driver

The following patches fix issues with phy configurations for
sdhci_am654 driver.

v3:
Changed order of patches so that the first one can be applied easily to
stable tree.

v2:
1. Split patch 1 into 2 separate patches.
2. Improved patch descriptions.

Faiz Abbas (3):
mmc: sdhci_am654: Fix SLOTTYPE write
mmc: sdhci_am654: Improve whitespace utilisation with regmap_*() calls
mmc: sdhci_am654: Print error message if the DLL fails to lock

drivers/mmc/host/sdhci_am654.c | 37 ++++++++++++++++------------------
1 file changed, 17 insertions(+), 20 deletions(-)

--
2.19.2


2019-05-28 10:02:13

by Faiz Abbas

[permalink] [raw]
Subject: [PATCH v3 1/3] mmc: sdhci_am654: Fix SLOTTYPE write

In the call to regmap_update_bits() for SLOTTYPE, the mask and value
fields are exchanged. Fix this.

Signed-off-by: Faiz Abbas <[email protected]>
Cc: stable <[email protected]>
---
drivers/mmc/host/sdhci_am654.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
index a91c0b45c48d..3222ea4d584d 100644
--- a/drivers/mmc/host/sdhci_am654.c
+++ b/drivers/mmc/host/sdhci_am654.c
@@ -231,7 +231,7 @@ static int sdhci_am654_init(struct sdhci_host *host)
ctl_cfg_2 = SLOTTYPE_EMBEDDED;

regmap_update_bits(sdhci_am654->base, CTL_CFG_2,
- ctl_cfg_2, SLOTTYPE_MASK);
+ SLOTTYPE_MASK, ctl_cfg_2);

return sdhci_add_host(host);
}
--
2.19.2

2019-05-28 10:02:13

by Faiz Abbas

[permalink] [raw]
Subject: [PATCH v3 2/3] mmc: sdhci_am654: Improve whitespace utilisation with regmap_*() calls

Line wrapping with the regmap_*() functions is way more conservative
than required by the 80 character rule. Expand the function calls out to
use less number of lines.

Signed-off-by: Faiz Abbas <[email protected]>
---
drivers/mmc/host/sdhci_am654.c | 34 +++++++++++++---------------------
1 file changed, 13 insertions(+), 21 deletions(-)

diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
index 3222ea4d584d..3c32d9fb6e1e 100644
--- a/drivers/mmc/host/sdhci_am654.c
+++ b/drivers/mmc/host/sdhci_am654.c
@@ -88,8 +88,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
int ret;

if (sdhci_am654->dll_on) {
- regmap_update_bits(sdhci_am654->base, PHY_CTRL1,
- ENDLL_MASK, 0);
+ regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0);

sdhci_am654->dll_on = false;
}
@@ -101,8 +100,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
val = (1 << OTAPDLYENA_SHIFT) |
(sdhci_am654->otap_del_sel << OTAPDLYSEL_SHIFT);
- regmap_update_bits(sdhci_am654->base, PHY_CTRL4,
- mask, val);
+ regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);
switch (clock) {
case 200000000:
sel50 = 0;
@@ -120,8 +118,7 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
/* Configure PHY DLL frequency */
mask = SEL50_MASK | SEL100_MASK;
val = (sel50 << SEL50_SHIFT) | (sel100 << SEL100_SHIFT);
- regmap_update_bits(sdhci_am654->base, PHY_CTRL5,
- mask, val);
+ regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val);
/* Configure DLL TRIM */
mask = DLL_TRIM_ICP_MASK;
val = sdhci_am654->trm_icp << DLL_TRIM_ICP_SHIFT;
@@ -129,20 +126,17 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
/* Configure DLL driver strength */
mask |= DR_TY_MASK;
val |= sdhci_am654->drv_strength << DR_TY_SHIFT;
- regmap_update_bits(sdhci_am654->base, PHY_CTRL1,
- mask, val);
+ regmap_update_bits(sdhci_am654->base, PHY_CTRL1, mask, val);
/* Enable DLL */
- regmap_update_bits(sdhci_am654->base, PHY_CTRL1,
- ENDLL_MASK, 0x1 << ENDLL_SHIFT);
+ regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK,
+ 0x1 << ENDLL_SHIFT);
/*
* Poll for DLL ready. Use a one second timeout.
* Works in all experiments done so far
*/
- ret = regmap_read_poll_timeout(sdhci_am654->base,
- PHY_STAT1, val,
- val & DLLRDY_MASK,
- 1000, 1000000);
-
+ ret = regmap_read_poll_timeout(sdhci_am654->base, PHY_STAT1,
+ val, val & DLLRDY_MASK, 1000,
+ 1000000);
sdhci_am654->dll_on = true;
}
}
@@ -208,8 +202,7 @@ static int sdhci_am654_init(struct sdhci_host *host)

/* Reset OTAP to default value */
mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
- regmap_update_bits(sdhci_am654->base, PHY_CTRL4,
- mask, 0x0);
+ regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, 0x0);

regmap_read(sdhci_am654->base, PHY_STAT1, &val);
if (~val & CALDONE_MASK) {
@@ -223,15 +216,14 @@ static int sdhci_am654_init(struct sdhci_host *host)
}

/* Enable pins by setting IO mux to 0 */
- regmap_update_bits(sdhci_am654->base, PHY_CTRL1,
- IOMUX_ENABLE_MASK, 0);
+ regmap_update_bits(sdhci_am654->base, PHY_CTRL1, IOMUX_ENABLE_MASK, 0);

/* Set slot type based on SD or eMMC */
if (host->mmc->caps & MMC_CAP_NONREMOVABLE)
ctl_cfg_2 = SLOTTYPE_EMBEDDED;

- regmap_update_bits(sdhci_am654->base, CTL_CFG_2,
- SLOTTYPE_MASK, ctl_cfg_2);
+ regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK,
+ ctl_cfg_2);

return sdhci_add_host(host);
}
--
2.19.2

2019-06-03 17:05:10

by Ulf Hansson

[permalink] [raw]
Subject: Re: [PATCH v3 0/3] Fix issues with phy configurations in am65x MMC driver

On Tue, 28 May 2019 at 11:59, Faiz Abbas <[email protected]> wrote:
>
> The following patches fix issues with phy configurations for
> sdhci_am654 driver.
>
> v3:
> Changed order of patches so that the first one can be applied easily to
> stable tree.
>
> v2:
> 1. Split patch 1 into 2 separate patches.
> 2. Improved patch descriptions.
>
> Faiz Abbas (3):
> mmc: sdhci_am654: Fix SLOTTYPE write
> mmc: sdhci_am654: Improve whitespace utilisation with regmap_*() calls
> mmc: sdhci_am654: Print error message if the DLL fails to lock
>
> drivers/mmc/host/sdhci_am654.c | 37 ++++++++++++++++------------------
> 1 file changed, 17 insertions(+), 20 deletions(-)
>

Patch 1 applied for fixes and by adding a fixes tag. Patch 2+3 applied
for next, thanks!

Kind regards
Uffe

2019-06-04 13:05:09

by Faiz Abbas

[permalink] [raw]
Subject: Re: [PATCH v3 1/3] mmc: sdhci_am654: Fix SLOTTYPE write

Hi Sasha,

On 04/06/19 6:20 PM, Sasha Levin wrote:
> Hi,
>
> [This is an automated email]
>
> This commit has been processed because it contains a -stable tag.
> The stable tag indicates that it's relevant for the following trees: all
>
> The bot has tested the following trees: v5.1.6, v5.0.20, v4.19.47, v4.14.123, v4.9.180, v4.4.180.
>
> v5.1.6: Build OK!
> v5.0.20: Build OK!

Please apply it only to the above two releases. I guess this script
could detect that the file was not even present before this and not try
to apply to those.

> v4.19.47: Failed to apply! Possible dependencies:
> 06b23ca021c4 ("mmc: sdhci-of-arasan: Add a single data structure to incorporate pdata and soc_ctl_map")
> 41fd4caeb00b ("mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver")
> f0061fed1f8a ("mmc: sdhci-of-arasan: Add Support for AM654 MMC and PHY")
>
> v4.14.123: Failed to apply! Possible dependencies:
> 06b23ca021c4 ("mmc: sdhci-of-arasan: Add a single data structure to incorporate pdata and soc_ctl_map")
> 41fd4caeb00b ("mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver")
> 7d326930d352 ("mmc: sdhci-omap: Add OMAP SDHCI driver")
> 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1")
> f0061fed1f8a ("mmc: sdhci-of-arasan: Add Support for AM654 MMC and PHY")
>
> v4.9.180: Failed to apply! Possible dependencies:
> 06b23ca021c4 ("mmc: sdhci-of-arasan: Add a single data structure to incorporate pdata and soc_ctl_map")
> 3a3748dba881 ("mmc: sdhci-xenon: Add Marvell Xenon SDHC core functionality")
> 41fd4caeb00b ("mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver")
> 7d326930d352 ("mmc: sdhci-omap: Add OMAP SDHCI driver")
> 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1")
> d38dcad4e7b4 ("mmc: sdhci: Let drivers decide whether to use mmc_retune_needed() with pm")
> f0061fed1f8a ("mmc: sdhci-of-arasan: Add Support for AM654 MMC and PHY")
>
> v4.4.180: Failed to apply! Possible dependencies:
> 06b23ca021c4 ("mmc: sdhci-of-arasan: Add a single data structure to incorporate pdata and soc_ctl_map")
> 0c7fe32e847f ("mmc: sdhci-of-arasan: fix clk issue in sdhci_arasan_remove()")
> 278d09624eda ("mmc: sdhci-of-arasan: fix missing sdhci_pltfm_free for err handling")
> 3a3748dba881 ("mmc: sdhci-xenon: Add Marvell Xenon SDHC core functionality")
> 3ea4666e8d42 ("mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq on rk3399")
> 41fd4caeb00b ("mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver")
> 476bf3d62d5c ("mmc: sdhci-brcmstb: Add driver for Broadcom BRCMSTB SoCs")
> 5d9460d74ce5 ("mmc: sdhci-pic32: Add PIC32 SDHCI host controller driver")
> 7d326930d352 ("mmc: sdhci-omap: Add OMAP SDHCI driver")
> 802ac39a5566 ("mmc: sdhci-of-arasan: fix set_clock when a phy is supported")
> 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1")
> 89211418cb71 ("mmc: sdhci-of-arasan: use sdhci_pltfm_init for private allocation")
> 91aa366109e8 ("mmc: sdhci-of-arasan: add phy support for sdhci-of-arasan")
> a05c84651145 ("mmc: sdhci-of-arasan: implement enhanced strobe callback")
> c390f2110adf ("mmc: sdhci-of-arasan: Add ability to export card clock")
> ca572f4636aa ("mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes")
> f0061fed1f8a ("mmc: sdhci-of-arasan: Add Support for AM654 MMC and PHY")
>
>
> How should we proceed with this patch?
>

Thanks,
Faiz