Previously the XILINX_INTC config option was hidden and only
auto-selected on the MicroBlaze platform. However, this IP can also be
used on the Zynq and ZynqMP platforms as a secondary cascaded
controller. Allow this option to be user-enabled on those platforms.
Signed-off-by: Robert Hancock <[email protected]>
---
drivers/irqchip/Kconfig | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 15536e321df5..1020cc5a7800 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -279,8 +279,13 @@ config XTENSA_MX
select GENERIC_IRQ_EFFECTIVE_AFF_MASK
config XILINX_INTC
- bool
+ bool "Xilinx Interrupt Controller IP"
+ depends on MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || COMPILE_TEST
select IRQ_DOMAIN
+ help
+ Support for the Xilinx Interrupt Controller IP core.
+ This is used as a primary controller with MicroBlaze and can also
+ be used as a secondary chained controller on other platforms.
config IRQ_CROSSBAR
bool
--
2.27.0
On 4/19/21 9:42 PM, Robert Hancock wrote:
> Previously the XILINX_INTC config option was hidden and only
> auto-selected on the MicroBlaze platform. However, this IP can also be
> used on the Zynq and ZynqMP platforms as a secondary cascaded
> controller. Allow this option to be user-enabled on those platforms.
>
> Signed-off-by: Robert Hancock <[email protected]>
> ---
> drivers/irqchip/Kconfig | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 15536e321df5..1020cc5a7800 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -279,8 +279,13 @@ config XTENSA_MX
> select GENERIC_IRQ_EFFECTIVE_AFF_MASK
>
> config XILINX_INTC
> - bool
> + bool "Xilinx Interrupt Controller IP"
> + depends on MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || COMPILE_TEST
> select IRQ_DOMAIN
> + help
> + Support for the Xilinx Interrupt Controller IP core.
> + This is used as a primary controller with MicroBlaze and can also
> + be used as a secondary chained controller on other platforms.
>
> config IRQ_CROSSBAR
> bool
>
Acked-by: Michal Simek <[email protected]>
Thanks,
Michal
On Mon, 19 Apr 2021 20:42:45 +0100,
Robert Hancock <[email protected]> wrote:
>
> Previously the XILINX_INTC config option was hidden and only
> auto-selected on the MicroBlaze platform. However, this IP can also be
> used on the Zynq and ZynqMP platforms as a secondary cascaded
> controller. Allow this option to be user-enabled on those platforms.
>
> Signed-off-by: Robert Hancock <[email protected]>
> ---
> drivers/irqchip/Kconfig | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 15536e321df5..1020cc5a7800 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -279,8 +279,13 @@ config XTENSA_MX
> select GENERIC_IRQ_EFFECTIVE_AFF_MASK
>
> config XILINX_INTC
> - bool
> + bool "Xilinx Interrupt Controller IP"
> + depends on MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || COMPILE_TEST
Please drop COMPILE_TEST. As reported by the kernel test bot, there
are architectures it can't be compiled on.
M.
--
Without deviation from the norm, progress is not possible.