2021-06-16 09:22:03

by Shaik Sajida Bhanu

[permalink] [raw]
Subject: [PATCH V2] arm64: dts: qcom: sc7180: Add xo clock for eMMC and Sd card

Add XO clock for eMMC and SDCard as it would help in calculating dll
register values.

Signed-off-by: Shaik Sajida Bhanu <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
---

Changes since V1:
- Updated commit message as suggested by Bjorn Andersson.
- Added space after before xo clock name as suggested by
Konrad Dybcio.
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 52115e0..fb1d9ad 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -701,8 +701,9 @@
interrupt-names = "hc_irq", "pwr_irq";

clocks = <&gcc GCC_SDCC1_APPS_CLK>,
- <&gcc GCC_SDCC1_AHB_CLK>;
- clock-names = "core", "iface";
+ <&gcc GCC_SDCC1_AHB_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "core", "iface", "xo";
interconnects = <&aggre1_noc MASTER_EMMC 0 &mc_virt SLAVE_EBI1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_EMMC_CFG 0>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
@@ -2564,8 +2565,9 @@
interrupt-names = "hc_irq", "pwr_irq";

clocks = <&gcc GCC_SDCC2_APPS_CLK>,
- <&gcc GCC_SDCC2_AHB_CLK>;
- clock-names = "core", "iface";
+ <&gcc GCC_SDCC2_AHB_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "core", "iface", "xo";

interconnects = <&aggre1_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation


2021-06-16 13:39:40

by Konrad Dybcio

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Subject: Re: [PATCH V2] arm64: dts: qcom: sc7180: Add xo clock for eMMC and Sd card


On 16.06.2021 11:17, Shaik Sajida Bhanu wrote:
> Add XO clock for eMMC and SDCard as it would help in calculating dll
> register values.
>
> Signed-off-by: Shaik Sajida Bhanu <[email protected]>
> Reviewed-by: Konrad Dybcio <[email protected]>

This patch is already applied in qcom/for-next :)


https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git/commit/?h=for-next&id=81cfa462e458405f58b23f45ddd9439c70bf5347


Konrad

2021-06-18 19:32:40

by Bjorn Andersson

[permalink] [raw]
Subject: Re: [PATCH V2] arm64: dts: qcom: sc7180: Add xo clock for eMMC and Sd card

On Wed 16 Jun 04:17 CDT 2021, Shaik Sajida Bhanu wrote:

> Add XO clock for eMMC and SDCard as it would help in calculating dll
> register values.
>
> Signed-off-by: Shaik Sajida Bhanu <[email protected]>
> Reviewed-by: Konrad Dybcio <[email protected]>
> ---
>
> Changes since V1:
> - Updated commit message as suggested by Bjorn Andersson.
> - Added space after before xo clock name as suggested by
> Konrad Dybcio.

Thank you Shaik. Sorry if I wasn't clear when I tried to say that I
fixed these things and applied your previous patch.

Regards,
Bjorn

> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 52115e0..fb1d9ad 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -701,8 +701,9 @@
> interrupt-names = "hc_irq", "pwr_irq";
>
> clocks = <&gcc GCC_SDCC1_APPS_CLK>,
> - <&gcc GCC_SDCC1_AHB_CLK>;
> - clock-names = "core", "iface";
> + <&gcc GCC_SDCC1_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "core", "iface", "xo";
> interconnects = <&aggre1_noc MASTER_EMMC 0 &mc_virt SLAVE_EBI1 0>,
> <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_EMMC_CFG 0>;
> interconnect-names = "sdhc-ddr","cpu-sdhc";
> @@ -2564,8 +2565,9 @@
> interrupt-names = "hc_irq", "pwr_irq";
>
> clocks = <&gcc GCC_SDCC2_APPS_CLK>,
> - <&gcc GCC_SDCC2_AHB_CLK>;
> - clock-names = "core", "iface";
> + <&gcc GCC_SDCC2_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "core", "iface", "xo";
>
> interconnects = <&aggre1_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
> <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
>