In a "W=1" build gcc throws a warning:
arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’:
arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used
Fix by switching from rdmsr() to rdmsrl() using a single u64 argument
for the MSR value instead of the pair of u32 for the high and low
halves.
Signed-off-by: Tony Luck <[email protected]>
---
This has been annoying me for a while as the only warning from the
resctrl code when building with W=1.
N.B. compile tested only. I don't have a Haswell system to check this works.
arch/x86/kernel/cpu/resctrl/core.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
index 19e0681f0435..4084131d391d 100644
--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -136,15 +136,16 @@ static inline void cache_alloc_hsw_probe(void)
{
struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_L3];
struct rdt_resource *r = &hw_res->r_resctrl;
- u32 l, h, max_cbm = BIT_MASK(20) - 1;
+ u32 max_cbm = BIT_MASK(20) - 1;
+ u64 l3_cbm_0;
if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0))
return;
- rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
+ rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);
/* If all the bits were set in MSR, return success */
- if (l != max_cbm)
+ if (l3_cbm_0 != max_cbm)
return;
hw_res->num_closid = 4;
--
2.41.0
On Tue, Oct 31, 2023 at 03:05:34PM -0700, Tony Luck wrote:
> In a "W=1" build gcc throws a warning:
>
> arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’:
> arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used
>
> Fix by switching from rdmsr() to rdmsrl() using a single u64 argument
> for the MSR value instead of the pair of u32 for the high and low
> halves.
>
> Signed-off-by: Tony Luck <[email protected]>
> ---
> This has been annoying me for a while as the only warning from the
> resctrl code when building with W=1.
>
> N.B. compile tested only. I don't have a Haswell system to check this works.
>
> arch/x86/kernel/cpu/resctrl/core.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index 19e0681f0435..4084131d391d 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -136,15 +136,16 @@ static inline void cache_alloc_hsw_probe(void)
> {
> struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_L3];
> struct rdt_resource *r = &hw_res->r_resctrl;
> - u32 l, h, max_cbm = BIT_MASK(20) - 1;
> + u32 max_cbm = BIT_MASK(20) - 1;
> + u64 l3_cbm_0;
>
> if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0))
> return;
>
> - rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
> + rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);
>
> /* If all the bits were set in MSR, return success */
> - if (l != max_cbm)
> + if (l3_cbm_0 != max_cbm)
> return;
>
> hw_res->num_closid = 4;
No noticeable regressions on my Acer Aspire E15 (the laptop uses Intel Core
i3 Haswell), thanks!
Tested-by: Bagas Sanjaya <[email protected]>
--
An old man doll... just what I always wanted! - Clara
> No noticeable regressions on my Acer Aspire E15 (the laptop uses Intel Core
> i3 Haswell), thanks!
>
> Tested-by: Bagas Sanjaya <[email protected]>
Thanks for reporting that you tested. I don't think a Haswell i3 gets as far as
the piece of code that I changed. the wrmsr_safe() will return non-zero and
the function returns before getting to the piece that I changed.
-Tony
Hi Tony,
On 10/31/23 17:05, Tony Luck wrote:
> In a "W=1" build gcc throws a warning:
>
> arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’:
> arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used
>
> Fix by switching from rdmsr() to rdmsrl() using a single u64 argument
> for the MSR value instead of the pair of u32 for the high and low
> halves.
>
> Signed-off-by: Tony Luck <[email protected]>
> ---
> This has been annoying me for a while as the only warning from the
> resctrl code when building with W=1.
>
> N.B. compile tested only. I don't have a Haswell system to check this works.
>
> arch/x86/kernel/cpu/resctrl/core.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index 19e0681f0435..4084131d391d 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -136,15 +136,16 @@ static inline void cache_alloc_hsw_probe(void)
> {
> struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_L3];
> struct rdt_resource *r = &hw_res->r_resctrl;
> - u32 l, h, max_cbm = BIT_MASK(20) - 1;
> + u32 max_cbm = BIT_MASK(20) - 1;
> + u64 l3_cbm_0;
>
> if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0))
> return;
>
> - rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
> + rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);
You are writing 32 bit and reading 64 bit. Why don't you change both to 64
bit?
>
> /* If all the bits were set in MSR, return success */
> - if (l != max_cbm)
> + if (l3_cbm_0 != max_cbm)
> return;
>
> hw_res->num_closid = 4;
--
Thanks
Babu Moger
> > if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0))
> > return;
> >
> > - rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
> > + rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);
>
> You are writing 32 bit and reading 64 bit. Why don't you change both to 64
> bit?
wrmsr_safe() writes all 64-bits ... just gets those bits as a pair
of 32-bit arguments for the low and high halves.
I could switch that to wrmsrl_safe() and change max_cbm to be "u64"
to make write & read match. Would that be better?
-Tony
On 11/1/23 15:33, Luck, Tony wrote:
>>> if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0))
>>> return;
>>>
>>> - rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
>>> + rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);
>>
>> You are writing 32 bit and reading 64 bit. Why don't you change both to 64
>> bit?
>
> wrmsr_safe() writes all 64-bits ... just gets those bits as a pair
> of 32-bit arguments for the low and high halves.
>
> I could switch that to wrmsrl_safe() and change max_cbm to be "u64"
> to make write & read match. Would that be better?
Yes. That is better.
--
Thanks
Babu Moger
In a "W=1" build gcc throws a warning:
arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’:
arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used
Fix by switching from wrmsr_safe() to wrmsrl_safe(), and from rdmsr()
to rdmsrl() using a single u64 argument for the MSR value instead of
the pair of u32 for the high and low halves.
Signed-off-by: Tony Luck <[email protected]>
---
Changes since v1 (suggested by Babu)
Switch both the wrmsr() and rdmsr() to the 64-bit versions.
arch/x86/kernel/cpu/resctrl/core.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
index 19e0681f0435..d29ebe345de6 100644
--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -136,15 +136,15 @@ static inline void cache_alloc_hsw_probe(void)
{
struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_L3];
struct rdt_resource *r = &hw_res->r_resctrl;
- u32 l, h, max_cbm = BIT_MASK(20) - 1;
+ u64 max_cbm = BIT_ULL_MASK(20) - 1, l3_cbm_0;
- if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0))
+ if (wrmsrl_safe(MSR_IA32_L3_CBM_BASE, max_cbm))
return;
- rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
+ rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);
/* If all the bits were set in MSR, return success */
- if (l != max_cbm)
+ if (l3_cbm_0 != max_cbm)
return;
hw_res->num_closid = 4;
--
2.41.0
Looks good.
On 11/1/23 16:26, Tony Luck wrote:
> In a "W=1" build gcc throws a warning:
>
> arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’:
> arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used
>
> Fix by switching from wrmsr_safe() to wrmsrl_safe(), and from rdmsr()
> to rdmsrl() using a single u64 argument for the MSR value instead of
> the pair of u32 for the high and low halves.
>
> Signed-off-by: Tony Luck <[email protected]>
Reviewed-by: Babu Moger <[email protected]>
> ---
> Changes since v1 (suggested by Babu)
>
> Switch both the wrmsr() and rdmsr() to the 64-bit versions.
>
> arch/x86/kernel/cpu/resctrl/core.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index 19e0681f0435..d29ebe345de6 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -136,15 +136,15 @@ static inline void cache_alloc_hsw_probe(void)
> {
> struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_L3];
> struct rdt_resource *r = &hw_res->r_resctrl;
> - u32 l, h, max_cbm = BIT_MASK(20) - 1;
> + u64 max_cbm = BIT_ULL_MASK(20) - 1, l3_cbm_0;
>
> - if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0))
> + if (wrmsrl_safe(MSR_IA32_L3_CBM_BASE, max_cbm))
> return;
>
> - rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
> + rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);
>
> /* If all the bits were set in MSR, return success */
> - if (l != max_cbm)
> + if (l3_cbm_0 != max_cbm)
> return;
>
> hw_res->num_closid = 4;
--
Thanks
Babu Moger
Hi Tony,
On 11/1/2023 2:26 PM, Tony Luck wrote:
> In a "W=1" build gcc throws a warning:
This is strange, I am not able to encounter this warning. Is my gcc perhaps
too old? I know there were some specific versions needed to reproduce similar
warnings with clang (see reference commit 793207bad71c ("x86/resctrl: Fix a silly
-Wunused-but-set-variable warning")).
>
> arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’:
> arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used
>
> Fix by switching from wrmsr_safe() to wrmsrl_safe(), and from rdmsr()
> to rdmsrl() using a single u64 argument for the MSR value instead of
> the pair of u32 for the high and low halves.
>
> Signed-off-by: Tony Luck <[email protected]>
I do not know if all the text from that reference commit applies here, but
for what it is worth:
Acked-by: Reinette Chatre <[email protected]>
Reinette
> This is strange, I am not able to encounter this warning. Is my gcc perhaps
> too old? I know there were some specific versions needed to reproduce similar
> warnings with clang (see reference commit 793207bad71c ("x86/resctrl: Fix a silly
> -Wunused-but-set-variable warning")).
I'm using the default install from Fedora 38:
$ gcc --version
gcc (GCC) 13.2.1 20230728 (Red Hat 13.2.1-1)
Copyright (C) 2023 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-Tony
Hi Tony,
On 11/2/2023 3:02 PM, Luck, Tony wrote:
>> This is strange, I am not able to encounter this warning. Is my gcc perhaps
>> too old? I know there were some specific versions needed to reproduce similar
>> warnings with clang (see reference commit 793207bad71c ("x86/resctrl: Fix a silly
>> -Wunused-but-set-variable warning")).
>
> I'm using the default install from Fedora 38:
>
> $ gcc --version
> gcc (GCC) 13.2.1 20230728 (Red Hat 13.2.1-1)
> Copyright (C) 2023 Free Software Foundation, Inc.
> This is free software; see the source for copying conditions. There is NO
> warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Thank you for confirming. I tested with the same version. Strange, I see other
instances of this warning but not the resctrl one:
$ grep "set but not used" ~/t/log | wc -l
20
$ grep resctrl ~/t/log
CC arch/x86/kernel/cpu/resctrl/core.o
CC arch/x86/kernel/cpu/resctrl/rdtgroup.o
CC arch/x86/kernel/cpu/resctrl/monitor.o
CC arch/x86/kernel/cpu/resctrl/ctrlmondata.o
CC arch/x86/kernel/cpu/resctrl/pseudo_lock.o
AR arch/x86/kernel/cpu/resctrl/built-in.a
This does seem a valid issue and my Ack remains. I'm just puzzled why I do not
encounter the same warning.
Reinette
> This does seem a valid issue and my Ack remains. I'm just puzzled why I do not
> encounter the same warning.
Reinette,
Some other CONFIG option changing CFLAGS?
Here's what I have for a "make V=1 W=1" for core.o
# CC arch/x86/kernel/cpu/resctrl/core.o
gcc -Wp,-MMD,arch/x86/kernel/cpu/resctrl/.core.o.d -nostdinc -I./arch/x86/include -I./arch/x86/include/generated -I./include -I./arch/x86/include/uapi -I./arch/x86/include/generated/uapi -I./include/uapi -I./include/generated/uapi -include ./include/linux/compiler-version.h -include ./include/linux/kconfig.h -include ./include/linux/compiler_types.h -D__KERNEL__ -fmacro-prefix-map=./= -Wundef -DKBUILD_EXTRA_WARN1 -std=gnu11 -fshort-wchar -funsigned-char -fno-common -fno-PIE -fno-strict-aliasing -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -fcf-protection=none -m64 -falign-jumps=1 -falign-loops=1 -mno-80387 -mno-fp-ret-in-387 -mpreferred-stack-boundary=3 -mskip-rax-setup -mtune=generic -mno-red-zone -mcmodel=kernel -Wno-sign-compare -fno-asynchronous-unwind-tables -mindirect-branch=thunk-extern -mindirect-branch-register -mindirect-branch-cs-prefix -mfunction-return=thunk-extern -fno-jump-tables -mharden-sls=all -fpatchable-function-entry=16,16 -fno-delete-null-pointer-checks -O2 -fno-allow-store-data-races -fstack-protector-strong -ftrivial-auto-var-init=zero -fno-stack-clash-protection -pg -mrecord-mcount -mfentry -DCC_USING_FENTRY -falign-functions=16 -fstrict-flex-arrays=3 -fno-strict-overflow -fno-stack-check -fconserve-stack -Wall -Wundef -Werror=implicit-function-declaration -Werror=implicit-int -Werror=return-type -Werror=strict-prototypes -Wno-format-security -Wno-trigraphs -Wno-frame-address -Wno-address-of-packed-member -Wframe-larger-than=2048 -Wno-main -Wno-unused-but-set-variable -Wno-unused-const-variable -Wno-dangling-pointer -Wvla -Wno-pointer-sign -Wcast-function-type -Wno-array-bounds -Wno-alloc-size-larger-than -Wimplicit-fallthrough=5 -Werror=date-time -Werror=incompatible-pointer-types -Werror=designated-init -Wenum-conversion -Wextra -Wunused -Wno-unused-parameter -Wmissing-declarations -Wrestrict -Wmissing-format-attribute -Wmissing-prototypes -Wold-style-definition -Wmissing-include-dirs -Wunused-but-set-variable -Wunused-const-variable -Wpacked-not-aligned -Wformat-overflow -Wformat-truncation -Wstringop-overflow -Wstringop-truncation -Wno-missing-field-initializers -Wno-type-limits -Wno-shift-negative-value -Wno-maybe-uninitialized -Wno-sign-compare -g -DKBUILD_MODFILE='"arch/x86/kernel/cpu/resctrl/core"' -DKBUILD_BASENAME='"core"' -DKBUILD_MODNAME='"core"' -D__KBUILD_MODNAME=kmod_core -c -o arch/x86/kernel/cpu/resctrl/core.o arch/x86/kernel/cpu/resctrl/core.c ; ./tools/objtool/objtool --hacks=jump_label --hacks=noinstr --hacks=skylake --orc --retpoline --rethunk --sls --static-call --uaccess --prefix=16 arch/x86/kernel/cpu/resctrl/core.o
arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’:
arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used [-Wunused-but-set-variable]
139 | u32 l, h, max_cbm = BIT_MASK(20) - 1;
| ^
Dropping just the "-Wunused-but-set-variable" from that big mess does make the warning disappear for me.
But maybe some option can result in the argument list being built in a different order? I see there is an earlier " -Wno-unused-but-set-variable"
-Tony
On 11/2/2023 3:50 PM, Luck, Tony wrote:
>> This does seem a valid issue and my Ack remains. I'm just puzzled why I do not
>> encounter the same warning.
>
> Reinette,
>
> Some other CONFIG option changing CFLAGS?
>
> Here's what I have for a "make V=1 W=1" for core.o
>
Tony and I went a bit more back-and-forth on this one and it appears that the
relevant code is optimized out in my build while the same did not happen
for him.
I can now trigger the warning by enabling Xen support, with CONFIG_PARAVIRT_XXL
causing rdmsr() to be replaced by paravirt_read_msr(). With the relevant code
no longer optimized out, the warning is triggered.
Thanks Tony!
Reinette