Hi Simon, Magnus,
This patch series contains SoC and board integration for
1. RSPI in the r7s72100 aka RZ/A1H SoC on the Genmai reference board,
2. QSPI in the r8a7791 aka R-Car M2 SoC on the Koelsch reference board.
It was rebased on top of renesas-devel-v3.14-rc1-20140204.
It was tested on the r7s72100-based Genmai reference board using loopback
mode, and on the r8a7791-based Koelsch reference board using the Spansion
s25fl512s SPI FLASH.
- [v5 01/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks
- [v5 02/11] ARM: shmobile: genmai legacy: Add RSPI support
- [v3 03/11] ARM: shmobile: genmai defconfig: Enable RSPI
- [v3 04/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
- [v5 05/11] ARM: shmobile: r7s72100 dtsi: Add RSPI nodes
- [v4 06/11] ARM: shmobile: r8a7791 clock: add QSPI clocks
- [v4 07/11] ARM: shmobile: koelsch legacy: Add QSPI support
- [v4 08/11] ARM: shmobile: koelsch defconfig: Enable RSPI and
- [v3 09/11] ARM: shmobile: r8a7791 dtsi: Add QSPI node
- [v3 10/11] ARM: shmobile: koelsch dts: Add QSPI nodes
- [v2 11/11] ARM: shmobile: lager legacy: Switch QSPI to named IRQs
All of these should be safe to apply, without compile-time or run-time
dependencies on other parts.
Actual functioning for some parts may depend on RSPI work queued up for
3.15 in the spi tree.
Compared to previous submission, the following have been postponed:
- [v4 03/15] [WIP] ARM: shmobile: genmai legacy: Add preliminary RSPI
pinmux setup
This depends on the to-be-written non-DT pinmux configuration for
r7s72100.
- [v4 07/15] ARM: shmobile: genmai reference dts: Add RSPI nodes
This depends on Magnus' "ARM: shmobile: r7s72100 GPIO and PINCTRL device
nodes"
- [v1 14/15] ARM: shmobile: koelsch legacy: Enable Quad SPI transfers for
the SPI FLASH
- [v1 15/15] ARM: shmobile: koelsch dts: Enable Quad SPI transfers
These two depend on the RSPI Dual/Quad work queued up in the spi tree.
After applying the r8a7791/Koelsch patches above, the mainline RSPI/QSPI
driver will work fine. But enabling Quad SPI transfers in board support
code or DT without the corresponding support in the RSPI driver would
cause a regression.
Please apply this series, Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
From: Geert Uytterhoeven <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v3:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v2:
- No changes
arch/arm/configs/genmai_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/genmai_defconfig b/arch/arm/configs/genmai_defconfig
index c56a7ff1dcd7..5ee6ac0931f7 100644
--- a/arch/arm/configs/genmai_defconfig
+++ b/arch/arm/configs/genmai_defconfig
@@ -81,6 +81,8 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=10
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C_SH_MOBILE=y
+CONFIG_SPI=y
+CONFIG_SPI_RSPI=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
--
1.7.9.5
From: Geert Uytterhoeven <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- s/DEFINE_RES_IRQ/DEFINE_RES_IRQ_NAMED/
- Rebased on top of renesas-devel-v3.14-rc1-20140204
arch/arm/mach-shmobile/board-lager.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index fdcc868de1fa..3fe982b5ca87 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -293,7 +293,7 @@ static const struct spi_board_info spi_info[] __initconst = {
/* QSPI resource */
static const struct resource qspi_resources[] __initconst = {
DEFINE_RES_MEM(0xe6b10000, 0x1000),
- DEFINE_RES_IRQ(gic_spi(184)),
+ DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
};
/* VIN */
--
1.7.9.5
From: Geert Uytterhoeven <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
Cc: [email protected]
---
v3:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v2:
- No changes
arch/arm/boot/dts/r8a7791.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index d5cc3626dd60..240c4ece1f0c 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -710,4 +710,16 @@
clock-output-names = "scifa3", "scifa4", "scifa5";
};
};
+
+ spi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7791", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
From: Geert Uytterhoeven <[email protected]>
Enable support for the Spansion s25fl512s SPI FLASH on the Koelsch board:
- Add QSPI platform device, resources, platform data, and pinmux,
- Add FLASH data and MTD partitions.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Acked-by: Laurent Pinchart <[email protected]>
---
v4:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v3:
- Switch to named IRQs
v2:
- Split in 2 groups (qspi_ctrl/qspi_data4)
arch/arm/mach-shmobile/board-koelsch.c | 64 ++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
index 2ab5c75ba2c2..56020d9fa841 100644
--- a/arch/arm/mach-shmobile/board-koelsch.c
+++ b/arch/arm/mach-shmobile/board-koelsch.c
@@ -25,12 +25,17 @@
#include <linux/input.h>
#include <linux/kernel.h>
#include <linux/leds.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
#include <linux/phy.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_device.h>
#include <linux/sh_eth.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/rspi.h>
+#include <linux/spi/spi.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7791.h>
@@ -148,6 +153,55 @@ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
.nbuttons = ARRAY_SIZE(gpio_buttons),
};
+/* QSPI */
+static const struct resource qspi_resources[] __initconst = {
+ DEFINE_RES_MEM(0xe6b10000, 0x1000),
+ DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
+};
+
+static const struct rspi_plat_data qspi_pdata __initconst = {
+ .num_chipselect = 1,
+};
+
+/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64 MiB) */
+static struct mtd_partition spi_flash_part[] = {
+ {
+ .name = "loader",
+ .offset = 0x00000000,
+ .size = 512 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "bootenv",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 512 * 1024,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "data",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static const struct flash_platform_data spi_flash_data = {
+ .name = "m25p80",
+ .parts = spi_flash_part,
+ .nr_parts = ARRAY_SIZE(spi_flash_part),
+ .type = "s25fl512s",
+};
+
+static const struct spi_board_info spi_info[] __initconst = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+ .mode = SPI_MODE_0,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ },
+};
+
/* SATA0 */
static const struct resource sata0_resources[] __initconst = {
DEFINE_RES_MEM(0xee300000, 0x2000),
@@ -180,6 +234,11 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = {
"eth_rmii", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"intc_irq0", "intc"),
+ /* QSPI */
+ PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
+ "qspi_ctrl", "qspi"),
+ PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
+ "qspi_data4", "qspi"),
/* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
"scif0_data_d", "scif0"),
@@ -205,6 +264,11 @@ static void __init koelsch_add_standard_devices(void)
platform_device_register_data(&platform_bus, "gpio-keys", -1,
&koelsch_keys_pdata,
sizeof(koelsch_keys_pdata));
+ platform_device_register_resndata(&platform_bus, "qspi", 0,
+ qspi_resources,
+ ARRAY_SIZE(qspi_resources),
+ &qspi_pdata, sizeof(qspi_pdata));
+ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
koelsch_add_du_device();
--
1.7.9.5
From: Geert Uytterhoeven <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v5:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v4:
- The platform device basename was changed from "rspi" to "rspi-rz"
v3:
- No changes
v2:
- Correct platform device names ("rspi%u" -> "rspi.%u")
arch/arm/mach-shmobile/clock-r7s72100.c | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index dd8ce87596de..ffb0fff41375 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -22,12 +22,14 @@
#include <mach/common.h>
#include <mach/r7s72100.h>
-/* registers */
+/* Frequency Control Registers */
#define FRQCR 0xfcfe0010
#define FRQCR2 0xfcfe0014
+/* Standby Control Registers */
#define STBCR3 0xfcfe0420
#define STBCR4 0xfcfe0424
#define STBCR9 0xfcfe0438
+#define STBCR10 0xfcfe043c
#define PLL_RATE 30
@@ -145,11 +147,19 @@ struct clk div4_clks[DIV4_NR] = {
| CLK_ENABLE_ON_INIT),
};
-enum { MSTP97, MSTP96, MSTP95, MSTP94,
+enum {
+ MSTP107, MSTP106, MSTP105, MSTP104, MSTP103,
+ MSTP97, MSTP96, MSTP95, MSTP94,
MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
- MSTP33, MSTP_NR };
+ MSTP33, MSTP_NR
+};
static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP107] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 7, 0), /* RSPI0 */
+ [MSTP106] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 6, 0), /* RSPI1 */
+ [MSTP105] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 5, 0), /* RSPI2 */
+ [MSTP104] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 4, 0), /* RSPI3 */
+ [MSTP103] = SH_CLK_MSTP8(&peripheral1_clk, STBCR10, 3, 0), /* RSPI4 */
[MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
[MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
[MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
@@ -176,6 +186,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
/* MSTP clocks */
+ CLKDEV_DEV_ID("rspi-rz.0", &mstp_clks[MSTP107]),
+ CLKDEV_DEV_ID("rspi-rz.1", &mstp_clks[MSTP106]),
+ CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
--
1.7.9.5
From: Geert Uytterhoeven <[email protected]>
Add pinctrl and SPI devices for QSPI on Koelsch.
Add Spansion s25fl512s SPI FLASH and MTD partitions.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Cc: [email protected]
---
v3:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v2:
- No changes
arch/arm/boot/dts/r8a7791-koelsch.dts | 36 +++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 74f098596b5c..d4b9bba38685 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -121,8 +121,44 @@
renesas,groups = "scif1_data_d";
renesas,function = "scif1";
};
+
+ qspi_pins: spi {
+ renesas,groups = "qspi_ctrl", "qspi_data4";
+ renesas,function = "qspi";
+ };
};
&sata0 {
status = "okay";
};
+
+&spi {
+ pinctrl-0 = <&qspi_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ flash: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25fl512s";
+ reg = <0>;
+ spi-max-frequency = <30000000>;
+ m25p,fast-read;
+
+ partition@0 {
+ label = "loader";
+ reg = <0x00000000 0x00080000>;
+ read-only;
+ };
+ partition@80000 {
+ label = "bootenv";
+ reg = <0x00080000 0x00080000>;
+ read-only;
+ };
+ partition@100000 {
+ label = "data";
+ reg = <0x00100000 0x03f00000>;
+ };
+ };
+};
--
1.7.9.5
From: Geert Uytterhoeven <[email protected]>
The QSPI clock divider value depends on the MD1, MD2, and MD3 mode
switches.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Acked-by: Laurent Pinchart <[email protected]>
---
v4:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v3:
- No changes
v2:
- No changes
arch/arm/mach-shmobile/clock-r8a7791.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index e4e4dfac85e9..c8227b334e61 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -101,6 +101,7 @@ static struct clk main_clk = {
*/
SH_FIXED_RATIO_CLK_SET(pll1_clk, main_clk, 1, 1);
SH_FIXED_RATIO_CLK_SET(pll3_clk, main_clk, 1, 1);
+SH_FIXED_RATIO_CLK_SET(qspi_clk, pll1_clk, 1, 1);
/* fixed ratio clock */
SH_FIXED_RATIO_CLK_SET(extal_div2_clk, extal_clk, 1, 2);
@@ -124,6 +125,7 @@ static struct clk *main_clks[] = {
&pll3_clk,
&hp_clk,
&p_clk,
+ &qspi_clk,
&rclk_clk,
&mp_clk,
&cp_clk,
@@ -135,6 +137,7 @@ static struct clk *main_clks[] = {
/* MSTP */
enum {
MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925,
+ MSTP917,
MSTP815, MSTP814,
MSTP813,
MSTP811, MSTP810, MSTP809,
@@ -154,6 +157,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
[MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
[MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
+ [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
[MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
[MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
[MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */
@@ -195,6 +199,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("zs", &zs_clk),
CLKDEV_CON_ID("hp", &hp_clk),
CLKDEV_CON_ID("p", &p_clk),
+ CLKDEV_CON_ID("qspi", &qspi_clk),
CLKDEV_CON_ID("rclk", &rclk_clk),
CLKDEV_CON_ID("mp", &mp_clk),
CLKDEV_CON_ID("cp", &cp_clk),
@@ -220,6 +225,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+ CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]),
@@ -271,6 +277,11 @@ void __init r8a7791_clock_init(void)
break;
}
+ if ((mode & (MD(3) | MD(2) | MD(1))) == MD(2))
+ SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 16);
+ else
+ SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 20);
+
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
--
1.7.9.5
From: Geert Uytterhoeven <[email protected]>
Add DT-style ("%08x.spi") clocks, as Genmai doesn't use the common
clock framework yet.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v3:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v2:
- No changes
arch/arm/mach-shmobile/clock-r7s72100.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index ffb0fff41375..71c99feeff01 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -191,6 +191,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
+ CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
+ CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
+ CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
--
1.7.9.5
From: Geert Uytterhoeven <[email protected]>
This enables support for the Spansion s25fl512s SPI FLASH on QSPI.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v4:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v3:
- No changes
v2:
- No changes
arch/arm/configs/koelsch_defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
index 30157975998a..ca8aa070befe 100644
--- a/arch/arm/configs/koelsch_defconfig
+++ b/arch/arm/configs/koelsch_defconfig
@@ -40,6 +40,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_SATA_RCAR=y
+CONFIG_MTD=y
+CONFIG_MTD_M25P80=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set
@@ -62,6 +64,8 @@ CONFIG_SH_ETH=y
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_SPI_RSPI=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
--
1.7.9.5
From: Geert Uytterhoeven <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
Cc: [email protected]
---
v5:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v4:
- Switch to named IRQs
v3:
- No changes
v2:
- No changes
arch/arm/boot/dts/r7s72100-genmai-reference.dts | 2 +-
arch/arm/boot/dts/r7s72100.dtsi | 75 +++++++++++++++++++++++
2 files changed, 76 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r7s72100-genmai-reference.dts b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
index da19c70ed82b..0849017e9d2f 100644
--- a/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
@@ -9,7 +9,7 @@
*/
/dts-v1/;
-/include/ "r7s72100.dtsi"
+#include "r7s72100.dtsi"
/ {
model = "Genmai";
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 46b82aa7dc4e..9be67a16fc6f 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -8,12 +8,22 @@
* kind, whether express or implied.
*/
+#include <dt-bindings/interrupt-controller/irq.h>
+
/ {
compatible = "renesas,r7s72100";
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ spi0 = &spi0;
+ spi1 = &spi1;
+ spi2 = &spi2;
+ spi3 = &spi3;
+ spi4 = &spi4;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -33,4 +43,69 @@
reg = <0xe8201000 0x1000>,
<0xe8202000 0x1000>;
};
+
+ spi0: spi@e800c800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800c800 0x24>;
+ interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>,
+ <0 239 IRQ_TYPE_LEVEL_HIGH>,
+ <0 240 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi1: spi@e800d000 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800d000 0x24>;
+ interrupts = <0 241 IRQ_TYPE_LEVEL_HIGH>,
+ <0 242 IRQ_TYPE_LEVEL_HIGH>,
+ <0 243 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi2: spi@e800d800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800d800 0x24>;
+ interrupts = <0 244 IRQ_TYPE_LEVEL_HIGH>,
+ <0 245 IRQ_TYPE_LEVEL_HIGH>,
+ <0 246 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi3: spi@e800e000 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800e000 0x24>;
+ interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>,
+ <0 248 IRQ_TYPE_LEVEL_HIGH>,
+ <0 249 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi4: spi@e800e800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800e800 0x24>;
+ interrupts = <0 250 IRQ_TYPE_LEVEL_HIGH>,
+ <0 251 IRQ_TYPE_LEVEL_HIGH>,
+ <0 252 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
From: Geert Uytterhoeven <[email protected]>
Add RSPI platform device, resources, platform data, and SPI child.
On this board, only rspi4 is in use. Its bus contains a single device
(a wm8978 audio codec).
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v5:
- Rebased on top of renesas-devel-v3.14-rc1-20140204
v4:
- The platform device basename was changed from "rspi" to "rspi-rz",
dropping the platform data flags in the process
- Switch to named IRQs
v3:
- Move platform devices from setup-r7s72100.c to board-genmai.c, as
genmai-reference will use devices instantiated from DT
- Merge with "ARM: shmobile: genmai: Add RSPI children", as this now
touches the same file
- Instantiate SPI children in C on genmai only, as genmai-reference will
instantiate them from DT
v2:
- Correct platform device names ("rspi%u.0" -> "rspi.%u")
- Add missing platform data
- Correct summary (resources -> platform devices)
arch/arm/mach-shmobile/board-genmai.c | 44 +++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
index 3e92e3c62d4c..c4064610e223 100644
--- a/arch/arm/mach-shmobile/board-genmai.c
+++ b/arch/arm/mach-shmobile/board-genmai.c
@@ -20,15 +20,59 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
+#include <linux/spi/rspi.h>
+#include <linux/spi/spi.h>
#include <mach/common.h>
+#include <mach/irqs.h>
#include <mach/r7s72100.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+/* RSPI */
+#define RSPI_RESOURCE(idx, baseaddr, irq) \
+static const struct resource rspi##idx##_resources[] __initconst = { \
+ DEFINE_RES_MEM(baseaddr, 0x24), \
+ DEFINE_RES_IRQ_NAMED(irq, "error"), \
+ DEFINE_RES_IRQ_NAMED(irq + 1, "rx"), \
+ DEFINE_RES_IRQ_NAMED(irq + 2, "tx"), \
+}
+
+RSPI_RESOURCE(0, 0xe800c800, gic_iid(270));
+RSPI_RESOURCE(1, 0xe800d000, gic_iid(273));
+RSPI_RESOURCE(2, 0xe800d800, gic_iid(276));
+RSPI_RESOURCE(3, 0xe800e000, gic_iid(279));
+RSPI_RESOURCE(4, 0xe800e800, gic_iid(282));
+
+static const struct rspi_plat_data rspi_pdata __initconst = {
+ .num_chipselect = 1,
+};
+
+#define r7s72100_register_rspi(idx) \
+ platform_device_register_resndata(&platform_bus, "rspi-rz", idx, \
+ rspi##idx##_resources, \
+ ARRAY_SIZE(rspi##idx##_resources), \
+ &rspi_pdata, sizeof(rspi_pdata))
+
+static const struct spi_board_info spi_info[] __initconst = {
+ {
+ .modalias = "wm8978",
+ .max_speed_hz = 5000000,
+ .bus_num = 4,
+ .chip_select = 0,
+ },
+};
+
static void __init genmai_add_standard_devices(void)
{
r7s72100_clock_init();
r7s72100_add_dt_devices();
+
+ r7s72100_register_rspi(0);
+ r7s72100_register_rspi(1);
+ r7s72100_register_rspi(2);
+ r7s72100_register_rspi(3);
+ r7s72100_register_rspi(4);
+ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
}
static const char * const genmai_boards_compat_dt[] __initconst = {
--
1.7.9.5
On Tue, Feb 04, 2014 at 04:23:54PM +0100, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This patch series contains SoC and board integration for
> 1. RSPI in the r7s72100 aka RZ/A1H SoC on the Genmai reference board,
> 2. QSPI in the r8a7791 aka R-Car M2 SoC on the Koelsch reference board.
> It was rebased on top of renesas-devel-v3.14-rc1-20140204.
Can you please stop CCing arch/arm only patch serieses like this to the
SPI list - they just mean I have to go through patchwork and mark them
as not applicable.
Hi Mark,
On Tue, Feb 4, 2014 at 6:37 PM, Mark Brown <[email protected]> wrote:
> On Tue, Feb 04, 2014 at 04:23:54PM +0100, Geert Uytterhoeven wrote:
>> Hi Simon, Magnus,
>>
>> This patch series contains SoC and board integration for
>> 1. RSPI in the r7s72100 aka RZ/A1H SoC on the Genmai reference board,
>> 2. QSPI in the r8a7791 aka R-Car M2 SoC on the Koelsch reference board.
>> It was rebased on top of renesas-devel-v3.14-rc1-20140204.
>
> Can you please stop CCing arch/arm only patch serieses like this to the
> SPI list - they just mean I have to go through patchwork and mark them
> as not applicable.
Sorry, you're right. Only a few of them contained SPI-specific code.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Magnus, could you Ack these or otherwise?
On Tue, Feb 04, 2014 at 04:23:54PM +0100, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This patch series contains SoC and board integration for
> 1. RSPI in the r7s72100 aka RZ/A1H SoC on the Genmai reference board,
> 2. QSPI in the r8a7791 aka R-Car M2 SoC on the Koelsch reference board.
> It was rebased on top of renesas-devel-v3.14-rc1-20140204.
>
> It was tested on the r7s72100-based Genmai reference board using loopback
> mode, and on the r8a7791-based Koelsch reference board using the Spansion
> s25fl512s SPI FLASH.
>
> - [v5 01/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks
> - [v5 02/11] ARM: shmobile: genmai legacy: Add RSPI support
> - [v3 03/11] ARM: shmobile: genmai defconfig: Enable RSPI
> - [v3 04/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
> - [v5 05/11] ARM: shmobile: r7s72100 dtsi: Add RSPI nodes
> - [v4 06/11] ARM: shmobile: r8a7791 clock: add QSPI clocks
> - [v4 07/11] ARM: shmobile: koelsch legacy: Add QSPI support
> - [v4 08/11] ARM: shmobile: koelsch defconfig: Enable RSPI and
> - [v3 09/11] ARM: shmobile: r8a7791 dtsi: Add QSPI node
> - [v3 10/11] ARM: shmobile: koelsch dts: Add QSPI nodes
> - [v2 11/11] ARM: shmobile: lager legacy: Switch QSPI to named IRQs
Above I see v2, v3, v4 and v5 patches.
While I can make sense of this it makes it cumbersome to refer to the
series as a whole.
Bob, can you take a look at '"[PATCH 00/11] ARM: shmobile: RSPI RZ and
QSPI SoC and board", posted on Tuesday the 2nd, which includes v2, v3,
v4 and v5 patches'?
What would make my life easier would be if the entire series was v5 and
all the patches contained in it were v5. Then I could just ask Bob to look
at "[PATCH v5 00/11] ARM: shmobile: RSPI RZ and QSPI SoC and board"
There is no Bob but I do ask people these kind of questions :)
> All of these should be safe to apply, without compile-time or run-time
> dependencies on other parts.
> Actual functioning for some parts may depend on RSPI work queued up for
> 3.15 in the spi tree.
>
> Compared to previous submission, the following have been postponed:
> - [v4 03/15] [WIP] ARM: shmobile: genmai legacy: Add preliminary RSPI
> pinmux setup
> This depends on the to-be-written non-DT pinmux configuration for
> r7s72100.
> - [v4 07/15] ARM: shmobile: genmai reference dts: Add RSPI nodes
> This depends on Magnus' "ARM: shmobile: r7s72100 GPIO and PINCTRL device
> nodes"
> - [v1 14/15] ARM: shmobile: koelsch legacy: Enable Quad SPI transfers for
> the SPI FLASH
> - [v1 15/15] ARM: shmobile: koelsch dts: Enable Quad SPI transfers
> These two depend on the RSPI Dual/Quad work queued up in the spi tree.
> After applying the r8a7791/Koelsch patches above, the mainline RSPI/QSPI
> driver will work fine. But enabling Quad SPI transfers in board support
> code or DT without the corresponding support in the RSPI driver would
> cause a regression.
>
> Please apply this series, Thanks!
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
>
On Wed, Feb 5, 2014 at 9:56 AM, Simon Horman <[email protected]> wrote:
> Magnus, could you Ack these or otherwise?
>
> On Tue, Feb 04, 2014 at 04:23:54PM +0100, Geert Uytterhoeven wrote:
>> Hi Simon, Magnus,
>>
>> This patch series contains SoC and board integration for
>> 1. RSPI in the r7s72100 aka RZ/A1H SoC on the Genmai reference board,
>> 2. QSPI in the r8a7791 aka R-Car M2 SoC on the Koelsch reference board.
>> It was rebased on top of renesas-devel-v3.14-rc1-20140204.
>>
>> It was tested on the r7s72100-based Genmai reference board using loopback
>> mode, and on the r8a7791-based Koelsch reference board using the Spansion
>> s25fl512s SPI FLASH.
>>
>> - [v5 01/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks
>> - [v5 02/11] ARM: shmobile: genmai legacy: Add RSPI support
>> - [v3 03/11] ARM: shmobile: genmai defconfig: Enable RSPI
>> - [v3 04/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
>> - [v5 05/11] ARM: shmobile: r7s72100 dtsi: Add RSPI nodes
>> - [v4 06/11] ARM: shmobile: r8a7791 clock: add QSPI clocks
>> - [v4 07/11] ARM: shmobile: koelsch legacy: Add QSPI support
>> - [v4 08/11] ARM: shmobile: koelsch defconfig: Enable RSPI and
>> - [v3 09/11] ARM: shmobile: r8a7791 dtsi: Add QSPI node
>> - [v3 10/11] ARM: shmobile: koelsch dts: Add QSPI nodes
>> - [v2 11/11] ARM: shmobile: lager legacy: Switch QSPI to named IRQs
>
> Above I see v2, v3, v4 and v5 patches.
>
> While I can make sense of this it makes it cumbersome to refer to the
> series as a whole.
>
> Bob, can you take a look at '"[PATCH 00/11] ARM: shmobile: RSPI RZ and
> QSPI SoC and board", posted on Tuesday the 2nd, which includes v2, v3,
> v4 and v5 patches'?
>
> What would make my life easier would be if the entire series was v5 and
> all the patches contained in it were v5. Then I could just ask Bob to look
> at "[PATCH v5 00/11] ARM: shmobile: RSPI RZ and QSPI SoC and board"
>
> There is no Bob but I do ask people these kind of questions :)
Simon, Geert, Bob,
I've now gone through these patches and I think they look great. My
apologies for slow handling.
Acked-by: Magnus Damm <[email protected]>
Thanks for your help.
Cheers,
/ magnus
On Thu, Feb 06, 2014 at 07:36:17PM +0900, Magnus Damm wrote:
> On Wed, Feb 5, 2014 at 9:56 AM, Simon Horman <[email protected]> wrote:
> > Magnus, could you Ack these or otherwise?
> >
> > On Tue, Feb 04, 2014 at 04:23:54PM +0100, Geert Uytterhoeven wrote:
> >> Hi Simon, Magnus,
> >>
> >> This patch series contains SoC and board integration for
> >> 1. RSPI in the r7s72100 aka RZ/A1H SoC on the Genmai reference board,
> >> 2. QSPI in the r8a7791 aka R-Car M2 SoC on the Koelsch reference board.
> >> It was rebased on top of renesas-devel-v3.14-rc1-20140204.
> >>
> >> It was tested on the r7s72100-based Genmai reference board using loopback
> >> mode, and on the r8a7791-based Koelsch reference board using the Spansion
> >> s25fl512s SPI FLASH.
> >>
> >> - [v5 01/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks
> >> - [v5 02/11] ARM: shmobile: genmai legacy: Add RSPI support
> >> - [v3 03/11] ARM: shmobile: genmai defconfig: Enable RSPI
> >> - [v3 04/11] ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
> >> - [v5 05/11] ARM: shmobile: r7s72100 dtsi: Add RSPI nodes
> >> - [v4 06/11] ARM: shmobile: r8a7791 clock: add QSPI clocks
> >> - [v4 07/11] ARM: shmobile: koelsch legacy: Add QSPI support
> >> - [v4 08/11] ARM: shmobile: koelsch defconfig: Enable RSPI and
> >> - [v3 09/11] ARM: shmobile: r8a7791 dtsi: Add QSPI node
> >> - [v3 10/11] ARM: shmobile: koelsch dts: Add QSPI nodes
> >> - [v2 11/11] ARM: shmobile: lager legacy: Switch QSPI to named IRQs
> >
> > Above I see v2, v3, v4 and v5 patches.
> >
> > While I can make sense of this it makes it cumbersome to refer to the
> > series as a whole.
> >
> > Bob, can you take a look at '"[PATCH 00/11] ARM: shmobile: RSPI RZ and
> > QSPI SoC and board", posted on Tuesday the 2nd, which includes v2, v3,
> > v4 and v5 patches'?
> >
> > What would make my life easier would be if the entire series was v5 and
> > all the patches contained in it were v5. Then I could just ask Bob to look
> > at "[PATCH v5 00/11] ARM: shmobile: RSPI RZ and QSPI SoC and board"
> >
> > There is no Bob but I do ask people these kind of questions :)
>
> Simon, Geert, Bob,
>
> I've now gone through these patches and I think they look great. My
> apologies for slow handling.
>
> Acked-by: Magnus Damm <[email protected]>
Thanks, I have queued these up.