From: Sean Wang <[email protected]>
Changes since v1:
Continue the upstream journey based on the previous John Crispin's good work.
- add fixes for the v1 suggestion
- fix typo in the commit log
- add missing pinctrl bindings for mt7623
- reuse pinctrl driver for mt7623
- enhance existing nodes since the way for binding is changed e.g USB
- add more nodes which already gets support from the latest tree e.g MT7530 DSA
- add the dts file for Bananapi R2 (BPI-R2) board
This series extends the dts files used for booting mt7623 base boards.
Since support for mt7623 was added around v4.6, many new drivers have
been accepted upstream. The contained patches add several of these to
the devicetree.
Additionally the series does a bit of refactoring. Mediatek pointed out
that the evaluation board is infact a reference design and asked the the
evb files be renamed to rfb.
As with all of the current ARM bases MTK silicon, these boards also have
a PMIC. Instead of adding the nodes to all of the dts files, we add an
intermediate dtsi file that contains the required nodes. This allows us
to reduce the size of the top most dts files.
The RFB comes in various versions and asiarf has even done a crowdfunder
to sell them. We should try to reduce the duplication. This series adds
a common dtsi file for these boards. This results in the topmost dts files
only needing to specify the compatible string, MTD nodes and ethernet setup.
John Crispin (14):
arm: dts: mt7623: add clock controller device nodes
arm: dts: mt7623: add subsystem clock controller device nodes
arm: dts: mt7623: add power domain controller device node
arm: dts: mt7623: add clock-frequency to the a7 timer node to
mt7623.dtsi
arm: dts: mt7623: add pinctrl nodes to the mt7623 dtsi file
arm: dts: mt7623: add pmic wrapper nodes to the mt7623 dtsi file
arm: dts: mt7623: add i2c nodes to the mt7623.dtsi file
arm: dts: mt7623: add nand nodes to the mt7623.dtsi file
arm: dts: mt7623: add mmc nodes to the mt7623.dtsi file
arm: dts: mt7623: add usb nodes to the mt7623.dtsi file
arm: dts: mt7623: add mt7623-mt6323.dtsi file
arm: dts: mt7623: cleanup the mt7623n rfb uart nodes
arm: dts: mt7623: enable the usb device on the mt7623n rfb
arm: dts: mt7623: enable the nand device on the mt7623n nand rfb
Sean Wang (16):
pinctrl: mediatek: Add missing pinctrl bindings for mt7623
pinctrl: mediatek: reuse pinctrl driver for mt7623
arm: dts: mt7623: add spi nodes to the mt7623.dtsi file
arm: dts: mt7623: add pwm nodes to the mt7623.dtsi file
arm: dts: mt7623: add ethernet nodes to the mt7623.dtsi file
arm: dts: mt7623: add crypto engine nodes to the mt7623.dtsi file
arm: dts: mt7623: add ir nodes to the mt7623.dtsi file
arm: dts: mt7623: add afe nodes to the mt7623.dtsi file
arm: dts: mt7623: add rng nodes to the mt7623.dtsi file
arm: dts: mt7623: add auxadc nodes to the mt7623.dtsi file
arm: dts: mt7623: add efuse nodes to the mt7623.dtsi file
arm: dts: mt7623: add thermal nodes to the mt7623.dtsi file
arm: dts: mt7623: add Sean as one of authors for mt7623.dtsi files
arm: dts: mt7623: rename mt7623-evb.dts to
arch/arm/boot/dts/mt7623n-rfb.dtsi
dt-bindings: add vendor prefix for bananapi
arm: dts: mt7623: add dts file for Bananapi R2 (BPI-R2) board
Documentation/devicetree/bindings/arm/mediatek.txt | 8 +-
.../devicetree/bindings/pinctrl/pinctrl-mt65xx.txt | 1 -
.../devicetree/bindings/vendor-prefixes.txt | 1 +
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/mt7623-evb.dts | 33 -
arch/arm/boot/dts/mt7623-mt6323.dtsi | 269 +++
arch/arm/boot/dts/mt7623.dtsi | 556 +++++-
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 478 +++++
arch/arm/boot/dts/mt7623n-rfb-nand.dts | 109 ++
arch/arm/boot/dts/mt7623n-rfb.dtsi | 61 +
arch/arm/mach-mediatek/mediatek.c | 4 +-
arch/arm/mach-mediatek/platsmp.c | 2 +-
drivers/pinctrl/mediatek/Kconfig | 9 +-
drivers/pinctrl/mediatek/Makefile | 1 -
drivers/pinctrl/mediatek/pinctrl-mt7623.c | 379 ----
drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h | 1936 --------------------
include/dt-bindings/pinctrl/mt7623-pinfunc.h | 30 +-
17 files changed, 1497 insertions(+), 2383 deletions(-)
delete mode 100644 arch/arm/boot/dts/mt7623-evb.dts
create mode 100644 arch/arm/boot/dts/mt7623-mt6323.dtsi
create mode 100644 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
create mode 100644 arch/arm/boot/dts/mt7623n-rfb-nand.dts
create mode 100644 arch/arm/boot/dts/mt7623n-rfb.dtsi
delete mode 100644 drivers/pinctrl/mediatek/pinctrl-mt7623.c
delete mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h
--
1.9.1
From: John Crispin <[email protected]>
Add clock controller nodes for MT7623, including topckgen, infracfg,
pericfg and apmixedsys. This patch also cleans up two oscillators that
provide clocks for MT7623. Switch the uart clocks to the real ones while
at it.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 64 +++++++++++++++++++++++++++++++++++++------
1 file changed, 55 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 402579a..b97b2ba 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -14,6 +14,8 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/mt2701-clk.h>
+#include <dt-bindings/reset/mt2701-resets.h>
#include "skeleton64.dtsi"
/ {
@@ -53,16 +55,18 @@
#clock-cells = <0>;
};
- rtc_clk: dummy32k {
+ rtc32k: oscillator@1 {
compatible = "fixed-clock";
- clock-frequency = <32000>;
#clock-cells = <0>;
+ clock-frequency = <32000>;
+ clock-output-names = "rtc32k";
};
- uart_clk: dummy26m {
+ clk26m: oscillator@0 {
compatible = "fixed-clock";
- clock-frequency = <26000000>;
#clock-cells = <0>;
+ clock-frequency = <26000000>;
+ clock-output-names = "clk26m";
};
timer {
@@ -74,6 +78,32 @@
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ topckgen: syscon@10000000 {
+ compatible = "mediatek,mt7623-topckgen",
+ "mediatek,mt2701-topckgen",
+ "syscon";
+ reg = <0 0x10000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ infracfg: syscon@10001000 {
+ compatible = "mediatek,mt7623-infracfg",
+ "mediatek,mt2701-infracfg",
+ "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ pericfg: syscon@10003000 {
+ compatible = "mediatek,mt7623-pericfg",
+ "mediatek,mt2701-pericfg",
+ "syscon";
+ reg = <0 0x10003000 0 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
watchdog: watchdog@10007000 {
compatible = "mediatek,mt7623-wdt",
"mediatek,mt6589-wdt";
@@ -85,7 +115,7 @@
"mediatek,mt6577-timer";
reg = <0 0x10008000 0 0x80>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&system_clk>, <&rtc_clk>;
+ clocks = <&system_clk>, <&rtc32k>;
clock-names = "system-clk", "rtc-clk";
};
@@ -98,6 +128,14 @@
reg = <0 0x10200100 0 0x1c>;
};
+ apmixedsys: syscon@10209000 {
+ compatible = "mediatek,mt7623-apmixedsys",
+ "mediatek,mt2701-apmixedsys",
+ "syscon";
+ reg = <0 0x10209000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
gic: interrupt-controller@10211000 {
compatible = "arm,cortex-a7-gic";
interrupt-controller;
@@ -114,7 +152,9 @@
"mediatek,mt6577-uart";
reg = <0 0x11002000 0 0x400>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&uart_clk>;
+ clocks = <&pericfg CLK_PERI_UART0_SEL>,
+ <&pericfg CLK_PERI_UART0>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -123,7 +163,9 @@
"mediatek,mt6577-uart";
reg = <0 0x11003000 0 0x400>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&uart_clk>;
+ clocks = <&pericfg CLK_PERI_UART1_SEL>,
+ <&pericfg CLK_PERI_UART1>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -132,7 +174,9 @@
"mediatek,mt6577-uart";
reg = <0 0x11004000 0 0x400>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&uart_clk>;
+ clocks = <&pericfg CLK_PERI_UART2_SEL>,
+ <&pericfg CLK_PERI_UART2>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -141,7 +185,9 @@
"mediatek,mt6577-uart";
reg = <0 0x11005000 0 0x400>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&uart_clk>;
+ clocks = <&pericfg CLK_PERI_UART3_SEL>,
+ <&pericfg CLK_PERI_UART3>;
+ clock-names = "baud", "bus";
status = "disabled";
};
};
--
1.9.1
From: Sean Wang <[email protected]>
Add missing pinctrl binding these which would be used in
devicetree related files.
Signed-off-by: Sean Wang <[email protected]>
---
include/dt-bindings/pinctrl/mt7623-pinfunc.h | 30 ++++++++++++++++++++++++----
1 file changed, 26 insertions(+), 4 deletions(-)
diff --git a/include/dt-bindings/pinctrl/mt7623-pinfunc.h b/include/dt-bindings/pinctrl/mt7623-pinfunc.h
index 2f00bdc..436a87b 100644
--- a/include/dt-bindings/pinctrl/mt7623-pinfunc.h
+++ b/include/dt-bindings/pinctrl/mt7623-pinfunc.h
@@ -185,6 +185,12 @@
#define MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO (MTK_PIN_NO(56) | 1)
#define MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MI (MTK_PIN_NO(56) | 2)
+#define MT7623_PIN_57_SDA1_FUNC_GPIO57 (MTK_PIN_NO(57) | 0)
+#define MT7623_PIN_57_SDA1_FUNC_SDA1 (MTK_PIN_NO(57) | 1)
+
+#define MT7623_PIN_58_SCL1_FUNC_GPIO58 (MTK_PIN_NO(58) | 0)
+#define MT7623_PIN_58_SCL1_FUNC_SCL1 (MTK_PIN_NO(58) | 1)
+
#define MT7623_PIN_60_WB_RSTB_FUNC_GPIO60 (MTK_PIN_NO(60) | 0)
#define MT7623_PIN_60_WB_RSTB_FUNC_WB_RSTB (MTK_PIN_NO(60) | 1)
@@ -244,6 +250,22 @@
#define MT7623_PIN_76_SCL0_FUNC_GPIO76 (MTK_PIN_NO(76) | 0)
#define MT7623_PIN_76_SCL0_FUNC_SCL0 (MTK_PIN_NO(76) | 1)
+#define MT7623_PIN_79_URXD0_FUNC_GPIO79 (MTK_PIN_NO(79) | 0)
+#define MT7623_PIN_79_URXD0_FUNC_URXD0 (MTK_PIN_NO(79) | 1)
+#define MT7623_PIN_79_URXD0_FUNC_UTXD0 (MTK_PIN_NO(79) | 2)
+
+#define MT7623_PIN_80_UTXD0_FUNC_GPIO80 (MTK_PIN_NO(80) | 0)
+#define MT7623_PIN_80_UTXD0_FUNC_UTXD0 (MTK_PIN_NO(80) | 1)
+#define MT7623_PIN_80_UTXD0_FUNC_URXD0 (MTK_PIN_NO(80) | 2)
+
+#define MT7623_PIN_81_URXD1_FUNC_GPIO81 (MTK_PIN_NO(81) | 0)
+#define MT7623_PIN_81_URXD1_FUNC_URXD1 (MTK_PIN_NO(81) | 1)
+#define MT7623_PIN_81_URXD1_FUNC_UTXD1 (MTK_PIN_NO(81) | 2)
+
+#define MT7623_PIN_82_UTXD1_FUNC_GPIO82 (MTK_PIN_NO(82) | 0)
+#define MT7623_PIN_82_UTXD1_FUNC_UTXD1 (MTK_PIN_NO(82) | 1)
+#define MT7623_PIN_82_UTXD1_FUNC_URXD1 (MTK_PIN_NO(82) | 2)
+
#define MT7623_PIN_83_LCM_RST_FUNC_GPIO83 (MTK_PIN_NO(83) | 0)
#define MT7623_PIN_83_LCM_RST_FUNC_LCM_RST (MTK_PIN_NO(83) | 1)
@@ -351,10 +373,10 @@
#define MT7623_PIN_122_GPIO122_FUNC_SDA2 (MTK_PIN_NO(122) | 4)
#define MT7623_PIN_122_GPIO122_FUNC_URXD0 (MTK_PIN_NO(122) | 5)
-#define MT7623_PIN_123_GPIO123_FUNC_GPIO123 (MTK_PIN_NO(123) | 0)
-#define MT7623_PIN_123_GPIO123_FUNC_TEST (MTK_PIN_NO(123) | 1)
-#define MT7623_PIN_123_GPIO123_FUNC_SCL2 (MTK_PIN_NO(123) | 4)
-#define MT7623_PIN_123_GPIO123_FUNC_UTXD0 (MTK_PIN_NO(123) | 5)
+#define MT7623_PIN_123_HTPLG_FUNC_GPIO123 (MTK_PIN_NO(123) | 0)
+#define MT7623_PIN_123_HTPLG_FUNC_HTPLG (MTK_PIN_NO(123) | 1)
+#define MT7623_PIN_123_HTPLG_FUNC_SCL2 (MTK_PIN_NO(123) | 4)
+#define MT7623_PIN_123_HTPLG_FUNC_UTXD0 (MTK_PIN_NO(123) | 5)
#define MT7623_PIN_124_GPIO124_FUNC_GPIO124 (MTK_PIN_NO(124) | 0)
#define MT7623_PIN_124_GPIO124_FUNC_TEST (MTK_PIN_NO(124) | 1)
--
1.9.1
From: Sean Wang <[email protected]>
mt7623 pinctrl driver can be compatible with mt2701 one,
so the patch reuses the driver and deletes those redundant
ones.
Cc: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
.../devicetree/bindings/pinctrl/pinctrl-mt65xx.txt | 1 -
drivers/pinctrl/mediatek/Kconfig | 9 +-
drivers/pinctrl/mediatek/Makefile | 1 -
drivers/pinctrl/mediatek/pinctrl-mt7623.c | 379 ----
drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h | 1936 --------------------
5 files changed, 1 insertion(+), 2325 deletions(-)
delete mode 100644 drivers/pinctrl/mediatek/pinctrl-mt7623.c
delete mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt
index 17631d0..9ffb0b2 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt
@@ -6,7 +6,6 @@ Required properties:
- compatible: value should be one of the following.
"mediatek,mt2701-pinctrl", compatible with mt2701 pinctrl.
"mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl.
- "mediatek,mt7623-pinctrl", compatible with mt7623 pinctrl.
"mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl.
"mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl.
"mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl.
diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig
index 80fe3b4..fac9866 100644
--- a/drivers/pinctrl/mediatek/Kconfig
+++ b/drivers/pinctrl/mediatek/Kconfig
@@ -11,18 +11,11 @@ config PINCTRL_MTK
# For ARMv7 SoCs
config PINCTRL_MT2701
bool "Mediatek MT2701 pin control"
- depends on MACH_MT2701 || COMPILE_TEST
+ depends on MACH_MT7623 || MACH_MT2701 || COMPILE_TEST
depends on OF
default MACH_MT2701
select PINCTRL_MTK
-config PINCTRL_MT7623
- bool "Mediatek MT7623 pin control"
- depends on MACH_MT7623 || COMPILE_TEST
- depends on OF
- default MACH_MT7623
- select PINCTRL_MTK_COMMON
-
config PINCTRL_MT8135
bool "Mediatek MT8135 pin control"
depends on MACH_MT8135 || COMPILE_TEST
diff --git a/drivers/pinctrl/mediatek/Makefile b/drivers/pinctrl/mediatek/Makefile
index 3e3390a..e59c613 100644
--- a/drivers/pinctrl/mediatek/Makefile
+++ b/drivers/pinctrl/mediatek/Makefile
@@ -3,7 +3,6 @@ obj-y += pinctrl-mtk-common.o
# SoC Drivers
obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o
-obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o
obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o
obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o
obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7623.c b/drivers/pinctrl/mediatek/pinctrl-mt7623.c
deleted file mode 100644
index fa28dd6..0000000
--- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c
+++ /dev/null
@@ -1,379 +0,0 @@
-/*
- * Copyright (c) 2016 John Crispin <[email protected]>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <dt-bindings/pinctrl/mt65xx.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
-#include <linux/platform_device.h>
-#include <linux/pinctrl/pinctrl.h>
-#include <linux/regmap.h>
-
-#include "pinctrl-mtk-common.h"
-#include "pinctrl-mtk-mt7623.h"
-
-static const struct mtk_drv_group_desc mt7623_drv_grp[] = {
- /* 0E4E8SR 4/8/12/16 */
- MTK_DRV_GRP(4, 16, 1, 2, 4),
- /* 0E2E4SR 2/4/6/8 */
- MTK_DRV_GRP(2, 8, 1, 2, 2),
- /* E8E4E2 2/4/6/8/10/12/14/16 */
- MTK_DRV_GRP(2, 16, 0, 2, 2)
-};
-
-#define DRV_SEL0 0xf50
-#define DRV_SEL1 0xf60
-#define DRV_SEL2 0xf70
-#define DRV_SEL3 0xf80
-#define DRV_SEL4 0xf90
-#define DRV_SEL5 0xfa0
-#define DRV_SEL6 0xfb0
-#define DRV_SEL7 0xfe0
-#define DRV_SEL8 0xfd0
-#define DRV_SEL9 0xff0
-#define DRV_SEL10 0xf00
-
-#define MSDC0_CTRL0 0xcc0
-#define MSDC0_CTRL1 0xcd0
-#define MSDC0_CTRL2 0xce0
-#define MSDC0_CTRL3 0xcf0
-#define MSDC0_CTRL4 0xd00
-#define MSDC0_CTRL5 0xd10
-#define MSDC0_CTRL6 0xd20
-#define MSDC1_CTRL0 0xd30
-#define MSDC1_CTRL1 0xd40
-#define MSDC1_CTRL2 0xd50
-#define MSDC1_CTRL3 0xd60
-#define MSDC1_CTRL4 0xd70
-#define MSDC1_CTRL5 0xd80
-#define MSDC1_CTRL6 0xd90
-
-#define IES_EN0 0xb20
-#define IES_EN1 0xb30
-#define IES_EN2 0xb40
-
-#define SMT_EN0 0xb50
-#define SMT_EN1 0xb60
-#define SMT_EN2 0xb70
-
-static const struct mtk_pin_drv_grp mt7623_pin_drv[] = {
- MTK_PIN_DRV_GRP(0, DRV_SEL0, 0, 1),
- MTK_PIN_DRV_GRP(1, DRV_SEL0, 0, 1),
- MTK_PIN_DRV_GRP(2, DRV_SEL0, 0, 1),
- MTK_PIN_DRV_GRP(3, DRV_SEL0, 0, 1),
- MTK_PIN_DRV_GRP(4, DRV_SEL0, 0, 1),
- MTK_PIN_DRV_GRP(5, DRV_SEL0, 0, 1),
- MTK_PIN_DRV_GRP(6, DRV_SEL0, 0, 1),
- MTK_PIN_DRV_GRP(7, DRV_SEL0, 4, 1),
- MTK_PIN_DRV_GRP(8, DRV_SEL0, 4, 1),
- MTK_PIN_DRV_GRP(9, DRV_SEL0, 4, 1),
- MTK_PIN_DRV_GRP(10, DRV_SEL0, 8, 1),
- MTK_PIN_DRV_GRP(11, DRV_SEL0, 8, 1),
- MTK_PIN_DRV_GRP(12, DRV_SEL0, 8, 1),
- MTK_PIN_DRV_GRP(13, DRV_SEL0, 8, 1),
- MTK_PIN_DRV_GRP(14, DRV_SEL0, 12, 0),
- MTK_PIN_DRV_GRP(15, DRV_SEL0, 12, 0),
- MTK_PIN_DRV_GRP(18, DRV_SEL1, 4, 0),
- MTK_PIN_DRV_GRP(19, DRV_SEL1, 4, 0),
- MTK_PIN_DRV_GRP(20, DRV_SEL1, 4, 0),
- MTK_PIN_DRV_GRP(21, DRV_SEL1, 4, 0),
- MTK_PIN_DRV_GRP(22, DRV_SEL1, 8, 0),
- MTK_PIN_DRV_GRP(23, DRV_SEL1, 8, 0),
- MTK_PIN_DRV_GRP(24, DRV_SEL1, 8, 0),
- MTK_PIN_DRV_GRP(25, DRV_SEL1, 8, 0),
- MTK_PIN_DRV_GRP(26, DRV_SEL1, 8, 0),
- MTK_PIN_DRV_GRP(27, DRV_SEL1, 12, 0),
- MTK_PIN_DRV_GRP(28, DRV_SEL1, 12, 0),
- MTK_PIN_DRV_GRP(29, DRV_SEL1, 12, 0),
- MTK_PIN_DRV_GRP(33, DRV_SEL2, 0, 0),
- MTK_PIN_DRV_GRP(34, DRV_SEL2, 0, 0),
- MTK_PIN_DRV_GRP(35, DRV_SEL2, 0, 0),
- MTK_PIN_DRV_GRP(36, DRV_SEL2, 0, 0),
- MTK_PIN_DRV_GRP(37, DRV_SEL2, 0, 0),
- MTK_PIN_DRV_GRP(39, DRV_SEL2, 8, 1),
- MTK_PIN_DRV_GRP(40, DRV_SEL2, 8, 1),
- MTK_PIN_DRV_GRP(41, DRV_SEL2, 8, 1),
- MTK_PIN_DRV_GRP(42, DRV_SEL2, 8, 1),
- MTK_PIN_DRV_GRP(43, DRV_SEL2, 12, 0),
- MTK_PIN_DRV_GRP(44, DRV_SEL2, 12, 0),
- MTK_PIN_DRV_GRP(45, DRV_SEL2, 12, 0),
- MTK_PIN_DRV_GRP(47, DRV_SEL3, 0, 0),
- MTK_PIN_DRV_GRP(48, DRV_SEL3, 0, 0),
- MTK_PIN_DRV_GRP(49, DRV_SEL3, 4, 0),
- MTK_PIN_DRV_GRP(53, DRV_SEL3, 12, 0),
- MTK_PIN_DRV_GRP(54, DRV_SEL3, 12, 0),
- MTK_PIN_DRV_GRP(55, DRV_SEL3, 12, 0),
- MTK_PIN_DRV_GRP(56, DRV_SEL3, 12, 0),
- MTK_PIN_DRV_GRP(60, DRV_SEL4, 8, 1),
- MTK_PIN_DRV_GRP(61, DRV_SEL4, 8, 1),
- MTK_PIN_DRV_GRP(62, DRV_SEL4, 8, 1),
- MTK_PIN_DRV_GRP(63, DRV_SEL4, 12, 1),
- MTK_PIN_DRV_GRP(64, DRV_SEL4, 12, 1),
- MTK_PIN_DRV_GRP(65, DRV_SEL4, 12, 1),
- MTK_PIN_DRV_GRP(66, DRV_SEL5, 0, 1),
- MTK_PIN_DRV_GRP(67, DRV_SEL5, 0, 1),
- MTK_PIN_DRV_GRP(68, DRV_SEL5, 0, 1),
- MTK_PIN_DRV_GRP(69, DRV_SEL5, 0, 1),
- MTK_PIN_DRV_GRP(70, DRV_SEL5, 0, 1),
- MTK_PIN_DRV_GRP(71, DRV_SEL5, 0, 1),
- MTK_PIN_DRV_GRP(72, DRV_SEL3, 4, 0),
- MTK_PIN_DRV_GRP(73, DRV_SEL3, 4, 0),
- MTK_PIN_DRV_GRP(74, DRV_SEL3, 4, 0),
- MTK_PIN_DRV_GRP(83, DRV_SEL5, 0, 1),
- MTK_PIN_DRV_GRP(84, DRV_SEL5, 0, 1),
- MTK_PIN_DRV_GRP(105, MSDC1_CTRL1, 0, 1),
- MTK_PIN_DRV_GRP(106, MSDC1_CTRL0, 0, 1),
- MTK_PIN_DRV_GRP(107, MSDC1_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(108, MSDC1_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(109, MSDC1_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(110, MSDC1_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(111, MSDC0_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(112, MSDC0_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(113, MSDC0_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(114, MSDC0_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(115, MSDC0_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(116, MSDC0_CTRL1, 0, 1),
- MTK_PIN_DRV_GRP(117, MSDC0_CTRL0, 0, 1),
- MTK_PIN_DRV_GRP(118, MSDC0_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(119, MSDC0_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(120, MSDC0_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(121, MSDC0_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(126, DRV_SEL3, 4, 0),
- MTK_PIN_DRV_GRP(199, DRV_SEL0, 4, 1),
- MTK_PIN_DRV_GRP(200, DRV_SEL8, 0, 0),
- MTK_PIN_DRV_GRP(201, DRV_SEL8, 0, 0),
- MTK_PIN_DRV_GRP(203, DRV_SEL8, 4, 0),
- MTK_PIN_DRV_GRP(204, DRV_SEL8, 4, 0),
- MTK_PIN_DRV_GRP(205, DRV_SEL8, 4, 0),
- MTK_PIN_DRV_GRP(206, DRV_SEL8, 4, 0),
- MTK_PIN_DRV_GRP(207, DRV_SEL8, 4, 0),
- MTK_PIN_DRV_GRP(208, DRV_SEL8, 8, 0),
- MTK_PIN_DRV_GRP(209, DRV_SEL8, 8, 0),
- MTK_PIN_DRV_GRP(236, DRV_SEL9, 4, 0),
- MTK_PIN_DRV_GRP(237, DRV_SEL9, 4, 0),
- MTK_PIN_DRV_GRP(238, DRV_SEL9, 4, 0),
- MTK_PIN_DRV_GRP(239, DRV_SEL9, 4, 0),
- MTK_PIN_DRV_GRP(240, DRV_SEL9, 4, 0),
- MTK_PIN_DRV_GRP(241, DRV_SEL9, 4, 0),
- MTK_PIN_DRV_GRP(242, DRV_SEL9, 8, 0),
- MTK_PIN_DRV_GRP(243, DRV_SEL9, 8, 0),
- MTK_PIN_DRV_GRP(257, MSDC0_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(261, MSDC1_CTRL2, 0, 1),
- MTK_PIN_DRV_GRP(262, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(263, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(264, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(265, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(266, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(267, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(268, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(269, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(270, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(271, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(272, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(274, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(275, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(276, DRV_SEL10, 8, 0),
- MTK_PIN_DRV_GRP(278, DRV_SEL2, 8, 1),
-};
-
-static const struct mtk_pin_spec_pupd_set_samereg mt7623_spec_pupd[] = {
- MTK_PIN_PUPD_SPEC_SR(105, MSDC1_CTRL1, 8, 9, 10),
- MTK_PIN_PUPD_SPEC_SR(106, MSDC1_CTRL0, 8, 9, 10),
- MTK_PIN_PUPD_SPEC_SR(107, MSDC1_CTRL3, 0, 1, 2),
- MTK_PIN_PUPD_SPEC_SR(108, MSDC1_CTRL3, 4, 5, 6),
- MTK_PIN_PUPD_SPEC_SR(109, MSDC1_CTRL3, 8, 9, 10),
- MTK_PIN_PUPD_SPEC_SR(110, MSDC1_CTRL3, 12, 13, 14),
- MTK_PIN_PUPD_SPEC_SR(111, MSDC0_CTRL4, 12, 13, 14),
- MTK_PIN_PUPD_SPEC_SR(112, MSDC0_CTRL4, 8, 9, 10),
- MTK_PIN_PUPD_SPEC_SR(113, MSDC0_CTRL4, 4, 5, 6),
- MTK_PIN_PUPD_SPEC_SR(114, MSDC0_CTRL4, 0, 1, 2),
- MTK_PIN_PUPD_SPEC_SR(115, MSDC0_CTRL5, 0, 1, 2),
- MTK_PIN_PUPD_SPEC_SR(116, MSDC0_CTRL1, 8, 9, 10),
- MTK_PIN_PUPD_SPEC_SR(117, MSDC0_CTRL0, 8, 9, 10),
- MTK_PIN_PUPD_SPEC_SR(118, MSDC0_CTRL3, 12, 13, 14),
- MTK_PIN_PUPD_SPEC_SR(119, MSDC0_CTRL3, 8, 9, 10),
- MTK_PIN_PUPD_SPEC_SR(120, MSDC0_CTRL3, 4, 5, 6),
- MTK_PIN_PUPD_SPEC_SR(121, MSDC0_CTRL3, 0, 1, 2),
-};
-
-static int mt7623_spec_pull_set(struct regmap *regmap, unsigned int pin,
- unsigned char align, bool isup, unsigned int r1r0)
-{
- return mtk_pctrl_spec_pull_set_samereg(regmap, mt7623_spec_pupd,
- ARRAY_SIZE(mt7623_spec_pupd), pin, align, isup, r1r0);
-}
-
-static const struct mtk_pin_ies_smt_set mt7623_ies_set[] = {
- MTK_PIN_IES_SMT_SPEC(0, 6, IES_EN0, 0),
- MTK_PIN_IES_SMT_SPEC(7, 9, IES_EN0, 1),
- MTK_PIN_IES_SMT_SPEC(10, 13, IES_EN0, 2),
- MTK_PIN_IES_SMT_SPEC(14, 15, IES_EN0, 3),
- MTK_PIN_IES_SMT_SPEC(18, 21, IES_EN0, 5),
- MTK_PIN_IES_SMT_SPEC(22, 26, IES_EN0, 6),
- MTK_PIN_IES_SMT_SPEC(27, 29, IES_EN0, 7),
- MTK_PIN_IES_SMT_SPEC(33, 37, IES_EN0, 8),
- MTK_PIN_IES_SMT_SPEC(39, 42, IES_EN0, 9),
- MTK_PIN_IES_SMT_SPEC(43, 45, IES_EN0, 10),
- MTK_PIN_IES_SMT_SPEC(47, 48, IES_EN0, 11),
- MTK_PIN_IES_SMT_SPEC(49, 49, IES_EN0, 12),
- MTK_PIN_IES_SMT_SPEC(53, 56, IES_EN0, 14),
- MTK_PIN_IES_SMT_SPEC(60, 62, IES_EN1, 0),
- MTK_PIN_IES_SMT_SPEC(63, 65, IES_EN1, 1),
- MTK_PIN_IES_SMT_SPEC(66, 71, IES_EN1, 2),
- MTK_PIN_IES_SMT_SPEC(72, 74, IES_EN0, 12),
- MTK_PIN_IES_SMT_SPEC(75, 76, IES_EN1, 3),
- MTK_PIN_IES_SMT_SPEC(83, 84, IES_EN1, 2),
- MTK_PIN_IES_SMT_SPEC(105, 121, MSDC1_CTRL1, 4),
- MTK_PIN_IES_SMT_SPEC(122, 125, IES_EN1, 7),
- MTK_PIN_IES_SMT_SPEC(126, 126, IES_EN0, 12),
- MTK_PIN_IES_SMT_SPEC(199, 201, IES_EN0, 1),
- MTK_PIN_IES_SMT_SPEC(203, 207, IES_EN2, 2),
- MTK_PIN_IES_SMT_SPEC(208, 209, IES_EN2, 3),
- MTK_PIN_IES_SMT_SPEC(236, 241, IES_EN2, 6),
- MTK_PIN_IES_SMT_SPEC(242, 243, IES_EN2, 7),
- MTK_PIN_IES_SMT_SPEC(261, 261, MSDC1_CTRL2, 4),
- MTK_PIN_IES_SMT_SPEC(262, 272, IES_EN2, 12),
- MTK_PIN_IES_SMT_SPEC(274, 276, IES_EN2, 12),
- MTK_PIN_IES_SMT_SPEC(278, 278, IES_EN2, 13),
-};
-
-static const struct mtk_pin_ies_smt_set mt7623_smt_set[] = {
- MTK_PIN_IES_SMT_SPEC(0, 6, SMT_EN0, 0),
- MTK_PIN_IES_SMT_SPEC(7, 9, SMT_EN0, 1),
- MTK_PIN_IES_SMT_SPEC(10, 13, SMT_EN0, 2),
- MTK_PIN_IES_SMT_SPEC(14, 15, SMT_EN0, 3),
- MTK_PIN_IES_SMT_SPEC(18, 21, SMT_EN0, 5),
- MTK_PIN_IES_SMT_SPEC(22, 26, SMT_EN0, 6),
- MTK_PIN_IES_SMT_SPEC(27, 29, SMT_EN0, 7),
- MTK_PIN_IES_SMT_SPEC(33, 37, SMT_EN0, 8),
- MTK_PIN_IES_SMT_SPEC(39, 42, SMT_EN0, 9),
- MTK_PIN_IES_SMT_SPEC(43, 45, SMT_EN0, 10),
- MTK_PIN_IES_SMT_SPEC(47, 48, SMT_EN0, 11),
- MTK_PIN_IES_SMT_SPEC(49, 49, SMT_EN0, 12),
- MTK_PIN_IES_SMT_SPEC(53, 56, SMT_EN0, 14),
- MTK_PIN_IES_SMT_SPEC(60, 62, SMT_EN1, 0),
- MTK_PIN_IES_SMT_SPEC(63, 65, SMT_EN1, 1),
- MTK_PIN_IES_SMT_SPEC(66, 71, SMT_EN1, 2),
- MTK_PIN_IES_SMT_SPEC(72, 74, SMT_EN0, 12),
- MTK_PIN_IES_SMT_SPEC(75, 76, SMT_EN1, 3),
- MTK_PIN_IES_SMT_SPEC(83, 84, SMT_EN1, 2),
- MTK_PIN_IES_SMT_SPEC(105, 106, MSDC1_CTRL1, 11),
- MTK_PIN_IES_SMT_SPEC(107, 107, MSDC1_CTRL3, 3),
- MTK_PIN_IES_SMT_SPEC(108, 108, MSDC1_CTRL3, 7),
- MTK_PIN_IES_SMT_SPEC(109, 109, MSDC1_CTRL3, 11),
- MTK_PIN_IES_SMT_SPEC(110, 111, MSDC1_CTRL3, 15),
- MTK_PIN_IES_SMT_SPEC(112, 112, MSDC0_CTRL4, 11),
- MTK_PIN_IES_SMT_SPEC(113, 113, MSDC0_CTRL4, 7),
- MTK_PIN_IES_SMT_SPEC(114, 115, MSDC0_CTRL4, 3),
- MTK_PIN_IES_SMT_SPEC(116, 117, MSDC0_CTRL1, 11),
- MTK_PIN_IES_SMT_SPEC(118, 118, MSDC0_CTRL3, 15),
- MTK_PIN_IES_SMT_SPEC(119, 119, MSDC0_CTRL3, 11),
- MTK_PIN_IES_SMT_SPEC(120, 120, MSDC0_CTRL3, 7),
- MTK_PIN_IES_SMT_SPEC(121, 121, MSDC0_CTRL3, 3),
- MTK_PIN_IES_SMT_SPEC(122, 125, SMT_EN1, 7),
- MTK_PIN_IES_SMT_SPEC(126, 126, SMT_EN0, 12),
- MTK_PIN_IES_SMT_SPEC(199, 201, SMT_EN0, 1),
- MTK_PIN_IES_SMT_SPEC(203, 207, SMT_EN2, 2),
- MTK_PIN_IES_SMT_SPEC(208, 209, SMT_EN2, 3),
- MTK_PIN_IES_SMT_SPEC(236, 241, SMT_EN2, 6),
- MTK_PIN_IES_SMT_SPEC(242, 243, SMT_EN2, 7),
- MTK_PIN_IES_SMT_SPEC(261, 261, MSDC1_CTRL6, 3),
- MTK_PIN_IES_SMT_SPEC(262, 272, SMT_EN2, 12),
- MTK_PIN_IES_SMT_SPEC(274, 276, SMT_EN2, 12),
- MTK_PIN_IES_SMT_SPEC(278, 278, SMT_EN2, 13),
-};
-
-static int mt7623_ies_smt_set(struct regmap *regmap, unsigned int pin,
- unsigned char align, int value, enum pin_config_param arg)
-{
- if (arg == PIN_CONFIG_INPUT_ENABLE)
- return mtk_pconf_spec_set_ies_smt_range(regmap, mt7623_ies_set,
- ARRAY_SIZE(mt7623_ies_set), pin, align, value);
- else if (arg == PIN_CONFIG_INPUT_SCHMITT_ENABLE)
- return mtk_pconf_spec_set_ies_smt_range(regmap, mt7623_smt_set,
- ARRAY_SIZE(mt7623_smt_set), pin, align, value);
- return -EINVAL;
-}
-
-static const struct mtk_pinctrl_devdata mt7623_pinctrl_data = {
- .pins = mtk_pins_mt7623,
- .npins = ARRAY_SIZE(mtk_pins_mt7623),
- .grp_desc = mt7623_drv_grp,
- .n_grp_cls = ARRAY_SIZE(mt7623_drv_grp),
- .pin_drv_grp = mt7623_pin_drv,
- .n_pin_drv_grps = ARRAY_SIZE(mt7623_pin_drv),
- .spec_pull_set = mt7623_spec_pull_set,
- .spec_ies_smt_set = mt7623_ies_smt_set,
- .dir_offset = 0x0000,
- .pullen_offset = 0x0150,
- .pullsel_offset = 0x0280,
- .dout_offset = 0x0500,
- .din_offset = 0x0630,
- .pinmux_offset = 0x0760,
- .type1_start = 280,
- .type1_end = 280,
- .port_shf = 4,
- .port_mask = 0x1f,
- .port_align = 4,
- .eint_offsets = {
- .name = "mt7623_eint",
- .stat = 0x000,
- .ack = 0x040,
- .mask = 0x080,
- .mask_set = 0x0c0,
- .mask_clr = 0x100,
- .sens = 0x140,
- .sens_set = 0x180,
- .sens_clr = 0x1c0,
- .soft = 0x200,
- .soft_set = 0x240,
- .soft_clr = 0x280,
- .pol = 0x300,
- .pol_set = 0x340,
- .pol_clr = 0x380,
- .dom_en = 0x400,
- .dbnc_ctrl = 0x500,
- .dbnc_set = 0x600,
- .dbnc_clr = 0x700,
- .port_mask = 6,
- .ports = 6,
- },
- .ap_num = 169,
- .db_cnt = 16,
-};
-
-static int mt7623_pinctrl_probe(struct platform_device *pdev)
-{
- return mtk_pctrl_init(pdev, &mt7623_pinctrl_data, NULL);
-}
-
-static const struct of_device_id mt7623_pctrl_match[] = {
- { .compatible = "mediatek,mt7623-pinctrl", },
- {}
-};
-MODULE_DEVICE_TABLE(of, mt7623_pctrl_match);
-
-static struct platform_driver mtk_pinctrl_driver = {
- .probe = mt7623_pinctrl_probe,
- .driver = {
- .name = "mediatek-mt7623-pinctrl",
- .of_match_table = mt7623_pctrl_match,
- },
-};
-
-static int __init mtk_pinctrl_init(void)
-{
- return platform_driver_register(&mtk_pinctrl_driver);
-}
-
-arch_initcall(mtk_pinctrl_init);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h b/drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h
deleted file mode 100644
index e06cfc4..0000000
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-mt7623.h
+++ /dev/null
@@ -1,1936 +0,0 @@
-/*
- * Copyright (c) 2016 John Crispin <[email protected]>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __PINCTRL_MTK_MT7623_H
-#define __PINCTRL_MTK_MT7623_H
-
-#include <linux/pinctrl/pinctrl.h>
-#include "pinctrl-mtk-common.h"
-
-static const struct mtk_desc_pin mtk_pins_mt7623[] = {
- MTK_PIN(
- PINCTRL_PIN(0, "PWRAP_SPI0_MI"),
- "J20", "mt7623",
- MTK_EINT_FUNCTION(0, 148),
- MTK_FUNCTION(0, "GPIO0"),
- MTK_FUNCTION(1, "PWRAP_SPIDO"),
- MTK_FUNCTION(2, "PWRAP_SPIDI")
- ),
- MTK_PIN(
- PINCTRL_PIN(1, "PWRAP_SPI0_MO"),
- "D10", "mt7623",
- MTK_EINT_FUNCTION(0, 149),
- MTK_FUNCTION(0, "GPIO1"),
- MTK_FUNCTION(1, "PWRAP_SPIDI"),
- MTK_FUNCTION(2, "PWRAP_SPIDO")
- ),
- MTK_PIN(
- PINCTRL_PIN(2, "PWRAP_INT"),
- "E11", "mt7623",
- MTK_EINT_FUNCTION(0, 150),
- MTK_FUNCTION(0, "GPIO2"),
- MTK_FUNCTION(1, "PWRAP_INT")
- ),
- MTK_PIN(
- PINCTRL_PIN(3, "PWRAP_SPI0_CK"),
- "H12", "mt7623",
- MTK_EINT_FUNCTION(0, 151),
- MTK_FUNCTION(0, "GPIO3"),
- MTK_FUNCTION(1, "PWRAP_SPICK_I")
- ),
- MTK_PIN(
- PINCTRL_PIN(4, "PWRAP_SPI0_CSN"),
- "E12", "mt7623",
- MTK_EINT_FUNCTION(0, 152),
- MTK_FUNCTION(0, "GPIO4"),
- MTK_FUNCTION(1, "PWRAP_SPICS_B_I")
- ),
- MTK_PIN(
- PINCTRL_PIN(5, "PWRAP_SPI0_CK2"),
- "H11", "mt7623",
- MTK_EINT_FUNCTION(0, 155),
- MTK_FUNCTION(0, "GPIO5"),
- MTK_FUNCTION(1, "PWRAP_SPICK2_I")
- ),
- MTK_PIN(
- PINCTRL_PIN(6, "PWRAP_SPI0_CSN2"),
- "G11", "mt7623",
- MTK_EINT_FUNCTION(0, 156),
- MTK_FUNCTION(0, "GPIO6"),
- MTK_FUNCTION(1, "PWRAP_SPICS2_B_I")
- ),
- MTK_PIN(
- PINCTRL_PIN(7, "SPI1_CSN"),
- "G19", "mt7623",
- MTK_EINT_FUNCTION(0, 153),
- MTK_FUNCTION(0, "GPIO7"),
- MTK_FUNCTION(1, "SPI1_CS")
- ),
- MTK_PIN(
- PINCTRL_PIN(8, "SPI1_MI"),
- "F19", "mt7623",
- MTK_EINT_FUNCTION(0, 154),
- MTK_FUNCTION(0, "GPIO8"),
- MTK_FUNCTION(1, "SPI1_MI"),
- MTK_FUNCTION(2, "SPI1_MO")
- ),
- MTK_PIN(
- PINCTRL_PIN(9, "SPI1_MO"),
- "G20", "mt7623",
- MTK_EINT_FUNCTION(0, 157),
- MTK_FUNCTION(0, "GPIO9"),
- MTK_FUNCTION(1, "SPI1_MO"),
- MTK_FUNCTION(2, "SPI1_MI")
- ),
- MTK_PIN(
- PINCTRL_PIN(10, "RTC32K_CK"),
- "A13", "mt7623",
- MTK_EINT_FUNCTION(0, 158),
- MTK_FUNCTION(0, "GPIO10"),
- MTK_FUNCTION(1, "RTC32K_CK")
- ),
- MTK_PIN(
- PINCTRL_PIN(11, "WATCHDOG"),
- "D14", "mt7623",
- MTK_EINT_FUNCTION(0, 159),
- MTK_FUNCTION(0, "GPIO11"),
- MTK_FUNCTION(1, "WATCHDOG")
- ),
- MTK_PIN(
- PINCTRL_PIN(12, "SRCLKENA"),
- "C13", "mt7623",
- MTK_EINT_FUNCTION(0, 169),
- MTK_FUNCTION(0, "GPIO12"),
- MTK_FUNCTION(1, "SRCLKENA")
- ),
- MTK_PIN(
- PINCTRL_PIN(13, "SRCLKENAI"),
- "B13", "mt7623",
- MTK_EINT_FUNCTION(0, 161),
- MTK_FUNCTION(0, "GPIO13"),
- MTK_FUNCTION(1, "SRCLKENAI")
- ),
- MTK_PIN(
- PINCTRL_PIN(14, "GPIO14"),
- "E18", "mt7623",
- MTK_EINT_FUNCTION(0, 162),
- MTK_FUNCTION(0, "GPIO14"),
- MTK_FUNCTION(1, "URXD2"),
- MTK_FUNCTION(2, "UTXD2")
- ),
- MTK_PIN(
- PINCTRL_PIN(15, "GPIO15"),
- "E17", "mt7623",
- MTK_EINT_FUNCTION(0, 163),
- MTK_FUNCTION(0, "GPIO15"),
- MTK_FUNCTION(1, "UTXD2"),
- MTK_FUNCTION(2, "URXD2")
- ),
- MTK_PIN(
- PINCTRL_PIN(16, "GPIO16"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO16")
- ),
- MTK_PIN(
- PINCTRL_PIN(17, "GPIO17"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO17")
- ),
- MTK_PIN(
- PINCTRL_PIN(18, "PCM_CLK"),
- "C19", "mt7623",
- MTK_EINT_FUNCTION(0, 166),
- MTK_FUNCTION(0, "GPIO18"),
- MTK_FUNCTION(1, "PCM_CLK0"),
- MTK_FUNCTION(6, "AP_PCM_CLKO")
- ),
- MTK_PIN(
- PINCTRL_PIN(19, "PCM_SYNC"),
- "D19", "mt7623",
- MTK_EINT_FUNCTION(0, 167),
- MTK_FUNCTION(0, "GPIO19"),
- MTK_FUNCTION(1, "PCM_SYNC"),
- MTK_FUNCTION(6, "AP_PCM_SYNC")
- ),
- MTK_PIN(
- PINCTRL_PIN(20, "PCM_RX"),
- "D18", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO20"),
- MTK_FUNCTION(1, "PCM_RX"),
- MTK_FUNCTION(4, "PCM_TX"),
- MTK_FUNCTION(6, "AP_PCM_RX")
- ),
- MTK_PIN(
- PINCTRL_PIN(21, "PCM_TX"),
- "C18", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO21"),
- MTK_FUNCTION(1, "PCM_TX"),
- MTK_FUNCTION(4, "PCM_RX"),
- MTK_FUNCTION(6, "AP_PCM_TX")
- ),
- MTK_PIN(
- PINCTRL_PIN(22, "EINT0"),
- "H15", "mt7623",
- MTK_EINT_FUNCTION(0, 0),
- MTK_FUNCTION(0, "GPIO22"),
- MTK_FUNCTION(1, "UCTS0"),
- MTK_FUNCTION(2, "PCIE0_PERST_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(23, "EINT1"),
- "J16", "mt7623",
- MTK_EINT_FUNCTION(0, 1),
- MTK_FUNCTION(0, "GPIO23"),
- MTK_FUNCTION(1, "URTS0"),
- MTK_FUNCTION(2, "PCIE1_PERST_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(24, "EINT2"),
- "H16", "mt7623",
- MTK_EINT_FUNCTION(0, 2),
- MTK_FUNCTION(0, "GPIO24"),
- MTK_FUNCTION(1, "UCTS1"),
- MTK_FUNCTION(2, "PCIE2_PERST_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(25, "EINT3"),
- "K15", "mt7623",
- MTK_EINT_FUNCTION(0, 3),
- MTK_FUNCTION(0, "GPIO25"),
- MTK_FUNCTION(1, "URTS1")
- ),
- MTK_PIN(
- PINCTRL_PIN(26, "EINT4"),
- "G15", "mt7623",
- MTK_EINT_FUNCTION(0, 4),
- MTK_FUNCTION(0, "GPIO26"),
- MTK_FUNCTION(1, "UCTS3"),
- MTK_FUNCTION(6, "PCIE2_WAKE_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(27, "EINT5"),
- "F15", "mt7623",
- MTK_EINT_FUNCTION(0, 5),
- MTK_FUNCTION(0, "GPIO27"),
- MTK_FUNCTION(1, "URTS3"),
- MTK_FUNCTION(6, "PCIE1_WAKE_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(28, "EINT6"),
- "J15", "mt7623",
- MTK_EINT_FUNCTION(0, 6),
- MTK_FUNCTION(0, "GPIO28"),
- MTK_FUNCTION(1, "DRV_VBUS"),
- MTK_FUNCTION(6, "PCIE0_WAKE_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(29, "EINT7"),
- "E15", "mt7623",
- MTK_EINT_FUNCTION(0, 7),
- MTK_FUNCTION(0, "GPIO29"),
- MTK_FUNCTION(1, "IDDIG"),
- MTK_FUNCTION(2, "MSDC1_WP"),
- MTK_FUNCTION(6, "PCIE2_PERST_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(30, "GPIO30"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO30")
- ),
- MTK_PIN(
- PINCTRL_PIN(31, "GPIO31"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO31")
- ),
- MTK_PIN(
- PINCTRL_PIN(32, "GPIO32"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO32")
- ),
- MTK_PIN(
- PINCTRL_PIN(33, "I2S1_DATA"),
- "Y18", "mt7623",
- MTK_EINT_FUNCTION(0, 15),
- MTK_FUNCTION(0, "GPIO33"),
- MTK_FUNCTION(1, "I2S1_DATA"),
- MTK_FUNCTION(3, "PCM_TX"),
- MTK_FUNCTION(6, "AP_PCM_TX")
- ),
- MTK_PIN(
- PINCTRL_PIN(34, "I2S1_DATA_IN"),
- "Y17", "mt7623",
- MTK_EINT_FUNCTION(0, 16),
- MTK_FUNCTION(0, "GPIO34"),
- MTK_FUNCTION(1, "I2S1_DATA_IN"),
- MTK_FUNCTION(3, "PCM_RX"),
- MTK_FUNCTION(6, "AP_PCM_RX")
- ),
- MTK_PIN(
- PINCTRL_PIN(35, "I2S1_BCK"),
- "V17", "mt7623",
- MTK_EINT_FUNCTION(0, 17),
- MTK_FUNCTION(0, "GPIO35"),
- MTK_FUNCTION(1, "I2S1_BCK"),
- MTK_FUNCTION(3, "PCM_CLK0"),
- MTK_FUNCTION(6, "AP_PCM_CLKO")
- ),
- MTK_PIN(
- PINCTRL_PIN(36, "I2S1_LRCK"),
- "W17", "mt7623",
- MTK_EINT_FUNCTION(0, 18),
- MTK_FUNCTION(0, "GPIO36"),
- MTK_FUNCTION(1, "I2S1_LRCK"),
- MTK_FUNCTION(3, "PCM_SYNC"),
- MTK_FUNCTION(6, "AP_PCM_SYNC")
- ),
- MTK_PIN(
- PINCTRL_PIN(37, "I2S1_MCLK"),
- "AA18", "mt7623",
- MTK_EINT_FUNCTION(0, 19),
- MTK_FUNCTION(0, "GPIO37"),
- MTK_FUNCTION(1, "I2S1_MCLK")
- ),
- MTK_PIN(
- PINCTRL_PIN(38, "GPIO38"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO38")
- ),
- MTK_PIN(
- PINCTRL_PIN(39, "JTMS"),
- "G21", "mt7623",
- MTK_EINT_FUNCTION(0, 21),
- MTK_FUNCTION(0, "GPIO39"),
- MTK_FUNCTION(1, "JTMS")
- ),
- MTK_PIN(
- PINCTRL_PIN(40, "GPIO40"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO40")
- ),
- MTK_PIN(
- PINCTRL_PIN(41, "JTDI"),
- "H22", "mt7623",
- MTK_EINT_FUNCTION(0, 23),
- MTK_FUNCTION(0, "GPIO41"),
- MTK_FUNCTION(1, "JTDI")
- ),
- MTK_PIN(
- PINCTRL_PIN(42, "JTDO"),
- "H21", "mt7623",
- MTK_EINT_FUNCTION(0, 24),
- MTK_FUNCTION(0, "GPIO42"),
- MTK_FUNCTION(1, "JTDO")
- ),
- MTK_PIN(
- PINCTRL_PIN(43, "NCLE"),
- "C7", "mt7623",
- MTK_EINT_FUNCTION(0, 25),
- MTK_FUNCTION(0, "GPIO43"),
- MTK_FUNCTION(1, "NCLE"),
- MTK_FUNCTION(2, "EXT_XCS2")
- ),
- MTK_PIN(
- PINCTRL_PIN(44, "NCEB1"),
- "C6", "mt7623",
- MTK_EINT_FUNCTION(0, 26),
- MTK_FUNCTION(0, "GPIO44"),
- MTK_FUNCTION(1, "NCEB1"),
- MTK_FUNCTION(2, "IDDIG")
- ),
- MTK_PIN(
- PINCTRL_PIN(45, "NCEB0"),
- "D7", "mt7623",
- MTK_EINT_FUNCTION(0, 27),
- MTK_FUNCTION(0, "GPIO45"),
- MTK_FUNCTION(1, "NCEB0"),
- MTK_FUNCTION(2, "DRV_VBUS")
- ),
- MTK_PIN(
- PINCTRL_PIN(46, "IR"),
- "D15", "mt7623",
- MTK_EINT_FUNCTION(0, 28),
- MTK_FUNCTION(0, "GPIO46"),
- MTK_FUNCTION(1, "IR")
- ),
- MTK_PIN(
- PINCTRL_PIN(47, "NREB"),
- "A6", "mt7623",
- MTK_EINT_FUNCTION(0, 29),
- MTK_FUNCTION(0, "GPIO47"),
- MTK_FUNCTION(1, "NREB")
- ),
- MTK_PIN(
- PINCTRL_PIN(48, "NRNB"),
- "B6", "mt7623",
- MTK_EINT_FUNCTION(0, 30),
- MTK_FUNCTION(0, "GPIO48"),
- MTK_FUNCTION(1, "NRNB")
- ),
- MTK_PIN(
- PINCTRL_PIN(49, "I2S0_DATA"),
- "AB18", "mt7623",
- MTK_EINT_FUNCTION(0, 31),
- MTK_FUNCTION(0, "GPIO49"),
- MTK_FUNCTION(1, "I2S0_DATA"),
- MTK_FUNCTION(3, "PCM_TX"),
- MTK_FUNCTION(6, "AP_I2S_DO")
- ),
- MTK_PIN(
- PINCTRL_PIN(50, "GPIO50"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO50")
- ),
- MTK_PIN(
- PINCTRL_PIN(51, "GPIO51"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO51")
- ),
- MTK_PIN(
- PINCTRL_PIN(52, "GPIO52"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO52")
- ),
- MTK_PIN(
- PINCTRL_PIN(53, "SPI0_CSN"),
- "E7", "mt7623",
- MTK_EINT_FUNCTION(0, 35),
- MTK_FUNCTION(0, "GPIO53"),
- MTK_FUNCTION(1, "SPI0_CS"),
- MTK_FUNCTION(5, "PWM1")
- ),
- MTK_PIN(
- PINCTRL_PIN(54, "SPI0_CK"),
- "F7", "mt7623",
- MTK_EINT_FUNCTION(0, 36),
- MTK_FUNCTION(0, "GPIO54"),
- MTK_FUNCTION(1, "SPI0_CK")
- ),
- MTK_PIN(
- PINCTRL_PIN(55, "SPI0_MI"),
- "E6", "mt7623",
- MTK_EINT_FUNCTION(0, 37),
- MTK_FUNCTION(0, "GPIO55"),
- MTK_FUNCTION(1, "SPI0_MI"),
- MTK_FUNCTION(2, "SPI0_MO"),
- MTK_FUNCTION(3, "MSDC1_WP"),
- MTK_FUNCTION(5, "PWM2")
- ),
- MTK_PIN(
- PINCTRL_PIN(56, "SPI0_MO"),
- "G7", "mt7623",
- MTK_EINT_FUNCTION(0, 38),
- MTK_FUNCTION(0, "GPIO56"),
- MTK_FUNCTION(1, "SPI0_MO"),
- MTK_FUNCTION(2, "SPI0_MI")
- ),
- MTK_PIN(
- PINCTRL_PIN(57, "GPIO57"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO57")
- ),
- MTK_PIN(
- PINCTRL_PIN(58, "GPIO58"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO58")
- ),
- MTK_PIN(
- PINCTRL_PIN(59, "GPIO59"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO59")
- ),
- MTK_PIN(
- PINCTRL_PIN(60, "WB_RSTB"),
- "Y21", "mt7623",
- MTK_EINT_FUNCTION(0, 41),
- MTK_FUNCTION(0, "GPIO60"),
- MTK_FUNCTION(1, "WB_RSTB")
- ),
- MTK_PIN(
- PINCTRL_PIN(61, "GPIO61"),
- "AA21", "mt7623",
- MTK_EINT_FUNCTION(0, 42),
- MTK_FUNCTION(0, "GPIO61"),
- MTK_FUNCTION(1, "TEST_FD")
- ),
- MTK_PIN(
- PINCTRL_PIN(62, "GPIO62"),
- "AB22", "mt7623",
- MTK_EINT_FUNCTION(0, 43),
- MTK_FUNCTION(0, "GPIO62"),
- MTK_FUNCTION(1, "TEST_FC")
- ),
- MTK_PIN(
- PINCTRL_PIN(63, "WB_SCLK"),
- "AC23", "mt7623",
- MTK_EINT_FUNCTION(0, 44),
- MTK_FUNCTION(0, "GPIO63"),
- MTK_FUNCTION(1, "WB_SCLK")
- ),
- MTK_PIN(
- PINCTRL_PIN(64, "WB_SDATA"),
- "AB21", "mt7623",
- MTK_EINT_FUNCTION(0, 45),
- MTK_FUNCTION(0, "GPIO64"),
- MTK_FUNCTION(1, "WB_SDATA")
- ),
- MTK_PIN(
- PINCTRL_PIN(65, "WB_SEN"),
- "AB24", "mt7623",
- MTK_EINT_FUNCTION(0, 46),
- MTK_FUNCTION(0, "GPIO65"),
- MTK_FUNCTION(1, "WB_SEN")
- ),
- MTK_PIN(
- PINCTRL_PIN(66, "WB_CRTL0"),
- "AB20", "mt7623",
- MTK_EINT_FUNCTION(0, 47),
- MTK_FUNCTION(0, "GPIO66"),
- MTK_FUNCTION(1, "WB_CRTL0")
- ),
- MTK_PIN(
- PINCTRL_PIN(67, "WB_CRTL1"),
- "AC20", "mt7623",
- MTK_EINT_FUNCTION(0, 48),
- MTK_FUNCTION(0, "GPIO67"),
- MTK_FUNCTION(1, "WB_CRTL1")
- ),
- MTK_PIN(
- PINCTRL_PIN(68, "WB_CRTL2"),
- "AB19", "mt7623",
- MTK_EINT_FUNCTION(0, 49),
- MTK_FUNCTION(0, "GPIO68"),
- MTK_FUNCTION(1, "WB_CRTL2")
- ),
- MTK_PIN(
- PINCTRL_PIN(69, "WB_CRTL3"),
- "AC19", "mt7623",
- MTK_EINT_FUNCTION(0, 50),
- MTK_FUNCTION(0, "GPIO69"),
- MTK_FUNCTION(1, "WB_CRTL3")
- ),
- MTK_PIN(
- PINCTRL_PIN(70, "WB_CRTL4"),
- "AD19", "mt7623",
- MTK_EINT_FUNCTION(0, 51),
- MTK_FUNCTION(0, "GPIO70"),
- MTK_FUNCTION(1, "WB_CRTL4")
- ),
- MTK_PIN(
- PINCTRL_PIN(71, "WB_CRTL5"),
- "AE19", "mt7623",
- MTK_EINT_FUNCTION(0, 52),
- MTK_FUNCTION(0, "GPIO71"),
- MTK_FUNCTION(1, "WB_CRTL5")
- ),
- MTK_PIN(
- PINCTRL_PIN(72, "I2S0_DATA_IN"),
- "AA20", "mt7623",
- MTK_EINT_FUNCTION(0, 53),
- MTK_FUNCTION(0, "GPIO72"),
- MTK_FUNCTION(1, "I2S0_DATA_IN"),
- MTK_FUNCTION(3, "PCM_RX"),
- MTK_FUNCTION(4, "PWM0"),
- MTK_FUNCTION(5, "DISP_PWM"),
- MTK_FUNCTION(6, "AP_I2S_DI")
- ),
- MTK_PIN(
- PINCTRL_PIN(73, "I2S0_LRCK"),
- "Y20", "mt7623",
- MTK_EINT_FUNCTION(0, 54),
- MTK_FUNCTION(0, "GPIO73"),
- MTK_FUNCTION(1, "I2S0_LRCK"),
- MTK_FUNCTION(3, "PCM_SYNC"),
- MTK_FUNCTION(6, "AP_I2S_LRCK")
- ),
- MTK_PIN(
- PINCTRL_PIN(74, "I2S0_BCK"),
- "Y19", "mt7623",
- MTK_EINT_FUNCTION(0, 55),
- MTK_FUNCTION(0, "GPIO74"),
- MTK_FUNCTION(1, "I2S0_BCK"),
- MTK_FUNCTION(3, "PCM_CLK0"),
- MTK_FUNCTION(6, "AP_I2S_BCK")
- ),
- MTK_PIN(
- PINCTRL_PIN(75, "SDA0"),
- "K19", "mt7623",
- MTK_EINT_FUNCTION(0, 56),
- MTK_FUNCTION(0, "GPIO75"),
- MTK_FUNCTION(1, "SDA0")
- ),
- MTK_PIN(
- PINCTRL_PIN(76, "SCL0"),
- "K20", "mt7623",
- MTK_EINT_FUNCTION(0, 57),
- MTK_FUNCTION(0, "GPIO76"),
- MTK_FUNCTION(1, "SCL0")
- ),
- MTK_PIN(
- PINCTRL_PIN(77, "GPIO77"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO77")
- ),
- MTK_PIN(
- PINCTRL_PIN(78, "GPIO78"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO78")
- ),
- MTK_PIN(
- PINCTRL_PIN(79, "GPIO79"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO79")
- ),
- MTK_PIN(
- PINCTRL_PIN(80, "GPIO80"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO80")
- ),
- MTK_PIN(
- PINCTRL_PIN(81, "GPIO81"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO81")
- ),
- MTK_PIN(
- PINCTRL_PIN(82, "GPIO82"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO82")
- ),
- MTK_PIN(
- PINCTRL_PIN(83, "LCM_RST"),
- "V16", "mt7623",
- MTK_EINT_FUNCTION(0, 64),
- MTK_FUNCTION(0, "GPIO83"),
- MTK_FUNCTION(1, "LCM_RST")
- ),
- MTK_PIN(
- PINCTRL_PIN(84, "DSI_TE"),
- "V14", "mt7623",
- MTK_EINT_FUNCTION(0, 65),
- MTK_FUNCTION(0, "GPIO84"),
- MTK_FUNCTION(1, "DSI_TE")
- ),
- MTK_PIN(
- PINCTRL_PIN(85, "GPIO85"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO85")
- ),
- MTK_PIN(
- PINCTRL_PIN(86, "GPIO86"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO86")
- ),
- MTK_PIN(
- PINCTRL_PIN(87, "GPIO87"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO87")
- ),
- MTK_PIN(
- PINCTRL_PIN(88, "GPIO88"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO88")
- ),
- MTK_PIN(
- PINCTRL_PIN(89, "GPIO89"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO89")
- ),
- MTK_PIN(
- PINCTRL_PIN(90, "GPIO90"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO90")
- ),
- MTK_PIN(
- PINCTRL_PIN(91, "GPIO91"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO91")
- ),
- MTK_PIN(
- PINCTRL_PIN(92, "GPIO92"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO92")
- ),
- MTK_PIN(
- PINCTRL_PIN(93, "GPIO93"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO93")
- ),
- MTK_PIN(
- PINCTRL_PIN(94, "GPIO94"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO94")
- ),
- MTK_PIN(
- PINCTRL_PIN(95, "MIPI_TCN"),
- "AB14", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO95"),
- MTK_FUNCTION(1, "TCN")
- ),
- MTK_PIN(
- PINCTRL_PIN(96, "MIPI_TCP"),
- "AC14", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO96"),
- MTK_FUNCTION(1, "TCP")
- ),
- MTK_PIN(
- PINCTRL_PIN(97, "MIPI_TDN1"),
- "AE15", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO97"),
- MTK_FUNCTION(1, "TDN1")
- ),
- MTK_PIN(
- PINCTRL_PIN(98, "MIPI_TDP1"),
- "AD15", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO98"),
- MTK_FUNCTION(1, "TDP1")
- ),
- MTK_PIN(
- PINCTRL_PIN(99, "MIPI_TDN0"),
- "AB15", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO99"),
- MTK_FUNCTION(1, "TDN0")
- ),
- MTK_PIN(
- PINCTRL_PIN(100, "MIPI_TDP0"),
- "AC15", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO100"),
- MTK_FUNCTION(1, "TDP0")
- ),
- MTK_PIN(
- PINCTRL_PIN(101, "GPIO101"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO101")
- ),
- MTK_PIN(
- PINCTRL_PIN(102, "GPIO102"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO102")
- ),
- MTK_PIN(
- PINCTRL_PIN(103, "GPIO103"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO103")
- ),
- MTK_PIN(
- PINCTRL_PIN(104, "GPIO104"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO104")
- ),
- MTK_PIN(
- PINCTRL_PIN(105, "MSDC1_CMD"),
- "AD2", "mt7623",
- MTK_EINT_FUNCTION(0, 78),
- MTK_FUNCTION(0, "GPIO105"),
- MTK_FUNCTION(1, "MSDC1_CMD"),
- MTK_FUNCTION(3, "SDA1"),
- MTK_FUNCTION(6, "I2SOUT_BCK")
- ),
- MTK_PIN(
- PINCTRL_PIN(106, "MSDC1_CLK"),
- "AD3", "mt7623",
- MTK_EINT_FUNCTION(0, 79),
- MTK_FUNCTION(0, "GPIO106"),
- MTK_FUNCTION(1, "MSDC1_CLK"),
- MTK_FUNCTION(3, "SCL1"),
- MTK_FUNCTION(6, "I2SOUT_LRCK")
- ),
- MTK_PIN(
- PINCTRL_PIN(107, "MSDC1_DAT0"),
- "AE2", "mt7623",
- MTK_EINT_FUNCTION(0, 80),
- MTK_FUNCTION(0, "GPIO107"),
- MTK_FUNCTION(1, "MSDC1_DAT0"),
- MTK_FUNCTION(5, "UTXD0"),
- MTK_FUNCTION(6, "I2SOUT_DATA_OUT")
- ),
- MTK_PIN(
- PINCTRL_PIN(108, "MSDC1_DAT1"),
- "AC1", "mt7623",
- MTK_EINT_FUNCTION(0, 81),
- MTK_FUNCTION(0, "GPIO108"),
- MTK_FUNCTION(1, "MSDC1_DAT1"),
- MTK_FUNCTION(3, "PWM0"),
- MTK_FUNCTION(5, "URXD0"),
- MTK_FUNCTION(6, "PWM1")
- ),
- MTK_PIN(
- PINCTRL_PIN(109, "MSDC1_DAT2"),
- "AC3", "mt7623",
- MTK_EINT_FUNCTION(0, 82),
- MTK_FUNCTION(0, "GPIO109"),
- MTK_FUNCTION(1, "MSDC1_DAT2"),
- MTK_FUNCTION(3, "SDA2"),
- MTK_FUNCTION(5, "UTXD1"),
- MTK_FUNCTION(6, "PWM2")
- ),
- MTK_PIN(
- PINCTRL_PIN(110, "MSDC1_DAT3"),
- "AC4", "mt7623",
- MTK_EINT_FUNCTION(0, 83),
- MTK_FUNCTION(0, "GPIO110"),
- MTK_FUNCTION(1, "MSDC1_DAT3"),
- MTK_FUNCTION(3, "SCL2"),
- MTK_FUNCTION(5, "URXD1"),
- MTK_FUNCTION(6, "PWM3")
- ),
- MTK_PIN(
- PINCTRL_PIN(111, "MSDC0_DAT7"),
- "A2", "mt7623",
- MTK_EINT_FUNCTION(0, 84),
- MTK_FUNCTION(0, "GPIO111"),
- MTK_FUNCTION(1, "MSDC0_DAT7"),
- MTK_FUNCTION(4, "NLD7")
- ),
- MTK_PIN(
- PINCTRL_PIN(112, "MSDC0_DAT6"),
- "B3", "mt7623",
- MTK_EINT_FUNCTION(0, 85),
- MTK_FUNCTION(0, "GPIO112"),
- MTK_FUNCTION(1, "MSDC0_DAT6"),
- MTK_FUNCTION(4, "NLD6")
- ),
- MTK_PIN(
- PINCTRL_PIN(113, "MSDC0_DAT5"),
- "C4", "mt7623",
- MTK_EINT_FUNCTION(0, 86),
- MTK_FUNCTION(0, "GPIO113"),
- MTK_FUNCTION(1, "MSDC0_DAT5"),
- MTK_FUNCTION(4, "NLD5")
- ),
- MTK_PIN(
- PINCTRL_PIN(114, "MSDC0_DAT4"),
- "A4", "mt7623",
- MTK_EINT_FUNCTION(0, 87),
- MTK_FUNCTION(0, "GPIO114"),
- MTK_FUNCTION(1, "MSDC0_DAT4"),
- MTK_FUNCTION(4, "NLD4")
- ),
- MTK_PIN(
- PINCTRL_PIN(115, "MSDC0_RSTB"),
- "C5", "mt7623",
- MTK_EINT_FUNCTION(0, 88),
- MTK_FUNCTION(0, "GPIO115"),
- MTK_FUNCTION(1, "MSDC0_RSTB"),
- MTK_FUNCTION(4, "NLD8")
- ),
- MTK_PIN(
- PINCTRL_PIN(116, "MSDC0_CMD"),
- "D5", "mt7623",
- MTK_EINT_FUNCTION(0, 89),
- MTK_FUNCTION(0, "GPIO116"),
- MTK_FUNCTION(1, "MSDC0_CMD"),
- MTK_FUNCTION(4, "NALE")
- ),
- MTK_PIN(
- PINCTRL_PIN(117, "MSDC0_CLK"),
- "B1", "mt7623",
- MTK_EINT_FUNCTION(0, 90),
- MTK_FUNCTION(0, "GPIO117"),
- MTK_FUNCTION(1, "MSDC0_CLK"),
- MTK_FUNCTION(4, "NWEB")
- ),
- MTK_PIN(
- PINCTRL_PIN(118, "MSDC0_DAT3"),
- "D6", "mt7623",
- MTK_EINT_FUNCTION(0, 91),
- MTK_FUNCTION(0, "GPIO118"),
- MTK_FUNCTION(1, "MSDC0_DAT3"),
- MTK_FUNCTION(4, "NLD3")
- ),
- MTK_PIN(
- PINCTRL_PIN(119, "MSDC0_DAT2"),
- "B2", "mt7623",
- MTK_EINT_FUNCTION(0, 92),
- MTK_FUNCTION(0, "GPIO119"),
- MTK_FUNCTION(1, "MSDC0_DAT2"),
- MTK_FUNCTION(4, "NLD2")
- ),
- MTK_PIN(
- PINCTRL_PIN(120, "MSDC0_DAT1"),
- "A3", "mt7623",
- MTK_EINT_FUNCTION(0, 93),
- MTK_FUNCTION(0, "GPIO120"),
- MTK_FUNCTION(1, "MSDC0_DAT1"),
- MTK_FUNCTION(4, "NLD1")
- ),
- MTK_PIN(
- PINCTRL_PIN(121, "MSDC0_DAT0"),
- "B4", "mt7623",
- MTK_EINT_FUNCTION(0, 94),
- MTK_FUNCTION(0, "GPIO121"),
- MTK_FUNCTION(1, "MSDC0_DAT0"),
- MTK_FUNCTION(4, "NLD0"),
- MTK_FUNCTION(5, "WATCHDOG")
- ),
- MTK_PIN(
- PINCTRL_PIN(122, "GPIO122"),
- "H17", "mt7623",
- MTK_EINT_FUNCTION(0, 95),
- MTK_FUNCTION(0, "GPIO122"),
- MTK_FUNCTION(1, "TEST"),
- MTK_FUNCTION(4, "SDA2"),
- MTK_FUNCTION(5, "URXD0")
- ),
- MTK_PIN(
- PINCTRL_PIN(123, "GPIO123"),
- "F17", "mt7623",
- MTK_EINT_FUNCTION(0, 96),
- MTK_FUNCTION(0, "GPIO123"),
- MTK_FUNCTION(1, "TEST"),
- MTK_FUNCTION(4, "SCL2"),
- MTK_FUNCTION(5, "UTXD0")
- ),
- MTK_PIN(
- PINCTRL_PIN(124, "GPIO124"),
- "H18", "mt7623",
- MTK_EINT_FUNCTION(0, 97),
- MTK_FUNCTION(0, "GPIO124"),
- MTK_FUNCTION(1, "TEST"),
- MTK_FUNCTION(4, "SDA1"),
- MTK_FUNCTION(5, "PWM3")
- ),
- MTK_PIN(
- PINCTRL_PIN(125, "GPIO125"),
- "G17", "mt7623",
- MTK_EINT_FUNCTION(0, 98),
- MTK_FUNCTION(0, "GPIO125"),
- MTK_FUNCTION(1, "TEST"),
- MTK_FUNCTION(4, "SCL1"),
- MTK_FUNCTION(5, "PWM4")
- ),
- MTK_PIN(
- PINCTRL_PIN(126, "I2S0_MCLK"),
- "AA19", "mt7623",
- MTK_EINT_FUNCTION(0, 99),
- MTK_FUNCTION(0, "GPIO126"),
- MTK_FUNCTION(1, "I2S0_MCLK"),
- MTK_FUNCTION(6, "AP_I2S_MCLK")
- ),
- MTK_PIN(
- PINCTRL_PIN(127, "GPIO127"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO127")
- ),
- MTK_PIN(
- PINCTRL_PIN(128, "GPIO128"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO128")
- ),
- MTK_PIN(
- PINCTRL_PIN(129, "GPIO129"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO129")
- ),
- MTK_PIN(
- PINCTRL_PIN(130, "GPIO130"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO130")
- ),
- MTK_PIN(
- PINCTRL_PIN(131, "GPIO131"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO131")
- ),
- MTK_PIN(
- PINCTRL_PIN(132, "GPIO132"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO132")
- ),
- MTK_PIN(
- PINCTRL_PIN(133, "GPIO133"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO133")
- ),
- MTK_PIN(
- PINCTRL_PIN(134, "GPIO134"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO134")
- ),
- MTK_PIN(
- PINCTRL_PIN(135, "GPIO135"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO135")
- ),
- MTK_PIN(
- PINCTRL_PIN(136, "GPIO136"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO136")
- ),
- MTK_PIN(
- PINCTRL_PIN(137, "GPIO137"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO137")
- ),
- MTK_PIN(
- PINCTRL_PIN(138, "GPIO138"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO138")
- ),
- MTK_PIN(
- PINCTRL_PIN(139, "GPIO139"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO139")
- ),
- MTK_PIN(
- PINCTRL_PIN(140, "GPIO140"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO140")
- ),
- MTK_PIN(
- PINCTRL_PIN(141, "GPIO141"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO141")
- ),
- MTK_PIN(
- PINCTRL_PIN(142, "GPIO142"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO142")
- ),
- MTK_PIN(
- PINCTRL_PIN(143, "GPIO143"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO143")
- ),
- MTK_PIN(
- PINCTRL_PIN(144, "GPIO144"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO144")
- ),
- MTK_PIN(
- PINCTRL_PIN(145, "GPIO145"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO145")
- ),
- MTK_PIN(
- PINCTRL_PIN(146, "GPIO146"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO146")
- ),
- MTK_PIN(
- PINCTRL_PIN(147, "GPIO147"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO147")
- ),
- MTK_PIN(
- PINCTRL_PIN(148, "GPIO148"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO148")
- ),
- MTK_PIN(
- PINCTRL_PIN(149, "GPIO149"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO149")
- ),
- MTK_PIN(
- PINCTRL_PIN(150, "GPIO150"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO150")
- ),
- MTK_PIN(
- PINCTRL_PIN(151, "GPIO151"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO151")
- ),
- MTK_PIN(
- PINCTRL_PIN(152, "GPIO152"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO152")
- ),
- MTK_PIN(
- PINCTRL_PIN(153, "GPIO153"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO153")
- ),
- MTK_PIN(
- PINCTRL_PIN(154, "GPIO154"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO154")
- ),
- MTK_PIN(
- PINCTRL_PIN(155, "GPIO155"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO155")
- ),
- MTK_PIN(
- PINCTRL_PIN(156, "GPIO156"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO156")
- ),
- MTK_PIN(
- PINCTRL_PIN(157, "GPIO157"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO157")
- ),
- MTK_PIN(
- PINCTRL_PIN(158, "GPIO158"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO158")
- ),
- MTK_PIN(
- PINCTRL_PIN(159, "GPIO159"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO159")
- ),
- MTK_PIN(
- PINCTRL_PIN(160, "GPIO160"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO160")
- ),
- MTK_PIN(
- PINCTRL_PIN(161, "GPIO161"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO161")
- ),
- MTK_PIN(
- PINCTRL_PIN(162, "GPIO162"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO162")
- ),
- MTK_PIN(
- PINCTRL_PIN(163, "GPIO163"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO163")
- ),
- MTK_PIN(
- PINCTRL_PIN(164, "GPIO164"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO164")
- ),
- MTK_PIN(
- PINCTRL_PIN(165, "GPIO165"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO165")
- ),
- MTK_PIN(
- PINCTRL_PIN(166, "GPIO166"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO166")
- ),
- MTK_PIN(
- PINCTRL_PIN(167, "GPIO167"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO167")
- ),
- MTK_PIN(
- PINCTRL_PIN(168, "GPIO168"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO168")
- ),
- MTK_PIN(
- PINCTRL_PIN(169, "GPIO169"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO169")
- ),
- MTK_PIN(
- PINCTRL_PIN(170, "GPIO170"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO170")
- ),
- MTK_PIN(
- PINCTRL_PIN(171, "GPIO171"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO171")
- ),
- MTK_PIN(
- PINCTRL_PIN(172, "GPIO172"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO172")
- ),
- MTK_PIN(
- PINCTRL_PIN(173, "GPIO173"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO173")
- ),
- MTK_PIN(
- PINCTRL_PIN(174, "GPIO174"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO174")
- ),
- MTK_PIN(
- PINCTRL_PIN(175, "GPIO175"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO175")
- ),
- MTK_PIN(
- PINCTRL_PIN(176, "GPIO176"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO176")
- ),
- MTK_PIN(
- PINCTRL_PIN(177, "GPIO177"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO177")
- ),
- MTK_PIN(
- PINCTRL_PIN(178, "GPIO178"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO178")
- ),
- MTK_PIN(
- PINCTRL_PIN(179, "GPIO179"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO179")
- ),
- MTK_PIN(
- PINCTRL_PIN(180, "GPIO180"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO180")
- ),
- MTK_PIN(
- PINCTRL_PIN(181, "GPIO181"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO181")
- ),
- MTK_PIN(
- PINCTRL_PIN(182, "GPIO182"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO182")
- ),
- MTK_PIN(
- PINCTRL_PIN(183, "GPIO183"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO183")
- ),
- MTK_PIN(
- PINCTRL_PIN(184, "GPIO184"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO184")
- ),
- MTK_PIN(
- PINCTRL_PIN(185, "GPIO185"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO185")
- ),
- MTK_PIN(
- PINCTRL_PIN(186, "GPIO186"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO186")
- ),
- MTK_PIN(
- PINCTRL_PIN(187, "GPIO187"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO187")
- ),
- MTK_PIN(
- PINCTRL_PIN(188, "GPIO188"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO188")
- ),
- MTK_PIN(
- PINCTRL_PIN(189, "GPIO189"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO189")
- ),
- MTK_PIN(
- PINCTRL_PIN(190, "GPIO190"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO190")
- ),
- MTK_PIN(
- PINCTRL_PIN(191, "GPIO191"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO191")
- ),
- MTK_PIN(
- PINCTRL_PIN(192, "GPIO192"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO192")
- ),
- MTK_PIN(
- PINCTRL_PIN(193, "GPIO193"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO193")
- ),
- MTK_PIN(
- PINCTRL_PIN(194, "GPIO194"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO194")
- ),
- MTK_PIN(
- PINCTRL_PIN(195, "GPIO195"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO195")
- ),
- MTK_PIN(
- PINCTRL_PIN(196, "GPIO196"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO196")
- ),
- MTK_PIN(
- PINCTRL_PIN(197, "GPIO197"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO197")
- ),
- MTK_PIN(
- PINCTRL_PIN(198, "GPIO198"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO198")
- ),
- MTK_PIN(
- PINCTRL_PIN(199, "SPI1_CK"),
- "E19", "mt7623",
- MTK_EINT_FUNCTION(0, 111),
- MTK_FUNCTION(0, "GPIO199"),
- MTK_FUNCTION(1, "SPI1_CK")
- ),
- MTK_PIN(
- PINCTRL_PIN(200, "URXD2"),
- "K18", "mt7623",
- MTK_EINT_FUNCTION(0, 112),
- MTK_FUNCTION(0, "GPIO200"),
- MTK_FUNCTION(6, "URXD2")
- ),
- MTK_PIN(
- PINCTRL_PIN(201, "UTXD2"),
- "L18", "mt7623",
- MTK_EINT_FUNCTION(0, 113),
- MTK_FUNCTION(0, "GPIO201"),
- MTK_FUNCTION(6, "UTXD2")
- ),
- MTK_PIN(
- PINCTRL_PIN(202, "GPIO202"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO202")
- ),
- MTK_PIN(
- PINCTRL_PIN(203, "PWM0"),
- "AA16", "mt7623",
- MTK_EINT_FUNCTION(0, 115),
- MTK_FUNCTION(0, "GPIO203"),
- MTK_FUNCTION(1, "PWM0"),
- MTK_FUNCTION(2, "DISP_PWM")
- ),
- MTK_PIN(
- PINCTRL_PIN(204, "PWM1"),
- "Y16", "mt7623",
- MTK_EINT_FUNCTION(0, 116),
- MTK_FUNCTION(0, "GPIO204"),
- MTK_FUNCTION(1, "PWM1")
- ),
- MTK_PIN(
- PINCTRL_PIN(205, "PWM2"),
- "AA15", "mt7623",
- MTK_EINT_FUNCTION(0, 117),
- MTK_FUNCTION(0, "GPIO205"),
- MTK_FUNCTION(1, "PWM2")
- ),
- MTK_PIN(
- PINCTRL_PIN(206, "PWM3"),
- "AA17", "mt7623",
- MTK_EINT_FUNCTION(0, 118),
- MTK_FUNCTION(0, "GPIO206"),
- MTK_FUNCTION(1, "PWM3")
- ),
- MTK_PIN(
- PINCTRL_PIN(207, "PWM4"),
- "Y15", "mt7623",
- MTK_EINT_FUNCTION(0, 119),
- MTK_FUNCTION(0, "GPIO207"),
- MTK_FUNCTION(1, "PWM4")
- ),
- MTK_PIN(
- PINCTRL_PIN(208, "AUD_EXT_CK1"),
- "W14", "mt7623",
- MTK_EINT_FUNCTION(0, 120),
- MTK_FUNCTION(0, "GPIO208"),
- MTK_FUNCTION(1, "AUD_EXT_CK1"),
- MTK_FUNCTION(2, "PWM0"),
- MTK_FUNCTION(3, "PCIE0_PERST_N"),
- MTK_FUNCTION(5, "DISP_PWM")
- ),
- MTK_PIN(
- PINCTRL_PIN(209, "AUD_EXT_CK2"),
- "V15", "mt7623",
- MTK_EINT_FUNCTION(0, 121),
- MTK_FUNCTION(0, "GPIO209"),
- MTK_FUNCTION(1, "AUD_EXT_CK2"),
- MTK_FUNCTION(2, "MSDC1_WP"),
- MTK_FUNCTION(3, "PCIE1_PERST_N"),
- MTK_FUNCTION(5, "PWM1")
- ),
- MTK_PIN(
- PINCTRL_PIN(210, "GPIO210"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO210")
- ),
- MTK_PIN(
- PINCTRL_PIN(211, "GPIO211"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO211")
- ),
- MTK_PIN(
- PINCTRL_PIN(212, "GPIO212"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO212")
- ),
- MTK_PIN(
- PINCTRL_PIN(213, "GPIO213"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO213")
- ),
- MTK_PIN(
- PINCTRL_PIN(214, "GPIO214"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO214")
- ),
- MTK_PIN(
- PINCTRL_PIN(215, "GPIO215"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO215")
- ),
- MTK_PIN(
- PINCTRL_PIN(216, "GPIO216"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO216")
- ),
- MTK_PIN(
- PINCTRL_PIN(217, "GPIO217"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO217")
- ),
- MTK_PIN(
- PINCTRL_PIN(218, "GPIO218"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO218")
- ),
- MTK_PIN(
- PINCTRL_PIN(219, "GPIO219"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO219")
- ),
- MTK_PIN(
- PINCTRL_PIN(220, "GPIO220"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO220")
- ),
- MTK_PIN(
- PINCTRL_PIN(221, "GPIO221"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO221")
- ),
- MTK_PIN(
- PINCTRL_PIN(222, "GPIO222"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO222")
- ),
- MTK_PIN(
- PINCTRL_PIN(223, "GPIO223"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO223")
- ),
- MTK_PIN(
- PINCTRL_PIN(224, "GPIO224"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO224")
- ),
- MTK_PIN(
- PINCTRL_PIN(225, "GPIO225"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO225")
- ),
- MTK_PIN(
- PINCTRL_PIN(226, "GPIO226"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO226")
- ),
- MTK_PIN(
- PINCTRL_PIN(227, "GPIO227"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO227")
- ),
- MTK_PIN(
- PINCTRL_PIN(228, "GPIO228"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO228")
- ),
- MTK_PIN(
- PINCTRL_PIN(229, "GPIO229"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO229")
- ),
- MTK_PIN(
- PINCTRL_PIN(230, "GPIO230"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO230")
- ),
- MTK_PIN(
- PINCTRL_PIN(231, "GPIO231"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO231")
- ),
- MTK_PIN(
- PINCTRL_PIN(232, "GPIO232"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO232")
- ),
- MTK_PIN(
- PINCTRL_PIN(233, "GPIO233"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO233")
- ),
- MTK_PIN(
- PINCTRL_PIN(234, "GPIO234"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO234")
- ),
- MTK_PIN(
- PINCTRL_PIN(235, "GPIO235"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO235")
- ),
- MTK_PIN(
- PINCTRL_PIN(236, "EXT_SDIO3"),
- "A8", "mt7623",
- MTK_EINT_FUNCTION(0, 122),
- MTK_FUNCTION(0, "GPIO236"),
- MTK_FUNCTION(1, "EXT_SDIO3"),
- MTK_FUNCTION(2, "IDDIG")
- ),
- MTK_PIN(
- PINCTRL_PIN(237, "EXT_SDIO2"),
- "D8", "mt7623",
- MTK_EINT_FUNCTION(0, 123),
- MTK_FUNCTION(0, "GPIO237"),
- MTK_FUNCTION(1, "EXT_SDIO2"),
- MTK_FUNCTION(2, "DRV_VBUS")
- ),
- MTK_PIN(
- PINCTRL_PIN(238, "EXT_SDIO1"),
- "D9", "mt7623",
- MTK_EINT_FUNCTION(0, 124),
- MTK_FUNCTION(0, "GPIO238"),
- MTK_FUNCTION(1, "EXT_SDIO1")
- ),
- MTK_PIN(
- PINCTRL_PIN(239, "EXT_SDIO0"),
- "B8", "mt7623",
- MTK_EINT_FUNCTION(0, 125),
- MTK_FUNCTION(0, "GPIO239"),
- MTK_FUNCTION(1, "EXT_SDIO0")
- ),
- MTK_PIN(
- PINCTRL_PIN(240, "EXT_XCS"),
- "C9", "mt7623",
- MTK_EINT_FUNCTION(0, 126),
- MTK_FUNCTION(0, "GPIO240"),
- MTK_FUNCTION(1, "EXT_XCS")
- ),
- MTK_PIN(
- PINCTRL_PIN(241, "EXT_SCK"),
- "C8", "mt7623",
- MTK_EINT_FUNCTION(0, 127),
- MTK_FUNCTION(0, "GPIO241"),
- MTK_FUNCTION(1, "EXT_SCK")
- ),
- MTK_PIN(
- PINCTRL_PIN(242, "URTS2"),
- "G18", "mt7623",
- MTK_EINT_FUNCTION(0, 128),
- MTK_FUNCTION(0, "GPIO242"),
- MTK_FUNCTION(1, "URTS2"),
- MTK_FUNCTION(2, "UTXD3"),
- MTK_FUNCTION(3, "URXD3"),
- MTK_FUNCTION(4, "SCL1")
- ),
- MTK_PIN(
- PINCTRL_PIN(243, "UCTS2"),
- "H19", "mt7623",
- MTK_EINT_FUNCTION(0, 129),
- MTK_FUNCTION(0, "GPIO243"),
- MTK_FUNCTION(1, "UCTS2"),
- MTK_FUNCTION(2, "URXD3"),
- MTK_FUNCTION(3, "UTXD3"),
- MTK_FUNCTION(4, "SDA1")
- ),
- MTK_PIN(
- PINCTRL_PIN(244, "GPIO244"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO244")
- ),
- MTK_PIN(
- PINCTRL_PIN(245, "GPIO245"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO245")
- ),
- MTK_PIN(
- PINCTRL_PIN(246, "GPIO246"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO246")
- ),
- MTK_PIN(
- PINCTRL_PIN(247, "GPIO247"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO247")
- ),
- MTK_PIN(
- PINCTRL_PIN(248, "GPIO248"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO248")
- ),
- MTK_PIN(
- PINCTRL_PIN(249, "GPIO249"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO249")
- ),
- MTK_PIN(
- PINCTRL_PIN(250, "GPIO250"),
- "A15", "mt7623",
- MTK_EINT_FUNCTION(0, 135),
- MTK_FUNCTION(0, "GPIO250"),
- MTK_FUNCTION(1, "TEST_MD7"),
- MTK_FUNCTION(6, "PCIE0_CLKREQ_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(251, "GPIO251"),
- "B15", "mt7623",
- MTK_EINT_FUNCTION(0, 136),
- MTK_FUNCTION(0, "GPIO251"),
- MTK_FUNCTION(1, "TEST_MD6"),
- MTK_FUNCTION(6, "PCIE0_WAKE_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(252, "GPIO252"),
- "C16", "mt7623",
- MTK_EINT_FUNCTION(0, 137),
- MTK_FUNCTION(0, "GPIO252"),
- MTK_FUNCTION(1, "TEST_MD5"),
- MTK_FUNCTION(6, "PCIE1_CLKREQ_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(253, "GPIO253"),
- "D17", "mt7623",
- MTK_EINT_FUNCTION(0, 138),
- MTK_FUNCTION(0, "GPIO253"),
- MTK_FUNCTION(1, "TEST_MD4"),
- MTK_FUNCTION(6, "PCIE1_WAKE_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(254, "GPIO254"),
- "D16", "mt7623",
- MTK_EINT_FUNCTION(0, 139),
- MTK_FUNCTION(0, "GPIO254"),
- MTK_FUNCTION(1, "TEST_MD3"),
- MTK_FUNCTION(6, "PCIE2_CLKREQ_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(255, "GPIO255"),
- "C17", "mt7623",
- MTK_EINT_FUNCTION(0, 140),
- MTK_FUNCTION(0, "GPIO255"),
- MTK_FUNCTION(1, "TEST_MD2"),
- MTK_FUNCTION(6, "PCIE2_WAKE_N")
- ),
- MTK_PIN(
- PINCTRL_PIN(256, "GPIO256"),
- "B17", "mt7623",
- MTK_EINT_FUNCTION(0, 141),
- MTK_FUNCTION(0, "GPIO256"),
- MTK_FUNCTION(1, "TEST_MD1")
- ),
- MTK_PIN(
- PINCTRL_PIN(257, "GPIO257"),
- "C15", "mt7623",
- MTK_EINT_FUNCTION(0, 142),
- MTK_FUNCTION(0, "GPIO257"),
- MTK_FUNCTION(1, "TEST_MD0")
- ),
- MTK_PIN(
- PINCTRL_PIN(258, "GPIO258"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO258")
- ),
- MTK_PIN(
- PINCTRL_PIN(259, "GPIO259"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO259")
- ),
- MTK_PIN(
- PINCTRL_PIN(260, "GPIO260"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO260")
- ),
- MTK_PIN(
- PINCTRL_PIN(261, "MSDC1_INS"),
- "AD1", "mt7623",
- MTK_EINT_FUNCTION(0, 146),
- MTK_FUNCTION(0, "GPIO261"),
- MTK_FUNCTION(1, "MSDC1_INS")
- ),
- MTK_PIN(
- PINCTRL_PIN(262, "G2_TXEN"),
- "A23", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO262"),
- MTK_FUNCTION(1, "G2_TXEN")
- ),
- MTK_PIN(
- PINCTRL_PIN(263, "G2_TXD3"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO263"),
- MTK_FUNCTION(1, "G2_TXD3")
- ),
- MTK_PIN(
- PINCTRL_PIN(264, "G2_TXD2"),
- "C24", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO264"),
- MTK_FUNCTION(1, "G2_TXD2")
- ),
- MTK_PIN(
- PINCTRL_PIN(265, "G2_TXD1"),
- "B25", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO265"),
- MTK_FUNCTION(1, "G2_TXD1")
- ),
- MTK_PIN(
- PINCTRL_PIN(266, "G2_TXD0"),
- "A24", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO266"),
- MTK_FUNCTION(1, "G2_TXD0")
- ),
- MTK_PIN(
- PINCTRL_PIN(267, "G2_TXCLK"),
- "C23", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO267"),
- MTK_FUNCTION(1, "G2_TXC")
- ),
- MTK_PIN(
- PINCTRL_PIN(268, "G2_RXCLK"),
- "B23", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO268"),
- MTK_FUNCTION(1, "G2_RXC")
- ),
- MTK_PIN(
- PINCTRL_PIN(269, "G2_RXD0"),
- "D21", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO269"),
- MTK_FUNCTION(1, "G2_RXD0")
- ),
- MTK_PIN(
- PINCTRL_PIN(270, "G2_RXD1"),
- "B22", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO270"),
- MTK_FUNCTION(1, "G2_RXD1")
- ),
- MTK_PIN(
- PINCTRL_PIN(271, "G2_RXD2"),
- "A22", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO271"),
- MTK_FUNCTION(1, "G2_RXD2")
- ),
- MTK_PIN(
- PINCTRL_PIN(272, "G2_RXD3"),
- "C22", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO272"),
- MTK_FUNCTION(1, "G2_RXD3")
- ),
- MTK_PIN(
- PINCTRL_PIN(273, "GPIO273"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO273")
- ),
- MTK_PIN(
- PINCTRL_PIN(274, "G2_RXDV"),
- "C21", "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO274"),
- MTK_FUNCTION(1, "G2_RXDV")
- ),
- MTK_PIN(
- PINCTRL_PIN(275, "G2_MDC"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO275"),
- MTK_FUNCTION(1, "MDC")
- ),
- MTK_PIN(
- PINCTRL_PIN(276, "G2_MDIO"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO276"),
- MTK_FUNCTION(1, "MDIO")
- ),
- MTK_PIN(
- PINCTRL_PIN(277, "GPIO277"),
- NULL, "mt7623",
- MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
- MTK_FUNCTION(0, "GPIO277")
- ),
- MTK_PIN(
- PINCTRL_PIN(278, "JTAG_RESET"),
- "H20", "mt7623",
- MTK_EINT_FUNCTION(0, 147),
- MTK_FUNCTION(0, "GPIO278"),
- MTK_FUNCTION(1, "JTAG_RESET")
- ),
-};
-
-#endif /* __PINCTRL_MTK_MT7623_H */
--
1.9.1
From: John Crispin <[email protected]>
Add I2C nodes to the mt7623.dtsi file.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 45 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 6adc21d..adb4793 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -243,6 +243,51 @@
status = "disabled";
};
+ i2c0: i2c@11007000 {
+ compatible = "mediatek,mt7623-i2c",
+ "mediatek,mt6577-i2c";
+ reg = <0 0x11007000 0 0x70>,
+ <0 0x11000200 0 0x80>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
+ clock-div = <16>;
+ clocks = <&pericfg CLK_PERI_I2C0>,
+ <&pericfg CLK_PERI_AP_DMA>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@11008000 {
+ compatible = "mediatek,mt7623-i2c",
+ "mediatek,mt6577-i2c";
+ reg = <0 0x11008000 0 0x70>,
+ <0 0x11000280 0 0x80>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_LOW>;
+ clock-div = <16>;
+ clocks = <&pericfg CLK_PERI_I2C1>,
+ <&pericfg CLK_PERI_AP_DMA>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@11009000 {
+ compatible = "mediatek,mt7623-i2c",
+ "mediatek,mt6577-i2c";
+ reg = <0 0x11009000 0 0x70>,
+ <0 0x11000300 0 0x80>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_LOW>;
+ clock-div = <16>;
+ clocks = <&pericfg CLK_PERI_I2C2>,
+ <&pericfg CLK_PERI_AP_DMA>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
hifsys: syscon@1a000000 {
compatible = "mediatek,mt7623-hifsys",
"mediatek,mt2701-hifsys",
--
1.9.1
From: Sean Wang <[email protected]>
Add ir nodes to the mt7623.dtsi file.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index ad7c50a..76e0840 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -171,6 +171,15 @@
clock-names = "spi", "wrap";
};
+ cir: cir@0x10013000 {
+ compatible = "mediatek,mt7623-cir";
+ reg = <0 0x10013000 0 0x1000>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&infracfg CLK_INFRA_IRRX>;
+ clock-names = "clk";
+ status = "disabled";
+ };
+
sysirq: interrupt-controller@10200100 {
compatible = "mediatek,mt7623-sysirq",
"mediatek,mt6577-sysirq";
--
1.9.1
From: Sean Wang <[email protected]>
Add ethernet nodes to the mt7623.dtsi file.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index cfafaea..c4be7a5 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -485,4 +485,24 @@
reg = <0 0x1b000000 0 0x1000>;
#clock-cells = <1>;
};
+
+ eth: ethernet@1b100000 {
+ compatible = "mediatek,mt2701-eth", "syscon";
+ reg = <0 0x1b100000 0 0x20000>;
+ interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
+ <ðsys CLK_ETHSYS_ESW>,
+ <ðsys CLK_ETHSYS_GP1>,
+ <ðsys CLK_ETHSYS_GP2>,
+ <&apmixedsys CLK_APMIXED_TRGPLL>;
+ clock-names = "ethif", "esw", "gp1", "gp2", "trgpll";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
+ mediatek,ethsys = <ðsys>;
+ mediatek,pctl = <&syscfg_pctl_a>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.9.1
From: Sean Wang <[email protected]>
Add Sean as one of the authors for the mt7623.dtsi
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index d33d535..d81158b2 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -1,6 +1,7 @@
/*
- * Copyright (c) 2016 MediaTek Inc.
+ * Copyright (c) 2017 MediaTek Inc.
* Author: John Crispin <[email protected]>
+ * Sean Wang <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
--
1.9.1
From: Sean Wang <[email protected]>
Add thermal nodes to the mt7623.dtsi file.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 2289232..d33d535 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -354,6 +354,22 @@
status = "disabled";
};
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt7623-thermal",
+ "mediatek,mt2701-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&pericfg MT2701_PERI_THERM_SW_RST>;
+ reset-names = "therm";
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ nvmem-cells = <&thermal_calibration_data>;
+ nvmem-cell-names = "calibration-data";
+ };
+
spi1: spi@11016000 {
compatible = "mediatek,mt7623-spi",
"mediatek,mt2701-spi";
--
1.9.1
From: John Crispin <[email protected]>
Add pin controller node to the mt7623.dtsi file
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 3cc0a3a..1942bc7 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -15,7 +15,10 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mt2701-clk.h>
+#include <dt-bindings/pinctrl/mt7623-pinfunc.h>
#include <dt-bindings/power/mt2701-power.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/phy/phy.h>
#include <dt-bindings/reset/mt2701-resets.h>
#include "skeleton64.dtsi"
@@ -107,6 +110,26 @@
#reset-cells = <1>;
};
+ pio: pinctrl@10005000 {
+ compatible = "mediatek,mt7623-pinctrl",
+ "mediatek,mt2701-pinctrl";
+ reg = <0 0x1000b000 0 0x1000>;
+ mediatek,pctl-regmap = <&syscfg_pctl_a>;
+ pins-are-numbered;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&gic>;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ syscfg_pctl_a: syscfg@10005000 {
+ compatible = "mediatek,mt7623-pctl-a-syscfg", "syscon";
+ reg = <0 0x10005000 0 0x1000>;
+ };
+
scpsys: scpsys@10006000 {
compatible = "mediatek,mt7623-scpsys",
"mediatek,mt2701-scpsys",
--
1.9.1
From: Sean Wang <[email protected]>
Add crypto engine nodes to the mt7623.dtsi file.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index c4be7a5..ad7c50a 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -505,4 +505,19 @@
#size-cells = <0>;
status = "disabled";
};
+
+ crypto: crypto@1b240000 {
+ compatible = "mediatek,mt7623-crypto";
+ reg = <0 0x1b240000 0 0x20000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
+ <ðsys CLK_ETHSYS_CRYPTO>;
+ clock-names = "ethif","cryp";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
+ status = "disabled";
+ };
};
--
1.9.1
From: John Crispin <[email protected]>
Add power domain controller node (scpsys) for MT7623.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 54cff6a..adb2393 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -15,6 +15,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mt2701-clk.h>
+#include <dt-bindings/power/mt2701-power.h>
#include <dt-bindings/reset/mt2701-resets.h>
#include "skeleton64.dtsi"
@@ -104,6 +105,19 @@
#reset-cells = <1>;
};
+ scpsys: scpsys@10006000 {
+ compatible = "mediatek,mt7623-scpsys",
+ "mediatek,mt2701-scpsys",
+ "syscon";
+ #power-domain-cells = <1>;
+ reg = <0 0x10006000 0 0x1000>;
+ infracfg = <&infracfg>;
+ clocks = <&topckgen CLK_TOP_MM_SEL>,
+ <&topckgen CLK_TOP_MFG_SEL>,
+ <&topckgen CLK_TOP_ETHIF_SEL>;
+ clock-names = "mm", "mfg", "ethif";
+ };
+
watchdog: watchdog@10007000 {
compatible = "mediatek,mt7623-wdt",
"mediatek,mt6589-wdt";
--
1.9.1
From: Sean Wang <[email protected]>
Add spi controller nodes to the mt7623.dtsi file
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 42 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index adb4793..131808c 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -288,6 +288,48 @@
status = "disabled";
};
+ spi0: spi@1100a000 {
+ compatible = "mediatek,mt7623-spi",
+ "mediatek,mt2701-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x1100a000 0 0x100>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+ <&topckgen CLK_TOP_SPI0_SEL>,
+ <&pericfg CLK_PERI_SPI0>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
+ spi1: spi@11016000 {
+ compatible = "mediatek,mt7623-spi",
+ "mediatek,mt2701-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x11016000 0 0x100>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+ <&topckgen CLK_TOP_SPI1_SEL>,
+ <&pericfg CLK_PERI_SPI1>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
+ spi2: spi@11017000 {
+ compatible = "mediatek,mt7623-spi",
+ "mediatek,mt2701-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x11017000 0 0x1000>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+ <&topckgen CLK_TOP_SPI2_SEL>,
+ <&pericfg CLK_PERI_SPI2>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
hifsys: syscon@1a000000 {
compatible = "mediatek,mt7623-hifsys",
"mediatek,mt2701-hifsys",
--
1.9.1
From: John Crispin <[email protected]>
Add MT7623 subsystem clock controllers for hifsys and ethsys.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index b97b2ba..54cff6a 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -190,4 +190,20 @@
clock-names = "baud", "bus";
status = "disabled";
};
+
+ hifsys: syscon@1a000000 {
+ compatible = "mediatek,mt7623-hifsys",
+ "mediatek,mt2701-hifsys",
+ "syscon";
+ reg = <0 0x1a000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ ethsys: syscon@1b000000 {
+ compatible = "mediatek,mt7623-ethsys",
+ "mediatek,mt2701-ethsys",
+ "syscon";
+ reg = <0 0x1b000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
};
--
1.9.1
From: John Crispin <[email protected]>
Enable the nand device and setup pinmux on the mt7632m rfb with nand
support.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623n-rfb-nand.dts | 88 ++++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623n-rfb-nand.dts b/arch/arm/boot/dts/mt7623n-rfb-nand.dts
index 07b3953..06a76fa 100644
--- a/arch/arm/boot/dts/mt7623n-rfb-nand.dts
+++ b/arch/arm/boot/dts/mt7623n-rfb-nand.dts
@@ -19,3 +19,91 @@
model = "MediaTek MT7623N NAND reference board";
compatible = "mediatek,mt7623n-rfb-nand", "mediatek,mt7623n";
};
+
+&pio {
+ nand_pins_default: nanddefault {
+ pins_dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
+ <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up;
+ };
+
+ pins_we {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins_ale {
+ pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+ };
+};
+
+&nandc {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&nand_pins_default>;
+ nand@0 {
+ reg = <0>;
+ spare_per_sector = <64>;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <12>;
+ nand-ecc-step-size = <1024>;
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "preloader";
+ reg = <0x0 0x40000>;
+ };
+
+ partition@40000 {
+ label = "uboot";
+ reg = <0x40000 0x80000>;
+ };
+
+ partition@C0000 {
+ label = "uboot-env";
+ reg = <0xC0000 0x40000>;
+ };
+
+ partition@140000 {
+ label = "bootimg";
+ reg = <0x140000 0x2000000>;
+ };
+
+ partition@2140000 {
+ label = "recovery";
+ reg = <0x2140000 0x2000000>;
+ };
+
+ partition@4140000 {
+ label = "rootfs";
+ reg = <0x4140000 0x1000000>;
+ };
+
+ partition@5140000 {
+ label = "usrdata";
+ reg = <0x5140000 0x1000000>;
+ };
+ };
+ };
+};
+
+&bch {
+ status = "okay";
+};
--
1.9.1
From: John Crispin <[email protected]>
Add USB nodes to the mt7623.dtsi file.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 77 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 77 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 1ea9b18..56da5ba 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -377,12 +377,89 @@
status = "disabled";
};
+ usb1: usb@1a1c0000 {
+ compatible = "mediatek,mt7623-xhci",
+ "mediatek,mt8173-xhci";
+ reg = <0 0x1a1c0000 0 0x1000>,
+ <0 0x1a1c4700 0 0x0100>;
+ reg-names = "mac", "ippc";
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&hifsys CLK_HIFSYS_USB0PHY>,
+ <&topckgen CLK_TOP_ETHIF_SEL>;
+ clock-names = "sys_ck", "free_ck";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
+ phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
+ status = "disabled";
+ };
+
+ u3phy1: usb-phy@1a1c4000 {
+ compatible = "mediatek,mt7623-u3phy", "mediatek,mt2701-u3phy";
+ reg = <0 0x1a1c4000 0 0x0700>;
+ clocks = <&clk26m>;
+ clock-names = "u3phya_ref";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ u2port0: usb-phy@1a1c4800 {
+ reg = <0 0x1a1c4800 0 0x0100>;
+ #phy-cells = <1>;
+ status = "okay";
+ };
+
+ u3port0: usb-phy@1a1c4900 {
+ reg = <0 0x1a1c4900 0 0x0700>;
+ #phy-cells = <1>;
+ status = "okay";
+ };
+ };
+
+ usb2: usb@1a240000 {
+ compatible = "mediatek,mt7623-xhci",
+ "mediatek,mt8173-xhci";
+ reg = <0 0x1a240000 0 0x1000>,
+ <0 0x1a244700 0 0x0100>;
+ reg-names = "mac", "ippc";
+ interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&hifsys CLK_HIFSYS_USB1PHY>,
+ <&topckgen CLK_TOP_ETHIF_SEL>;
+ clock-names = "sys_ck", "free_ck";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
+ phys = <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>;
+ status = "disabled";
+ };
+
+ u3phy2: usb-phy@1a244000 {
+ compatible = "mediatek,mt7623-u3phy", "mediatek,mt2701-u3phy";
+ reg = <0 0x1a244000 0 0x0700>;
+ clocks = <&clk26m>;
+ clock-names = "u3phya_ref";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ u2port1: usb-phy@1a244800 {
+ reg = <0 0x1a244800 0 0x0100>;
+ #phy-cells = <1>;
+ status = "okay";
+ };
+
+ u3port1: usb-phy@1a244900 {
+ reg = <0 0x1a244900 0 0x0700>;
+ #phy-cells = <1>;
+ status = "okay";
+ };
+ };
+
hifsys: syscon@1a000000 {
compatible = "mediatek,mt7623-hifsys",
"mediatek,mt2701-hifsys",
"syscon";
reg = <0 0x1a000000 0 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
ethsys: syscon@1b000000 {
--
1.9.1
From: John Crispin <[email protected]>
Add NAND/EEC nodes to the mt7623.dtsi file.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 131808c..f15d65a 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -330,6 +330,31 @@
status = "disabled";
};
+ nandc: nfi@1100d000 {
+ compatible = "mediatek,mt7623-nfc",
+ "mediatek,mt2701-nfc";
+ reg = <0 0x1100d000 0 0x1000>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+ clocks = <&pericfg CLK_PERI_NFI>,
+ <&pericfg CLK_PERI_NFI_PAD>;
+ clock-names = "nfi_clk", "pad_clk";
+ status = "disabled";
+ ecc-engine = <&bch>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ bch: ecc@1100e000 {
+ compatible = "mediatek,mt7623-ecc",
+ "mediatek,mt2701-ecc";
+ reg = <0 0x1100e000 0 0x1000>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_NFI_ECC>;
+ clock-names = "nfiecc_clk";
+ status = "disabled";
+ };
+
hifsys: syscon@1a000000 {
compatible = "mediatek,mt7623-hifsys",
"mediatek,mt2701-hifsys",
--
1.9.1
From: John Crispin <[email protected]>
This patch does a cleanup of the uart nodes in the dts file of the RFB. It
adds aliases, enables 2 more uarts and explicitly sets the uart mode of the
console.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623n-rfb.dtsi | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/mt7623n-rfb.dtsi b/arch/arm/boot/dts/mt7623n-rfb.dtsi
index c526116..4963e6a 100644
--- a/arch/arm/boot/dts/mt7623n-rfb.dtsi
+++ b/arch/arm/boot/dts/mt7623n-rfb.dtsi
@@ -16,12 +16,26 @@
/ {
chosen {
- stdout-path = &uart2;
+ stdout-path = "serial2:115200n8";
};
memory@80000000 {
reg = <0 0x80000000 0 0x40000000>;
};
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
};
&uart2 {
--
1.9.1
From: John Crispin <[email protected]>
MediaTek produces various PMICs. Which one is used depends on the actual
circuit design. Instead of adding the correct PMIC node to every dts file
we instead add a new intermediate dtsi file which adds the PMIC node.
Additionally we also add the phandles for the regulators to various nodes.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623-evb.dts | 2 +-
arch/arm/boot/dts/mt7623-mt6323.dtsi | 269 +++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/mt7623.dtsi | 8 +-
3 files changed, 274 insertions(+), 5 deletions(-)
create mode 100644 arch/arm/boot/dts/mt7623-mt6323.dtsi
diff --git a/arch/arm/boot/dts/mt7623-evb.dts b/arch/arm/boot/dts/mt7623-evb.dts
index b60b41c..a769149 100644
--- a/arch/arm/boot/dts/mt7623-evb.dts
+++ b/arch/arm/boot/dts/mt7623-evb.dts
@@ -13,7 +13,7 @@
*/
/dts-v1/;
-#include "mt7623.dtsi"
+#include "mt7623-mt6323.dtsi"
/ {
model = "MediaTek MT7623 evaluation board";
diff --git a/arch/arm/boot/dts/mt7623-mt6323.dtsi b/arch/arm/boot/dts/mt7623-mt6323.dtsi
new file mode 100644
index 0000000..93d3f71
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623-mt6323.dtsi
@@ -0,0 +1,269 @@
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: John Crispin <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "mt7623.dtsi"
+
+&cpu0 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&cpu1 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&cpu2 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&cpu3 {
+ proc-supply = <&mt6323_vproc_reg>;
+};
+
+&pwrap {
+ pmic: mt6323 {
+ compatible = "mediatek,mt6323";
+ interrupt-parent = <&pio>;
+ interrupts = <150 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ mt6323regulator: mt6323regulator{
+ compatible = "mediatek,mt6323-regulator";
+
+ mt6323_vproc_reg: buck_vproc{
+ regulator-name = "vproc";
+ regulator-min-microvolt = < 700000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <12500>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vsys_reg: buck_vsys{
+ regulator-name = "vsys";
+ regulator-min-microvolt = <1400000>;
+ regulator-max-microvolt = <2987500>;
+ regulator-ramp-delay = <25000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vpa_reg: buck_vpa{
+ regulator-name = "vpa";
+ regulator-min-microvolt = < 500000>;
+ regulator-max-microvolt = <3650000>;
+ };
+
+ mt6323_vtcxo_reg: ldo_vtcxo{
+ regulator-name = "vtcxo";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <90>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcn28_reg: ldo_vcn28{
+ regulator-name = "vcn28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <185>;
+ };
+
+ mt6323_vcn33_bt_reg: ldo_vcn33_bt{
+ regulator-name = "vcn33_bt";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3600000>;
+ regulator-enable-ramp-delay = <185>;
+ };
+
+ mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{
+ regulator-name = "vcn33_wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3600000>;
+ regulator-enable-ramp-delay = <185>;
+ };
+
+ mt6323_va_reg: ldo_va{
+ regulator-name = "va";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcama_reg: ldo_vcama{
+ regulator-name = "vcama";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vio28_reg: ldo_vio28{
+ regulator-name = "vio28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vusb_reg: ldo_vusb{
+ regulator-name = "vusb";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-boot-on;
+ };
+
+ mt6323_vmc_reg: ldo_vmc{
+ regulator-name = "vmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ regulator-boot-on;
+ };
+
+ mt6323_vmch_reg: ldo_vmch{
+ regulator-name = "vmch";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ regulator-boot-on;
+ };
+
+ mt6323_vemc3v3_reg: ldo_vemc3v3{
+ regulator-name = "vemc3v3";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ regulator-boot-on;
+ };
+
+ mt6323_vgp1_reg: ldo_vgp1{
+ regulator-name = "vgp1";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vgp2_reg: ldo_vgp2{
+ regulator-name = "vgp2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vgp3_reg: ldo_vgp3{
+ regulator-name = "vgp3";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vcn18_reg: ldo_vcn18{
+ regulator-name = "vcn18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vsim1_reg: ldo_vsim1{
+ regulator-name = "vsim1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vsim2_reg: ldo_vsim2{
+ regulator-name = "vsim2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vrtc_reg: ldo_vrtc{
+ regulator-name = "vrtc";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcamaf_reg: ldo_vcamaf{
+ regulator-name = "vcamaf";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vibr_reg: ldo_vibr{
+ regulator-name = "vibr";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <36>;
+ };
+
+ mt6323_vrf18_reg: ldo_vrf18{
+ regulator-name = "vrf18";
+ regulator-min-microvolt = <1825000>;
+ regulator-max-microvolt = <1825000>;
+ regulator-enable-ramp-delay = <187>;
+ };
+
+ mt6323_vm_reg: ldo_vm{
+ regulator-name = "vm";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vio18_reg: ldo_vio18{
+ regulator-name = "vio18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ mt6323_vcamd_reg: ldo_vcamd{
+ regulator-name = "vcamd";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+
+ mt6323_vcamio_reg: ldo_vcamio{
+ regulator-name = "vcamio";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <216>;
+ };
+ };
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&mt6323_vemc3v3_reg>;
+ vqmmc-supply = <&mt6323_vio18_reg>;
+};
+
+&mmc1 {
+ vmmc-supply = <&mt6323_vmch_reg>;
+ vqmmc-supply = <&mt6323_vmc_reg>;
+};
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index d81158b2..e9e0974 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -32,22 +32,22 @@
#size-cells = <0>;
enable-method = "mediatek,mt6589-smp";
- cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x0>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x1>;
};
- cpu@2 {
+ cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x2>;
};
- cpu@3 {
+ cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x3>;
--
1.9.1
From: Sean Wang <[email protected]>
Add support for the Bananapi R2 (BPI-R2) development board from
Sinovoip. Detailed hardware information for BPI-R2 which could be
found on http://www.banana-pi.org/r2.html
The patch currently only adds Mediatek GMAC, MT7530 Switch, the crypto
engine, USB, IR, I2S, I2C, UART, SPI, PWM, GPIO keys, GPIO LEDs and
PMIC LEDs. As to the other missing hardware and peripherals, they would
be added and integrated continuously.
Signed-off-by: Sean Wang <[email protected]>
---
Documentation/devicetree/bindings/arm/mediatek.txt | 2 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 478 +++++++++++++++++++++
3 files changed, 481 insertions(+)
create mode 100644 arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt
index 7f7c804..234c1dc 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek.txt
@@ -41,6 +41,8 @@ Supported boards:
- Reference board for MT7623N with NAND:
Required root node properties:
- compatible = "mediatek,mt7623n-rfb-nand", "mediatek,mt7623n";
+- Bananapi BPI-R2 board:
+ - compatible = "bananapi,bpi-r2", "mediatek,mt7623n";
- MTK mt8127 tablet moose EVB:
Required root node properties:
- compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5249d24..2831069 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1004,6 +1004,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt6589-aquaris5.dtb \
mt6592-evb.dtb \
mt7623n-rfb-nand.dtb \
+ mt7623n-bananapi-bpi-r2.dtb \
mt8127-moose.dtb \
mt8135-evbp1.dtb
dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
new file mode 100644
index 0000000..a06bf0c
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -0,0 +1,478 @@
+/*
+ * Copyright 2017 Sean Wang <[email protected]>
+ *
+ * Sean Wang <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "mt7623-mt6323.dtsi"
+
+/ {
+ model = "Bananapi BPI-R2";
+ compatible = "bananapi,bpi-r2", "mediatek,mt7623n";
+
+ aliases {
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&key_pins_a>;
+
+ factory {
+ label = "factory";
+ linux,code = <BTN_0>;
+ gpios = <&pio 256 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins_a>;
+
+ red {
+ label = "bpi-r2:pio:red";
+ gpios = <&pio 239 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ green {
+ label = "bpi-r2:pio:green";
+ gpios = <&pio 240 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ blue {
+ label = "bpi-r2:pio:blue";
+ gpios = <&pio 241 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ memory@80000000 {
+ reg = <0 0x80000000 0 0x40000000>;
+ };
+
+ sound:sound {
+ compatible = "mediatek,mt2701-wm8960-machine";
+ mediatek,platform = <&afe>;
+ audio-routing =
+ "Headphone", "HP_L",
+ "Headphone", "HP_R",
+ "LINPUT1", "AMIC",
+ "RINPUT1", "AMIC";
+ mediatek,audio-codec = <&wm8960>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_pins_a>;
+ };
+};
+
+&pio {
+ cir_pins_a:cir@0 {
+ pins_cir {
+ pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
+ bias-disable;
+ };
+ };
+
+ i2c0_pins_a: i2c@0 {
+ pins_i2c0 {
+ pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
+ <MT7623_PIN_76_SCL0_FUNC_SCL0>;
+ bias-disable;
+ };
+ };
+
+ i2c1_pins_a: i2c@1 {
+ pin_i2c1 {
+ pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
+ <MT7623_PIN_58_SCL1_FUNC_SCL1>;
+ bias-disable;
+ };
+ };
+
+ i2s0_pins_a: i2s@0 {
+ pin_i2s0 {
+ pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
+ <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
+ <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
+ <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
+ <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
+ drive-strength = <MTK_DRIVE_12mA>;
+ bias-pull-down;
+ };
+ };
+
+ i2s1_pins_a: i2s@1 {
+ pin_i2s1 {
+ pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
+ <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
+ <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
+ <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
+ <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
+ drive-strength = <MTK_DRIVE_12mA>;
+ bias-pull-down;
+ };
+ };
+
+ key_pins_a: keys@0 {
+ pins_keys {
+ pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
+ <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
+ input-enable;
+ };
+ };
+
+ led_pins_a: leds@0 {
+ pins_leds {
+ pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
+ <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
+ <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>;
+ };
+ };
+
+ mmc0_pins_default: mmc0default {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
+ input-enable;
+ bias-pull-up;
+ };
+
+ pins_clk {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
+ bias-pull-down;
+ };
+
+ pins_rst {
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
+ bias-pull-up;
+ };
+ };
+
+ mmc0_pins_uhs: mmc0 {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_2mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins_clk {
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
+ drive-strength = <MTK_DRIVE_2mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins_rst {
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
+ bias-pull-up;
+ };
+ };
+
+ mmc1_pins_default: mmc1default {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
+ <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
+ <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
+ <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
+ <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins_clk {
+ pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
+ bias-pull-down;
+ drive-strength = <MTK_DRIVE_4mA>;
+ };
+ };
+
+ mmc1_pins_uhs: mmc1 {
+ pins_cmd_dat {
+ pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
+ <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
+ <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
+ <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
+ <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins_clk {
+ pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+ };
+
+ spi0_pins_a: spi@0 {
+ pins_spi {
+ pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
+ <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
+ <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
+ <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
+ bias-disable;
+ };
+ };
+
+ pwm_pins_a: pwm@0 {
+ pins_pwm {
+ pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
+ <MT7623_PIN_204_PWM1_FUNC_PWM1>,
+ <MT7623_PIN_205_PWM2_FUNC_PWM2>,
+ <MT7623_PIN_206_PWM3_FUNC_PWM3>,
+ <MT7623_PIN_207_PWM4_FUNC_PWM4>;
+ };
+ };
+
+ uart0_pins_a: uart@0 {
+ pins_dat {
+ pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
+ <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
+ };
+ };
+
+ uart1_pins_a: uart@1 {
+ pins_dat {
+ pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
+ <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
+ };
+ };
+};
+
+&cir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&cir_pins_a>;
+ status = "okay";
+};
+
+&crypto {
+ status = "okay";
+};
+
+ð {
+ status = "okay";
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "trgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ mdio: mdio-bus {
+ switch@0 {
+ compatible = "mediatek,mt7530";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ pinctrl-names = "default";
+ reset-gpios = <&pio 33 0>;
+ core-supply = <&mt6323_vpa_reg>;
+ io-supply = <&mt6323_vemc3v3_reg>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ port@0 {
+ reg = <0>;
+ label = "lan0";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "rgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+ };
+};
+
+&pwrap {
+ mt6323 {
+ mt6323led: led {
+ compatible = "mediatek,mt6323-led";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ label = "bpi-r2:isink:green";
+ default-state = "off";
+ };
+ led@1 {
+ reg = <1>;
+ label = "bpi-r2:isink:red";
+ default-state = "off";
+ };
+ led@2 {
+ reg = <2>;
+ label = "bpi-r2:isink:blue";
+ default-state = "off";
+ };
+ };
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins_a>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_a>;
+ status = "okay";
+
+ wm8960: wm8960@1a {
+ compatible = "wlf,wm8960";
+ reg = <0x1a>;
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins_a>;
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins_a>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "disabled";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins_a>;
+ status = "disabled";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&u3phy1 {
+ status = "okay";
+};
+
+&u3phy2 {
+ status = "okay";
+};
+
+&usb1 {
+ vusb33-supply = <&mt6323_vusb_reg>;
+ status = "okay";
+};
+
+&usb2 {
+ vusb33-supply = <&mt6323_vusb_reg>;
+ status = "okay";
+};
--
1.9.1
From: Sean Wang <[email protected]>
There are 2 versions of the SoC. MT7623N is almost identical to MT7623A
but has some additional multimedia features. The reference boards are
available as NAND or MMC and might have a different ethernet setup. In
order to reduce the duplication of devicetree code we add an intermediate
dtsi file for these reference boards. Additionally Mediatek pointed out,
that the EVB is yet another board and the board in question is infact the
RFB. Take this into account while renaming the files.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
Documentation/devicetree/bindings/arm/mediatek.txt | 6 ++--
arch/arm/boot/dts/Makefile | 2 +-
arch/arm/boot/dts/mt7623-evb.dts | 33 ----------------------
arch/arm/boot/dts/mt7623n-rfb-nand.dts | 21 ++++++++++++++
arch/arm/boot/dts/mt7623n-rfb.dtsi | 29 +++++++++++++++++++
arch/arm/mach-mediatek/mediatek.c | 4 +--
arch/arm/mach-mediatek/platsmp.c | 2 +-
7 files changed, 57 insertions(+), 40 deletions(-)
delete mode 100644 arch/arm/boot/dts/mt7623-evb.dts
create mode 100644 arch/arm/boot/dts/mt7623n-rfb-nand.dts
create mode 100644 arch/arm/boot/dts/mt7623n-rfb.dtsi
diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt
index c860b24..7f7c804 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek.txt
@@ -12,7 +12,7 @@ compatible: Must contain one of
"mediatek,mt6592"
"mediatek,mt6755"
"mediatek,mt6795"
- "mediatek,mt7623"
+ "mediatek,mt7623n"
"mediatek,mt8127"
"mediatek,mt8135"
"mediatek,mt8173"
@@ -38,9 +38,9 @@ Supported boards:
- Evaluation board for MT6795(Helio X10):
Required root node properties:
- compatible = "mediatek,mt6795-evb", "mediatek,mt6795";
-- Evaluation board for MT7623:
+- Reference board for MT7623N with NAND:
Required root node properties:
- - compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
+ - compatible = "mediatek,mt7623n-rfb-nand", "mediatek,mt7623n";
- MTK mt8127 tablet moose EVB:
Required root node properties:
- compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0118084..5249d24 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1003,7 +1003,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt6580-evbp1.dtb \
mt6589-aquaris5.dtb \
mt6592-evb.dtb \
- mt7623-evb.dtb \
+ mt7623n-rfb-nand.dtb \
mt8127-moose.dtb \
mt8135-evbp1.dtb
dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
diff --git a/arch/arm/boot/dts/mt7623-evb.dts b/arch/arm/boot/dts/mt7623-evb.dts
deleted file mode 100644
index a769149..0000000
--- a/arch/arm/boot/dts/mt7623-evb.dts
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright (c) 2016 MediaTek Inc.
- * Author: John Crispin <[email protected]>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/dts-v1/;
-#include "mt7623-mt6323.dtsi"
-
-/ {
- model = "MediaTek MT7623 evaluation board";
- compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
-
- chosen {
- stdout-path = &uart2;
- };
-
- memory {
- reg = <0 0x80000000 0 0x40000000>;
- };
-};
-
-&uart2 {
- status = "okay";
-};
diff --git a/arch/arm/boot/dts/mt7623n-rfb-nand.dts b/arch/arm/boot/dts/mt7623n-rfb-nand.dts
new file mode 100644
index 0000000..07b3953
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623n-rfb-nand.dts
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: John Crispin <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+#include "mt7623n-rfb.dtsi"
+
+/ {
+ model = "MediaTek MT7623N NAND reference board";
+ compatible = "mediatek,mt7623n-rfb-nand", "mediatek,mt7623n";
+};
diff --git a/arch/arm/boot/dts/mt7623n-rfb.dtsi b/arch/arm/boot/dts/mt7623n-rfb.dtsi
new file mode 100644
index 0000000..c526116
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623n-rfb.dtsi
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: John Crispin <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "mt7623-mt6323.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ };
+
+ memory@80000000 {
+ reg = <0 0x80000000 0 0x40000000>;
+ };
+};
+
+&uart2 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
index a6e3c98..602211d 100644
--- a/arch/arm/mach-mediatek/mediatek.c
+++ b/arch/arm/mach-mediatek/mediatek.c
@@ -29,7 +29,7 @@ static void __init mediatek_timer_init(void)
void __iomem *gpt_base;
if (of_machine_is_compatible("mediatek,mt6589") ||
- of_machine_is_compatible("mediatek,mt7623") ||
+ of_machine_is_compatible("mediatek,mt7623n") ||
of_machine_is_compatible("mediatek,mt8135") ||
of_machine_is_compatible("mediatek,mt8127")) {
/* turn on GPT6 which ungates arch timer clocks */
@@ -48,7 +48,7 @@ static void __init mediatek_timer_init(void)
"mediatek,mt2701",
"mediatek,mt6589",
"mediatek,mt6592",
- "mediatek,mt7623",
+ "mediatek,mt7623n",
"mediatek,mt8127",
"mediatek,mt8135",
NULL,
diff --git a/arch/arm/mach-mediatek/platsmp.c b/arch/arm/mach-mediatek/platsmp.c
index 726eb69..2dfa1cd 100644
--- a/arch/arm/mach-mediatek/platsmp.c
+++ b/arch/arm/mach-mediatek/platsmp.c
@@ -58,7 +58,7 @@ struct mtk_smp_boot_info {
static const struct of_device_id mtk_smp_boot_infos[] __initconst = {
{ .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot },
- { .compatible = "mediatek,mt7623", .data = &mtk_mt7623_boot },
+ { .compatible = "mediatek,mt7623n", .data = &mtk_mt7623_boot },
};
static void __iomem *mtk_smp_base;
--
1.9.1
From: Sean Wang <[email protected]>
Add rng nodes to the mt7623.dtsi file.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index a2b6238..707f0e5 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -197,6 +197,13 @@
#clock-cells = <1>;
};
+ rng: rng@1020f000 {
+ compatible = "mediatek,mt7623-rng";
+ reg = <0 0x1020f000 0 0x1000>;
+ clocks = <&infracfg CLK_INFRA_TRNG>;
+ clock-names = "rng";
+ };
+
gic: interrupt-controller@10211000 {
compatible = "arm,cortex-a7-gic";
interrupt-controller;
--
1.9.1
From: John Crispin <[email protected]>
Add e/MMC nodes to the mt7623.dtsi file.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index f15d65a..1ea9b18 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -355,6 +355,28 @@
status = "disabled";
};
+ mmc0: mmc@11230000 {
+ compatible = "mediatek,mt7623-mmc",
+ "mediatek,mt8135-mmc";
+ reg = <0 0x11230000 0 0x1000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_0>,
+ <&topckgen CLK_TOP_MSDC30_0_SEL>;
+ clock-names = "source", "hclk";
+ status = "disabled";
+ };
+
+ mmc1: mmc@11240000 {
+ compatible = "mediatek,mt7623-mmc",
+ "mediatek,mt8135-mmc";
+ reg = <0 0x11240000 0 0x1000>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_1>,
+ <&topckgen CLK_TOP_MSDC30_1_SEL>;
+ clock-names = "source", "hclk";
+ status = "disabled";
+ };
+
hifsys: syscon@1a000000 {
compatible = "mediatek,mt7623-hifsys",
"mediatek,mt2701-hifsys",
--
1.9.1
From: Sean Wang <[email protected]>
Add afe nodes to the mt7623.dtsi file. Which
is the necessary node for I2S audio in/out.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 99 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 99 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 76e0840..a2b6238 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -380,6 +380,105 @@
status = "disabled";
};
+ afe: audio-controller@11220000 {
+ compatible = "mediatek,mt7623-audio",
+ "mediatek,mt2701-audio";
+ reg = <0 0x11220000 0 0x2000>,
+ <0 0x112a0000 0 0x20000>;
+ interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+
+ clocks = <&infracfg CLK_INFRA_AUDIO>,
+ <&topckgen CLK_TOP_AUD_MUX1_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
+ <&topckgen CLK_TOP_AUD_MUX1_DIV>,
+ <&topckgen CLK_TOP_AUD_MUX2_DIV>,
+ <&topckgen CLK_TOP_AUD_48K_TIMING>,
+ <&topckgen CLK_TOP_AUD_44K_TIMING>,
+ <&topckgen CLK_TOP_AUDPLL_MUX_SEL>,
+ <&topckgen CLK_TOP_APLL_SEL>,
+ <&topckgen CLK_TOP_AUD1PLL_98M>,
+ <&topckgen CLK_TOP_AUD2PLL_90M>,
+ <&topckgen CLK_TOP_HADDS2PLL_98M>,
+ <&topckgen CLK_TOP_HADDS2PLL_294M>,
+ <&topckgen CLK_TOP_AUDPLL>,
+ <&topckgen CLK_TOP_AUDPLL_D4>,
+ <&topckgen CLK_TOP_AUDPLL_D8>,
+ <&topckgen CLK_TOP_AUDPLL_D16>,
+ <&topckgen CLK_TOP_AUDPLL_D24>,
+ <&topckgen CLK_TOP_AUDINTBUS_SEL>,
+ <&clk26m>,
+ <&topckgen CLK_TOP_SYSPLL1_D4>,
+ <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K5_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K6_SRC_SEL>,
+ <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K5_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_K6_SRC_DIV>,
+ <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S5_MCLK>,
+ <&topckgen CLK_TOP_AUD_I2S6_MCLK>,
+ <&topckgen CLK_TOP_ASM_M_SEL>,
+ <&topckgen CLK_TOP_ASM_H_SEL>,
+ <&topckgen CLK_TOP_UNIVPLL2_D4>,
+ <&topckgen CLK_TOP_UNIVPLL2_D2>,
+ <&topckgen CLK_TOP_SYSPLL_D5>;
+
+ clock-names = "infra_sys_audio_clk",
+ "top_audio_mux1_sel",
+ "top_audio_mux2_sel",
+ "top_audio_mux1_div",
+ "top_audio_mux2_div",
+ "top_audio_48k_timing",
+ "top_audio_44k_timing",
+ "top_audpll_mux_sel",
+ "top_apll_sel",
+ "top_aud1_pll_98M",
+ "top_aud2_pll_90M",
+ "top_hadds2_pll_98M",
+ "top_hadds2_pll_294M",
+ "top_audpll",
+ "top_audpll_d4",
+ "top_audpll_d8",
+ "top_audpll_d16",
+ "top_audpll_d24",
+ "top_audintbus_sel",
+ "clk_26m",
+ "top_syspll1_d4",
+ "top_aud_k1_src_sel",
+ "top_aud_k2_src_sel",
+ "top_aud_k3_src_sel",
+ "top_aud_k4_src_sel",
+ "top_aud_k5_src_sel",
+ "top_aud_k6_src_sel",
+ "top_aud_k1_src_div",
+ "top_aud_k2_src_div",
+ "top_aud_k3_src_div",
+ "top_aud_k4_src_div",
+ "top_aud_k5_src_div",
+ "top_aud_k6_src_div",
+ "top_aud_i2s1_mclk",
+ "top_aud_i2s2_mclk",
+ "top_aud_i2s3_mclk",
+ "top_aud_i2s4_mclk",
+ "top_aud_i2s5_mclk",
+ "top_aud_i2s6_mclk",
+ "top_asm_m_sel",
+ "top_asm_h_sel",
+ "top_univpll2_d4",
+ "top_univpll2_d2",
+ "top_syspll_d5";
+ };
+
mmc0: mmc@11230000 {
compatible = "mediatek,mt7623-mmc",
"mediatek,mt8135-mmc";
--
1.9.1
From: Sean Wang <[email protected]>
Add PWM nodes to the mt7623.dtsi file.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 56da5ba..cfafaea 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -243,6 +243,22 @@
status = "disabled";
};
+ pwm: pwm@11006000 {
+ compatible = "mediatek,mt7623-pwm";
+ reg = <0 0x11006000 0 0x1000>;
+ #pwm-cells = <2>;
+ clocks = <&topckgen CLK_TOP_PWM_SEL>,
+ <&pericfg CLK_PERI_PWM>,
+ <&pericfg CLK_PERI_PWM1>,
+ <&pericfg CLK_PERI_PWM2>,
+ <&pericfg CLK_PERI_PWM3>,
+ <&pericfg CLK_PERI_PWM4>,
+ <&pericfg CLK_PERI_PWM5>;
+ clock-names = "top", "main", "pwm1", "pwm2",
+ "pwm3", "pwm4", "pwm5";
+ status = "disabled";
+ };
+
i2c0: i2c@11007000 {
compatible = "mediatek,mt7623-i2c",
"mediatek,mt6577-i2c";
--
1.9.1
From: Sean Wang <[email protected]>
Add efuse nodes to the mt7623.dtsi file.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 0f82e1a..2289232 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -189,6 +189,17 @@
reg = <0 0x10200100 0 0x1c>;
};
+ efuse: efuse@10206000 {
+ compatible = "mediatek,mt7623-efuse",
+ "mediatek,mt8173-efuse";
+ reg = <0 0x10206000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ thermal_calibration_data: calib@424 {
+ reg = <0x424 0xc>;
+ };
+ };
+
apmixedsys: syscon@10209000 {
compatible = "mediatek,mt7623-apmixedsys",
"mediatek,mt2701-apmixedsys",
--
1.9.1
From: Sean Wang <[email protected]>
Add auxadc nodes to the mt7623.dtsi file.
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 707f0e5..0f82e1a 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -215,6 +215,15 @@
<0 0x10216000 0 0x2000>;
};
+ auxadc: adc@11001000 {
+ compatible = "mediatek,mt7623-auxadc",
+ "mediatek,mt2701-auxadc";
+ reg = <0 0x11001000 0 0x1000>;
+ clocks = <&pericfg CLK_PERI_AUXADC>;
+ clock-names = "main";
+ #io-channel-cells = <1>;
+ };
+
uart0: serial@11002000 {
compatible = "mediatek,mt7623-uart",
"mediatek,mt6577-uart";
--
1.9.1
From: John Crispin <[email protected]>
All versions of the mt7623n RFB have an USB port so enable the device.
There is a gpio that gets used to power up the port supply. Add support
for this gpio using the fixed-regulator driver.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623n-rfb.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623n-rfb.dtsi b/arch/arm/boot/dts/mt7623n-rfb.dtsi
index 4963e6a..2964b4c 100644
--- a/arch/arm/boot/dts/mt7623n-rfb.dtsi
+++ b/arch/arm/boot/dts/mt7623n-rfb.dtsi
@@ -28,6 +28,15 @@
serial1 = &uart1;
serial2 = &uart2;
};
+
+ usb_p1_vbus: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 135 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
};
&uart0 {
@@ -41,3 +50,12 @@
&uart2 {
status = "okay";
};
+
+&usb1 {
+ vbus-supply = <&usb_p1_vbus>;
+ status = "okay";
+};
+
+&u3phy1 {
+ status = "okay";
+};
--
1.9.1
From: John Crispin <[email protected]>
We need to tell the driver what the timers frequency is and that the core
has not be configured by the bootrom. Not doing so makes the unit not
boot.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index adb2393..3cc0a3a 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -77,6 +77,8 @@
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clock-frequency = <13000000>;
+ arm,cpu-registers-not-fw-configured;
};
topckgen: syscon@10000000 {
--
1.9.1
From: John Crispin <[email protected]>
Add PMIC wrapper node to the mt7623.dtsi file which
is necessary for the control of PMIC from Mediatek.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
---
arch/arm/boot/dts/mt7623.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 1942bc7..6adc21d 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -158,6 +158,19 @@
clock-names = "system-clk", "rtc-clk";
};
+ pwrap: pwrap@1000d000 {
+ compatible = "mediatek,mt7623-pwrap",
+ "mediatek,mt2701-pwrap";
+ reg = <0 0x1000d000 0 0x1000>;
+ reg-names = "pwrap";
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&infracfg MT2701_INFRA_PMIC_WRAP_RST>;
+ reset-names = "pwrap";
+ clocks = <&infracfg CLK_INFRA_PMICSPI>,
+ <&infracfg CLK_INFRA_PMICWRAP>;
+ clock-names = "spi", "wrap";
+ };
+
sysirq: interrupt-controller@10200100 {
compatible = "mediatek,mt7623-sysirq",
"mediatek,mt6577-sysirq";
--
1.9.1
From: Sean Wang <[email protected]>
Banana Pi team in Sinovoip Co., Limited which are dedicated to
design and manufacture open hardware product.
Website: http://www.banana-pi.org/
Signed-off-by: Sean Wang <[email protected]>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index ec0bfb9..8ca0f3c 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -44,6 +44,7 @@ avia avia semiconductor
avic Shanghai AVIC Optoelectronics Co., Ltd.
axentia Axentia Technologies AB
axis Axis Communications AB
+bananapi Banana Pi SINOVOP CO., LIMITED
boe BOE Technology Group Co., Ltd.
bosch Bosch Sensortec GmbH
boundary Boundary Devices Inc.
--
1.9.1
On Wed, Apr 26, 2017 at 11:25 AM, <[email protected]> wrote:
> From: Sean Wang <[email protected]>
>
> Add missing pinctrl binding these which would be used in
> devicetree related files.
>
> Signed-off-by: Sean Wang <[email protected]>
Patch applied. This way we avoid subsystem noise in the next
merge window.
Yours,
Linus Walleij
On Wed, Apr 26, 2017 at 11:25 AM, <[email protected]> wrote:
> From: Sean Wang <[email protected]>
>
> mt7623 pinctrl driver can be compatible with mt2701 one,
> so the patch reuses the driver and deletes those redundant
> ones.
>
> Cc: John Crispin <[email protected]>
> Signed-off-by: Sean Wang <[email protected]>
Partly correct.
> "mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl.
> - "mediatek,mt7623-pinctrl", compatible with mt7623 pinctrl.
NO don't do this.
"compatible" means exactly this: this hardware is compatible with
this driver. That is why we have it!
So instead of mt7623 pretending to be mt2701, let the mt2701 driver
list that it is compatible with mt7623, simple.
So patch pinctrl-mt2701.c mt2701_pctrl_match[] instead.
Yours,
Linus Walleij
On Wed, Apr 26, 2017 at 11:25 AM, <[email protected]> wrote:
> From: John Crispin <[email protected]>
>
> Add pin controller node to the mt7623.dtsi file
>
> Signed-off-by: John Crispin <[email protected]>
> Signed-off-by: Sean Wang <[email protected]>
(...)
> + pio: pinctrl@10005000 {
> + compatible = "mediatek,mt7623-pinctrl",
> + "mediatek,mt2701-pinctrl";
This looks right. And that is why we should not delete that compatible
string.
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij
On Wed, Apr 26, 2017 at 05:26:09PM +0800, [email protected] wrote:
> From: Sean Wang <[email protected]>
>
> There are 2 versions of the SoC. MT7623N is almost identical to MT7623A
> but has some additional multimedia features. The reference boards are
> available as NAND or MMC and might have a different ethernet setup. In
> order to reduce the duplication of devicetree code we add an intermediate
> dtsi file for these reference boards. Additionally Mediatek pointed out,
> that the EVB is yet another board and the board in question is infact the
> RFB. Take this into account while renaming the files.
You are breaking compatibility with existing DTs. Just document which
flavor you want "mediatek,mt7623" to refer to and add the new one. Or
just add 2 new strings but keep the old one.
>
> Signed-off-by: John Crispin <[email protected]>
> Signed-off-by: Sean Wang <[email protected]>
>
> ---
> Documentation/devicetree/bindings/arm/mediatek.txt | 6 ++--
> arch/arm/boot/dts/Makefile | 2 +-
> arch/arm/boot/dts/mt7623-evb.dts | 33 ----------------------
> arch/arm/boot/dts/mt7623n-rfb-nand.dts | 21 ++++++++++++++
> arch/arm/boot/dts/mt7623n-rfb.dtsi | 29 +++++++++++++++++++
> arch/arm/mach-mediatek/mediatek.c | 4 +--
> arch/arm/mach-mediatek/platsmp.c | 2 +-
> 7 files changed, 57 insertions(+), 40 deletions(-)
> delete mode 100644 arch/arm/boot/dts/mt7623-evb.dts
> create mode 100644 arch/arm/boot/dts/mt7623n-rfb-nand.dts
> create mode 100644 arch/arm/boot/dts/mt7623n-rfb.dtsi
>
> diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt
> index c860b24..7f7c804 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek.txt
> +++ b/Documentation/devicetree/bindings/arm/mediatek.txt
> @@ -12,7 +12,7 @@ compatible: Must contain one of
> "mediatek,mt6592"
> "mediatek,mt6755"
> "mediatek,mt6795"
> - "mediatek,mt7623"
> + "mediatek,mt7623n"
> "mediatek,mt8127"
> "mediatek,mt8135"
> "mediatek,mt8173"
On Wed, Apr 26, 2017 at 05:26:13PM +0800, [email protected] wrote:
> From: Sean Wang <[email protected]>
>
> Banana Pi team in Sinovoip Co., Limited which are dedicated to
> design and manufacture open hardware product.
>
> Website: http://www.banana-pi.org/
>
> Signed-off-by: Sean Wang <[email protected]>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
> index ec0bfb9..8ca0f3c 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
> @@ -44,6 +44,7 @@ avia avia semiconductor
> avic Shanghai AVIC Optoelectronics Co., Ltd.
> axentia Axentia Technologies AB
> axis Axis Communications AB
> +bananapi Banana Pi SINOVOP CO., LIMITED
s/SINOVOP/SINOVOIP/
> boe BOE Technology Group Co., Ltd.
> bosch Bosch Sensortec GmbH
> boundary Boundary Devices Inc.
> --
> 1.9.1
>