This adds support for the Synopsys DWMAC controller found in the
OX820SE SoC, by using almost the same glue code as the OX820.
Neil Armstrong (3):
dt-bindings: net: oxnas-dwmac: Add bindings for OX810SE
net: stmmac: dwmac-oxnas: Add support for OX810SE
ARM: dts: ox810se: Add Ethernet support
.../devicetree/bindings/net/oxnas-dwmac.txt | 3 +
arch/arm/boot/dts/ox810se-wd-mbwe.dts | 4 +
arch/arm/boot/dts/ox810se.dtsi | 18 ++++
.../net/ethernet/stmicro/stmmac/dwmac-oxnas.c | 92 ++++++++++++++-----
4 files changed, 95 insertions(+), 22 deletions(-)
--
2.25.1
Add SoC specific bindings for OX810SE support.
Signed-off-by: Neil Armstrong <[email protected]>
---
Documentation/devicetree/bindings/net/oxnas-dwmac.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/oxnas-dwmac.txt b/Documentation/devicetree/bindings/net/oxnas-dwmac.txt
index d7117a22fd87..27db496f1ce8 100644
--- a/Documentation/devicetree/bindings/net/oxnas-dwmac.txt
+++ b/Documentation/devicetree/bindings/net/oxnas-dwmac.txt
@@ -9,6 +9,9 @@ Required properties on all platforms:
- compatible: For the OX820 SoC, it should be :
- "oxsemi,ox820-dwmac" to select glue
- "snps,dwmac-3.512" to select IP version.
+ For the OX810SE SoC, it should be :
+ - "oxsemi,ox810se-dwmac" to select glue
+ - "snps,dwmac-3.512" to select IP version.
- clocks: Should contain phandles to the following clocks
- clock-names: Should contain the following:
--
2.25.1
Add support for OX810SE dwmac glue setup, which is a simplified version
of the OX820 introduced later with more control on the PHY interface.
Signed-off-by: Neil Armstrong <[email protected]>
---
.../net/ethernet/stmicro/stmmac/dwmac-oxnas.c | 92 ++++++++++++++-----
1 file changed, 70 insertions(+), 22 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c
index adfeb8d3293d..7ffa4a4eb30f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c
@@ -12,6 +12,7 @@
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>
@@ -48,12 +49,58 @@
#define DWMAC_RX_VARDELAY(d) ((d) << DWMAC_RX_VARDELAY_SHIFT)
#define DWMAC_RXN_VARDELAY(d) ((d) << DWMAC_RXN_VARDELAY_SHIFT)
+struct oxnas_dwmac;
+
+struct oxnas_dwmac_data {
+ void (*setup)(struct oxnas_dwmac *dwmac);
+};
+
struct oxnas_dwmac {
struct device *dev;
struct clk *clk;
struct regmap *regmap;
+ const struct oxnas_dwmac_data *data;
};
+static void oxnas_dwmac_setup_ox810se(struct oxnas_dwmac *dwmac)
+{
+ unsigned int value;
+
+ /* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
+ value = BIT(DWMAC_CKEN_GTX) |
+ /* Use simple mux for 25/125 Mhz clock switching */
+ BIT(DWMAC_SIMPLE_MUX);
+
+ regmap_write(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, value);
+}
+
+static void oxnas_dwmac_setup_ox820(struct oxnas_dwmac *dwmac)
+{
+ unsigned int value;
+
+ /* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
+ value = BIT(DWMAC_CKEN_GTX) |
+ /* Use simple mux for 25/125 Mhz clock switching */
+ BIT(DWMAC_SIMPLE_MUX) |
+ /* set auto switch tx clock source */
+ BIT(DWMAC_AUTO_TX_SOURCE) |
+ /* enable tx & rx vardelay */
+ BIT(DWMAC_CKEN_TX_OUT) |
+ BIT(DWMAC_CKEN_TXN_OUT) |
+ BIT(DWMAC_CKEN_TX_IN) |
+ BIT(DWMAC_CKEN_RX_OUT) |
+ BIT(DWMAC_CKEN_RXN_OUT) |
+ BIT(DWMAC_CKEN_RX_IN);
+ regmap_write(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, value);
+
+ /* set tx & rx vardelay */
+ value = DWMAC_TX_VARDELAY(4) |
+ DWMAC_TXN_VARDELAY(2) |
+ DWMAC_RX_VARDELAY(10) |
+ DWMAC_RXN_VARDELAY(8);
+ regmap_write(dwmac->regmap, OXNAS_DWMAC_DELAY_REGOFFSET, value);
+}
+
static int oxnas_dwmac_init(struct platform_device *pdev, void *priv)
{
struct oxnas_dwmac *dwmac = priv;
@@ -75,27 +122,7 @@ static int oxnas_dwmac_init(struct platform_device *pdev, void *priv)
return ret;
}
- /* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
- value |= BIT(DWMAC_CKEN_GTX) |
- /* Use simple mux for 25/125 Mhz clock switching */
- BIT(DWMAC_SIMPLE_MUX) |
- /* set auto switch tx clock source */
- BIT(DWMAC_AUTO_TX_SOURCE) |
- /* enable tx & rx vardelay */
- BIT(DWMAC_CKEN_TX_OUT) |
- BIT(DWMAC_CKEN_TXN_OUT) |
- BIT(DWMAC_CKEN_TX_IN) |
- BIT(DWMAC_CKEN_RX_OUT) |
- BIT(DWMAC_CKEN_RXN_OUT) |
- BIT(DWMAC_CKEN_RX_IN);
- regmap_write(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, value);
-
- /* set tx & rx vardelay */
- value = DWMAC_TX_VARDELAY(4) |
- DWMAC_TXN_VARDELAY(2) |
- DWMAC_RX_VARDELAY(10) |
- DWMAC_RXN_VARDELAY(8);
- regmap_write(dwmac->regmap, OXNAS_DWMAC_DELAY_REGOFFSET, value);
+ dwmac->data->setup(dwmac);
return 0;
}
@@ -128,6 +155,12 @@ static int oxnas_dwmac_probe(struct platform_device *pdev)
goto err_remove_config_dt;
}
+ dwmac->data = (const struct oxnas_dwmac_data *)of_device_get_match_data(&pdev->dev);
+ if (!dwmac->data) {
+ ret = -EINVAL;
+ goto err_remove_config_dt;
+ }
+
dwmac->dev = &pdev->dev;
plat_dat->bsp_priv = dwmac;
plat_dat->init = oxnas_dwmac_init;
@@ -166,8 +199,23 @@ static int oxnas_dwmac_probe(struct platform_device *pdev)
return ret;
}
+static const struct oxnas_dwmac_data ox810se_dwmac_data = {
+ .setup = oxnas_dwmac_setup_ox810se,
+};
+
+static const struct oxnas_dwmac_data ox820_dwmac_data = {
+ .setup = oxnas_dwmac_setup_ox820,
+};
+
static const struct of_device_id oxnas_dwmac_match[] = {
- { .compatible = "oxsemi,ox820-dwmac" },
+ {
+ .compatible = "oxsemi,ox810se-dwmac",
+ .data = &ox810se_dwmac_data,
+ },
+ {
+ .compatible = "oxsemi,ox820-dwmac",
+ .data = &ox820_dwmac_data,
+ },
{ }
};
MODULE_DEVICE_TABLE(of, oxnas_dwmac_match);
--
2.25.1
On Mon, 3 Jan 2022 18:56:35 +0100 Neil Armstrong wrote:
> This adds support for the Synopsys DWMAC controller found in the
> OX820SE SoC, by using almost the same glue code as the OX820.
>
> Neil Armstrong (3):
> dt-bindings: net: oxnas-dwmac: Add bindings for OX810SE
> net: stmmac: dwmac-oxnas: Add support for OX810SE
> ARM: dts: ox810se: Add Ethernet support
Judging by the subject tag on patches 1 and 2 and To: I presume you
intend this series to be merged via net-next? Can you please repost
with patch 3 CCed to netdev as well? It didn't register in patchwork.
Hi,
On 04/01/2022 05:06, Jakub Kicinski wrote:
> On Mon, 3 Jan 2022 18:56:35 +0100 Neil Armstrong wrote:
>> This adds support for the Synopsys DWMAC controller found in the
>> OX820SE SoC, by using almost the same glue code as the OX820.
>>
>> Neil Armstrong (3):
>> dt-bindings: net: oxnas-dwmac: Add bindings for OX810SE
>> net: stmmac: dwmac-oxnas: Add support for OX810SE
>> ARM: dts: ox810se: Add Ethernet support
>
> Judging by the subject tag on patches 1 and 2 and To: I presume you
> intend this series to be merged via net-next? Can you please repost
> with patch 3 CCed to netdev as well? It didn't register in patchwork.
It was on purpose, I planned to push the DT through arm-soc, sorry it wasn't
explicit in the cover letter.
Neil
Add nodes for the embedded Synopsys DWMAC Ethernet controller.
Signed-off-by: Neil Armstrong <[email protected]>
---
arch/arm/boot/dts/ox810se-wd-mbwe.dts | 4 ++++
arch/arm/boot/dts/ox810se.dtsi | 18 ++++++++++++++++++
2 files changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/ox810se-wd-mbwe.dts b/arch/arm/boot/dts/ox810se-wd-mbwe.dts
index 7e2fcb220aea..c59e06ff2423 100644
--- a/arch/arm/boot/dts/ox810se-wd-mbwe.dts
+++ b/arch/arm/boot/dts/ox810se-wd-mbwe.dts
@@ -103,6 +103,10 @@ rtc0: rtc@48 {
};
};
+ða {
+ status = "okay";
+};
+
&uart1 {
status = "okay";
diff --git a/arch/arm/boot/dts/ox810se.dtsi b/arch/arm/boot/dts/ox810se.dtsi
index 0755e5864c4a..96c0745f7b70 100644
--- a/arch/arm/boot/dts/ox810se.dtsi
+++ b/arch/arm/boot/dts/ox810se.dtsi
@@ -81,6 +81,24 @@ soc {
ranges;
interrupt-parent = <&intc>;
+ etha: ethernet@40400000 {
+ compatible = "oxsemi,ox810se-dwmac", "snps,dwmac";
+ reg = <0x40400000 0x2000>;
+ interrupts = <8>;
+ interrupt-names = "macirq";
+ mac-address = [000000000000]; /* Filled in by U-Boot */
+ phy-mode = "rgmii";
+
+ clocks = <&stdclk 6>, <&gmacclk>;
+ clock-names = "gmac", "stmmaceth";
+ resets = <&reset 6>;
+
+ /* Regmap for sys registers */
+ oxsemi,sys-ctrl = <&sys>;
+
+ status = "disabled";
+ };
+
apb-bridge@44000000 {
#address-cells = <1>;
#size-cells = <1>;
--
2.25.1
On 03/01/2022 18:56, Neil Armstrong wrote:
> Add support for OX810SE dwmac glue setup, which is a simplified version
> of the OX820 introduced later with more control on the PHY interface.
>
> Signed-off-by: Neil Armstrong <[email protected]>
> ---
> .../net/ethernet/stmicro/stmmac/dwmac-oxnas.c | 92 ++++++++++++++-----
> 1 file changed, 70 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c
> index adfeb8d3293d..7ffa4a4eb30f 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c
> @@ -12,6 +12,7 @@
> #include <linux/io.h>
> #include <linux/module.h>
> #include <linux/of.h>
> +#include <linux/of_device.h>
> #include <linux/platform_device.h>
> #include <linux/regmap.h>
> #include <linux/mfd/syscon.h>
> @@ -48,12 +49,58 @@
> #define DWMAC_RX_VARDELAY(d) ((d) << DWMAC_RX_VARDELAY_SHIFT)
> #define DWMAC_RXN_VARDELAY(d) ((d) << DWMAC_RXN_VARDELAY_SHIFT)
>
> +struct oxnas_dwmac;
> +
> +struct oxnas_dwmac_data {
> + void (*setup)(struct oxnas_dwmac *dwmac);
> +};
> +
> struct oxnas_dwmac {
> struct device *dev;
> struct clk *clk;
> struct regmap *regmap;
> + const struct oxnas_dwmac_data *data;
> };
>
> +static void oxnas_dwmac_setup_ox810se(struct oxnas_dwmac *dwmac)
> +{
> + unsigned int value;
> +
> + /* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
> + value = BIT(DWMAC_CKEN_GTX) |
> + /* Use simple mux for 25/125 Mhz clock switching */
> + BIT(DWMAC_SIMPLE_MUX);
> +
> + regmap_write(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, value);
> +}
> +
> +static void oxnas_dwmac_setup_ox820(struct oxnas_dwmac *dwmac)
> +{
> + unsigned int value;
> +
> + /* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
> + value = BIT(DWMAC_CKEN_GTX) |
> + /* Use simple mux for 25/125 Mhz clock switching */
> + BIT(DWMAC_SIMPLE_MUX) |
> + /* set auto switch tx clock source */
> + BIT(DWMAC_AUTO_TX_SOURCE) |
> + /* enable tx & rx vardelay */
> + BIT(DWMAC_CKEN_TX_OUT) |
> + BIT(DWMAC_CKEN_TXN_OUT) |
> + BIT(DWMAC_CKEN_TX_IN) |
> + BIT(DWMAC_CKEN_RX_OUT) |
> + BIT(DWMAC_CKEN_RXN_OUT) |
> + BIT(DWMAC_CKEN_RX_IN);
> + regmap_write(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, value);
> +
> + /* set tx & rx vardelay */
> + value = DWMAC_TX_VARDELAY(4) |
> + DWMAC_TXN_VARDELAY(2) |
> + DWMAC_RX_VARDELAY(10) |
> + DWMAC_RXN_VARDELAY(8);
> + regmap_write(dwmac->regmap, OXNAS_DWMAC_DELAY_REGOFFSET, value);
> +}
> +
> static int oxnas_dwmac_init(struct platform_device *pdev, void *priv)
> {
> struct oxnas_dwmac *dwmac = priv;
> @@ -75,27 +122,7 @@ static int oxnas_dwmac_init(struct platform_device *pdev, void *priv)
> return ret;
> }
There's an issue with the patch, the value read from register is not used, I'll send a V2 with the fix.
Neil
>
> - /* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
> - value |= BIT(DWMAC_CKEN_GTX) |
> - /* Use simple mux for 25/125 Mhz clock switching */
> - BIT(DWMAC_SIMPLE_MUX) |
> - /* set auto switch tx clock source */
> - BIT(DWMAC_AUTO_TX_SOURCE) |
> - /* enable tx & rx vardelay */
> - BIT(DWMAC_CKEN_TX_OUT) |
> - BIT(DWMAC_CKEN_TXN_OUT) |
> - BIT(DWMAC_CKEN_TX_IN) |
> - BIT(DWMAC_CKEN_RX_OUT) |
> - BIT(DWMAC_CKEN_RXN_OUT) |
> - BIT(DWMAC_CKEN_RX_IN);
> - regmap_write(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, value);
> -
> - /* set tx & rx vardelay */
> - value = DWMAC_TX_VARDELAY(4) |
> - DWMAC_TXN_VARDELAY(2) |
> - DWMAC_RX_VARDELAY(10) |
> - DWMAC_RXN_VARDELAY(8);
> - regmap_write(dwmac->regmap, OXNAS_DWMAC_DELAY_REGOFFSET, value);
> + dwmac->data->setup(dwmac);
>
> return 0;
> }
> @@ -128,6 +155,12 @@ static int oxnas_dwmac_probe(struct platform_device *pdev)
> goto err_remove_config_dt;
> }
>
> + dwmac->data = (const struct oxnas_dwmac_data *)of_device_get_match_data(&pdev->dev);
> + if (!dwmac->data) {
> + ret = -EINVAL;
> + goto err_remove_config_dt;
> + }
> +
> dwmac->dev = &pdev->dev;
> plat_dat->bsp_priv = dwmac;
> plat_dat->init = oxnas_dwmac_init;
> @@ -166,8 +199,23 @@ static int oxnas_dwmac_probe(struct platform_device *pdev)
> return ret;
> }
>
> +static const struct oxnas_dwmac_data ox810se_dwmac_data = {
> + .setup = oxnas_dwmac_setup_ox810se,
> +};
> +
> +static const struct oxnas_dwmac_data ox820_dwmac_data = {
> + .setup = oxnas_dwmac_setup_ox820,
> +};
> +
> static const struct of_device_id oxnas_dwmac_match[] = {
> - { .compatible = "oxsemi,ox820-dwmac" },
> + {
> + .compatible = "oxsemi,ox810se-dwmac",
> + .data = &ox810se_dwmac_data,
> + },
> + {
> + .compatible = "oxsemi,ox820-dwmac",
> + .data = &ox820_dwmac_data,
> + },
> { }
> };
> MODULE_DEVICE_TABLE(of, oxnas_dwmac_match);
>