Add support for octal mode IO data transfer.
Micron flash, mt35xu512aba, supports octal mode data transfer and
NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
Patch series
* Add support for octal mode flags and parsing of same in spi driver.
* Add opcodes for octal I/O commands in spi-nor framework, Read and Write proto for (1-1-8/1-8-8) mode.
Opcodes are added as per octal data IO commands required for mt35xu512aba [1] flash.
* Add parsing logic for spi-mem framework and m25p80.c device file.
* Add mode bit required for octal mode in nxp-fspi driver [2].
* Define binding property 'spi-rx/tx-bus-width' for LX2160ARDB target [2].
Cherry pick below 2 patches (from: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git):
c639f871febe6667d9afce28108c634e5636c735 spi: spi-mem: Fix inverted logic in op sanity check
db122eb8a749a1eff038f9a282c620ab16c4be1d spi: spi-mem: Add extra sanity checks on the op param
Tested on LX2160ARDB target with nxp-fspi driver, below are
Read performance number of 1-1-1 and 1-1-8 read protocol.
root@lxxx:~# cat /proc/mtd
dev: size erasesize name
mtd0: 04000000 00001000 "spi0.0"
mtd1: 04000000 00001000 "spi0.1"
root@lxxx:~# time mtd_debug read /dev/mtd0 0x0 0x1000000 0read
Copied 16777216 bytes from address 0x00000000 in flash to 0read
real 0m2.792s
user 0m0.000s
sys 0m2.790s
root@lxxx:~# time mtd_debug read /dev/mtd1 0x0 0x1000000 0read
Copied 16777216 bytes from address 0x00000000 in flash to 0read
real 0m0.441s
user 0m0.000s
sys 0m0.440s
root@ls1012ardb:~#
Flash device MTD0 configured in 1-1-1 protocol.
Flash device MTD1 configured in 1-1-8 protocol.
[1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70384
[2] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70210
Yogesh Gaur (7):
spi: add support for octal I/O data transfer
mtd: spi-nor: add opcodes for octal Read/Write commands
mtd: spi-nor: add octal read flag for flash mt35xu512aba
mtd: m25p80: add support of octal I/O transfer
spi: spi-mem: add support for octal I/O data transfer
spi: nxp-fspi: add mode flag bit for octal support
arm64: dts: lx2160a: update fspi node
Changes for v2:
Incorporated review comments of Boris and Vignesh.
arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++
drivers/mtd/devices/m25p80.c | 9 ++++++++-
drivers/mtd/spi-nor/spi-nor.c | 15 ++++++++++++++-
drivers/spi/spi-mem.c | 9 ++++++++-
drivers/spi/spi-nxp-fspi.c | 4 ++--
drivers/spi/spi.c | 6 ++++++
include/linux/mtd/spi-nor.h | 8 ++++++++
include/linux/spi/spi.h | 2 ++
8 files changed, 52 insertions(+), 5 deletions(-)
--
2.7.4
Add flags for Octal I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTAL: transmit with 8 wires
SPI_RX_OCTAL: receive with 8 wires
Signed-off-by: Yogesh Gaur <[email protected]>
---
Changes for v2:
Incorporated review comments of Boris.
drivers/spi/spi.c | 6 ++++++
include/linux/spi/spi.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index ec395a6..80f672f 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1573,6 +1573,9 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
case 4:
spi->mode |= SPI_TX_QUAD;
break;
+ case 8:
+ spi->mode |= SPI_TX_OCTAL;
+ break;
default:
dev_warn(&ctlr->dev,
"spi-tx-bus-width %d not supported\n",
@@ -1591,6 +1594,9 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
case 4:
spi->mode |= SPI_RX_QUAD;
break;
+ case 8:
+ spi->mode |= SPI_RX_OCTAL;
+ break;
default:
dev_warn(&ctlr->dev,
"spi-rx-bus-width %d not supported\n",
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index a64235e..2d21307 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -163,6 +163,8 @@ struct spi_device {
#define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
#define SPI_RX_DUAL 0x400 /* receive with 2 wires */
#define SPI_RX_QUAD 0x800 /* receive with 4 wires */
+#define SPI_TX_OCTAL 0x1000 /* transmit with 8 wires */
+#define SPI_RX_OCTAL 0x2000 /* receive with 8 wires */
int irq;
void *controller_state;
void *controller_data;
--
2.7.4
- Add opcodes for octal I/O commands
* Read : 1-1-8 and 1-8-8 protocol
* Write : 1-1-8 and 1-8-8 protocol
* opcodes for 4-byte address mode command
- Entry of macros in _convert_3to4_xxx function
- Add flag specifying flash support octal read commands.
Signed-off-by: Vignesh R <[email protected]>
Signed-off-by: Yogesh Gaur <[email protected]>
---
Changes for v2:
Incorporated review comments of Boris and Vignesh
drivers/mtd/spi-nor/spi-nor.c | 12 ++++++++++++
include/linux/mtd/spi-nor.h | 8 ++++++++
2 files changed, 20 insertions(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 0b8a6e0..7c64ff0 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -90,6 +90,7 @@ struct flash_info {
#define NO_CHIP_ERASE BIT(12) /* Chip does not support chip erase */
#define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */
#define USE_CLSR BIT(14) /* use CLSR command */
+#define SPI_NOR_OCTAL_READ BIT(15) /* Flash supports Octal Read */
int (*quad_enable)(struct spi_nor *nor);
};
@@ -209,6 +210,8 @@ static inline u8 spi_nor_convert_3to4_read(u8 opcode)
{ SPINOR_OP_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B },
{ SPINOR_OP_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B },
{ SPINOR_OP_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B },
+ { SPINOR_OP_READ_1_1_8, SPINOR_OP_READ_1_1_8_4B },
+ { SPINOR_OP_READ_1_8_8, SPINOR_OP_READ_1_8_8_4B },
{ SPINOR_OP_READ_1_1_1_DTR, SPINOR_OP_READ_1_1_1_DTR_4B },
{ SPINOR_OP_READ_1_2_2_DTR, SPINOR_OP_READ_1_2_2_DTR_4B },
@@ -225,6 +228,8 @@ static inline u8 spi_nor_convert_3to4_program(u8 opcode)
{ SPINOR_OP_PP, SPINOR_OP_PP_4B },
{ SPINOR_OP_PP_1_1_4, SPINOR_OP_PP_1_1_4_4B },
{ SPINOR_OP_PP_1_4_4, SPINOR_OP_PP_1_4_4_4B },
+ { SPINOR_OP_PP_1_1_8, SPINOR_OP_PP_1_1_8_4B },
+ { SPINOR_OP_PP_1_8_8, SPINOR_OP_PP_1_8_8_4B },
};
return spi_nor_convert_opcode(opcode, spi_nor_3to4_program,
@@ -3195,6 +3200,13 @@ static int spi_nor_init_params(struct spi_nor *nor,
SNOR_PROTO_1_1_4);
}
+ if (info->flags & SPI_NOR_OCTAL_READ) {
+ params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
+ spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_1_8],
+ 0, 8, SPINOR_OP_READ_1_1_8,
+ SNOR_PROTO_1_1_8);
+ }
+
/* Page Program settings. */
params->hwcaps.mask |= SNOR_HWCAPS_PP;
spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP],
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 8b1acf6..019f534 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -50,9 +50,13 @@
#define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */
#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */
#define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */
+#define SPINOR_OP_READ_1_1_8 0x8b /* Read data bytes (Octal Output SPI) */
+#define SPINOR_OP_READ_1_8_8 0xcb /* Read data bytes (Octal I/O SPI) */
#define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */
#define SPINOR_OP_PP_1_1_4 0x32 /* Quad page program */
#define SPINOR_OP_PP_1_4_4 0x38 /* Quad page program */
+#define SPINOR_OP_PP_1_1_8 0x82 /* Octal page program */
+#define SPINOR_OP_PP_1_8_8 0xc2 /* Octal page program */
#define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */
#define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */
#define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */
@@ -73,9 +77,13 @@
#define SPINOR_OP_READ_1_2_2_4B 0xbc /* Read data bytes (Dual I/O SPI) */
#define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */
#define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */
+#define SPINOR_OP_READ_1_1_8_4B 0x7c /* Read data bytes (Octal Output SPI) */
+#define SPINOR_OP_READ_1_8_8_4B 0xcc /* Read data bytes (Octal I/O SPI) */
#define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */
#define SPINOR_OP_PP_1_1_4_4B 0x34 /* Quad page program */
#define SPINOR_OP_PP_1_4_4_4B 0x3e /* Quad page program */
+#define SPINOR_OP_PP_1_1_8_4B 0x84 /* Octal page program */
+#define SPINOR_OP_PP_1_8_8_4B 0x8e /* Octal page program */
#define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */
#define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */
#define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */
--
2.7.4
Add octal read flag for flash mt35xu512aba.
This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does
not seem to support newer JESD216C standard that provides auto
detection of Octal mode capabilities and opcodes. Therefore, this
capability is manually added using new SPI_NOR_OCTAL_READ flag.
Signed-off-by: Vignesh R <[email protected]>
Signed-off-by: Yogesh Gaur <[email protected]>
---
Changes for v2:
Incorporated review comments of Boris and Vignesh
drivers/mtd/spi-nor/spi-nor.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 7c64ff0..574f3e6 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1413,7 +1413,8 @@ static const struct flash_info spi_nor_ids[] = {
/* Micron */
{
"mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512,
- SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES)
+ SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ |
+ SPI_NOR_4B_OPCODES)
},
/* PMC */
--
2.7.4
Add support for octal I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octal transfer.
Signed-off-by: Yogesh Gaur <[email protected]>
---
Changes for v2:
Incorporated review comments of Boris.
drivers/mtd/devices/m25p80.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index cb14cf9..e5e632c 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -175,7 +175,14 @@ static int m25p_probe(struct spi_mem *spimem)
spi_mem_set_drvdata(spimem, flash);
flash->spimem = spimem;
- if (spi->mode & SPI_RX_QUAD) {
+ if (spi->mode & SPI_RX_OCTAL) {
+ hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
+
+ if (spi->mode & SPI_TX_OCTAL)
+ hwcaps.mask |= (SNOR_HWCAPS_READ_1_8_8 |
+ SNOR_HWCAPS_PP_1_1_8 |
+ SNOR_HWCAPS_PP_1_8_8);
+ } else if (spi->mode & SPI_RX_QUAD) {
hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
if (spi->mode & SPI_TX_QUAD)
--
2.7.4
Add support for octal I/O data transfer in spi-mem framework.
Signed-off-by: Yogesh Gaur <[email protected]>
---
Changes for v2:
Patch added in v2 version.
drivers/spi/spi-mem.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index c6bdea7..6fa95f8 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -12,7 +12,7 @@
#include "internals.h"
-#define SPI_MEM_MAX_BUSWIDTH 4
+#define SPI_MEM_MAX_BUSWIDTH 8
/**
* spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
@@ -121,6 +121,13 @@ static int spi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx)
break;
+ case 8:
+ if ((tx && (mode & SPI_TX_OCTAL)) ||
+ (!tx && (mode & SPI_RX_OCTAL)))
+ return 0;
+
+ break;
+
default:
break;
}
--
2.7.4
Add mode flags for octal I/O data transfer support.
NXP FlexSPI controller supports octal mode data transfer.
Signed-off-by: Yogesh Gaur <[email protected]>
---
Changes for v2:
None
drivers/spi/spi-nxp-fspi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 67eea88..c48ca94 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -993,8 +993,8 @@ static int nxp_fspi_probe(struct platform_device *pdev)
if (!ctlr)
return -ENOMEM;
- ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD |
- SPI_TX_DUAL | SPI_TX_QUAD;
+ ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL |
+ SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL;
f = spi_controller_get_devdata(ctlr);
f->dev = dev;
--
2.7.4
Flash mt35xu512aba connected to FlexSPI controller supports
1-1-8/1-8-8 protocol.
Added flag spi-rx-bus-width and spi-tx-bus-width with values as
8 and 8 respectively for both flashes connected at CS0 and CS1.
Signed-off-by: Yogesh Gaur <[email protected]>
---
Changes for v2:
None
arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 3b20c97..24cc41c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -45,6 +45,8 @@
m25p,fast-read;
spi-max-frequency = <20000000>;
reg = <0>;
+ spi-rx-bus-width = <8>;
+ spi-tx-bus-width = <8>;
};
mt35xu512aba1: flash@1 {
@@ -54,6 +56,8 @@
m25p,fast-read;
spi-max-frequency = <20000000>;
reg = <1>;
+ spi-rx-bus-width = <8>;
+ spi-tx-bus-width = <8>;
};
};
--
2.7.4
Hi Yogesh,
On Mon, 15 Oct 2018 11:47:55 +0000
Yogesh Narayan Gaur <[email protected]> wrote:
> Add support for octal mode IO data transfer.
> Micron flash, mt35xu512aba, supports octal mode data transfer and
> NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
>
> Patch series
> * Add support for octal mode flags and parsing of same in spi driver.
> * Add opcodes for octal I/O commands in spi-nor framework, Read and Write proto for (1-1-8/1-8-8) mode.
> Opcodes are added as per octal data IO commands required for mt35xu512aba [1] flash.
> * Add parsing logic for spi-mem framework and m25p80.c device file.
> * Add mode bit required for octal mode in nxp-fspi driver [2].
> * Define binding property 'spi-rx/tx-bus-width' for LX2160ARDB target [2].
>
> Cherry pick below 2 patches (from: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git):
> c639f871febe6667d9afce28108c634e5636c735 spi: spi-mem: Fix inverted logic in op sanity check
> db122eb8a749a1eff038f9a282c620ab16c4be1d spi: spi-mem: Add extra sanity checks on the op param
>
> Tested on LX2160ARDB target with nxp-fspi driver, below are
> Read performance number of 1-1-1 and 1-1-8 read protocol.
>
> root@lxxx:~# cat /proc/mtd
> dev: size erasesize name
> mtd0: 04000000 00001000 "spi0.0"
> mtd1: 04000000 00001000 "spi0.1"
> root@lxxx:~# time mtd_debug read /dev/mtd0 0x0 0x1000000 0read
> Copied 16777216 bytes from address 0x00000000 in flash to 0read
>
> real 0m2.792s
> user 0m0.000s
> sys 0m2.790s
> root@lxxx:~# time mtd_debug read /dev/mtd1 0x0 0x1000000 0read
> Copied 16777216 bytes from address 0x00000000 in flash to 0read
>
> real 0m0.441s
> user 0m0.000s
> sys 0m0.440s
> root@ls1012ardb:~#
>
> Flash device MTD0 configured in 1-1-1 protocol.
> Flash device MTD1 configured in 1-1-8 protocol.
>
> [1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70384
> [2] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70210
>
> Yogesh Gaur (7):
> spi: add support for octal I/O data transfer
> mtd: spi-nor: add opcodes for octal Read/Write commands
> mtd: spi-nor: add octal read flag for flash mt35xu512aba
> mtd: m25p80: add support of octal I/O transfer
> spi: spi-mem: add support for octal I/O data transfer
Patch 5 should be moved before patch 4 (ideally in 2nd position) if
you want this series to be bisectable.
Regards,
Boris
> spi: nxp-fspi: add mode flag bit for octal support
> arm64: dts: lx2160a: update fspi node
>
> Changes for v2:
> Incorporated review comments of Boris and Vignesh.
>
> arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++
> drivers/mtd/devices/m25p80.c | 9 ++++++++-
> drivers/mtd/spi-nor/spi-nor.c | 15 ++++++++++++++-
> drivers/spi/spi-mem.c | 9 ++++++++-
> drivers/spi/spi-nxp-fspi.c | 4 ++--
> drivers/spi/spi.c | 6 ++++++
> include/linux/mtd/spi-nor.h | 8 ++++++++
> include/linux/spi/spi.h | 2 ++
> 8 files changed, 52 insertions(+), 5 deletions(-)
>
Hi Boris,
> -----Original Message-----
> From: Boris Brezillon [mailto:[email protected]]
> Sent: Monday, October 15, 2018 5:24 PM
> To: Yogesh Narayan Gaur <[email protected]>
> Cc: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; linux-arm-
> [email protected]; [email protected];
> [email protected]; [email protected]
> Subject: Re: [PATCH v2 0/7] spi: add support for octal mode
>
> Hi Yogesh,
>
> On Mon, 15 Oct 2018 11:47:55 +0000
> Yogesh Narayan Gaur <[email protected]> wrote:
>
> > Add support for octal mode IO data transfer.
> > Micron flash, mt35xu512aba, supports octal mode data transfer and NXP
> > FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
> >
> > Patch series
> > * Add support for octal mode flags and parsing of same in spi driver.
> > * Add opcodes for octal I/O commands in spi-nor framework, Read and Write
> proto for (1-1-8/1-8-8) mode.
> > Opcodes are added as per octal data IO commands required for
> mt35xu512aba [1] flash.
> > * Add parsing logic for spi-mem framework and m25p80.c device file.
> > * Add mode bit required for octal mode in nxp-fspi driver [2].
> > * Define binding property 'spi-rx/tx-bus-width' for LX2160ARDB target [2].
> >
> > Cherry pick below 2 patches (from:
> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.ker
> nel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Fbroonie%2Fspi.git&da
> ta=02%7C01%7Cyogeshnarayan.gaur%40nxp.com%7C9af69996cae344b6e7b70
> 8d63294eaf5%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6367520
> 12521352025&sdata=euwK9X2tael3Q69QO%2BirRznB%2BHKazDbumdAOp
> eZvxCc%3D&reserved=0):
> > c639f871febe6667d9afce28108c634e5636c735 spi: spi-mem: Fix inverted
> logic in op sanity check
> > db122eb8a749a1eff038f9a282c620ab16c4be1d spi: spi-mem: Add extra
> > sanity checks on the op param
> >
> > Tested on LX2160ARDB target with nxp-fspi driver, below are Read
> > performance number of 1-1-1 and 1-1-8 read protocol.
> >
> > root@lxxx:~# cat /proc/mtd
> > dev: size erasesize name
> > mtd0: 04000000 00001000 "spi0.0"
> > mtd1: 04000000 00001000 "spi0.1"
> > root@lxxx:~# time mtd_debug read /dev/mtd0 0x0 0x1000000 0read
> > Copied 16777216 bytes from address 0x00000000 in flash to 0read
> >
> > real 0m2.792s
> > user 0m0.000s
> > sys 0m2.790s
> > root@lxxx:~# time mtd_debug read /dev/mtd1 0x0 0x1000000 0read
> > Copied 16777216 bytes from address 0x00000000 in flash to 0read
> >
> > real 0m0.441s
> > user 0m0.000s
> > sys 0m0.440s
> > root@ls1012ardb:~#
> >
> > Flash device MTD0 configured in 1-1-1 protocol.
> > Flash device MTD1 configured in 1-1-8 protocol.
> >
> > [1]
> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
> > chwork.ozlabs.org%2Fproject%2Flinux-
> mtd%2Flist%2F%3Fseries%3D70384&
> > ;data=02%7C01%7Cyogeshnarayan.gaur%40nxp.com%7C9af69996cae344b6e
> 7b708d
> >
> 63294eaf5%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636752012
> 521352
> >
> 025&sdata=ldk0ny8vksO%2FayIsYX26M4akFUojtaP1YyOtpMEGJZA%3D&a
> mp;res
> > erved=0 [2]
> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
> > chwork.ozlabs.org%2Fproject%2Flinux-
> mtd%2Flist%2F%3Fseries%3D70210&
> > ;data=02%7C01%7Cyogeshnarayan.gaur%40nxp.com%7C9af69996cae344b6e
> 7b708d
> >
> 63294eaf5%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636752012
> 521352
> >
> 025&sdata=wq%2BCnrk4Ovx4itHrZfv%2FGH5raStF91hfjHBQmO9Sjq0%3D&
> amp;r
> > eserved=0
> >
> > Yogesh Gaur (7):
> > spi: add support for octal I/O data transfer
> > mtd: spi-nor: add opcodes for octal Read/Write commands
> > mtd: spi-nor: add octal read flag for flash mt35xu512aba
> > mtd: m25p80: add support of octal I/O transfer
> > spi: spi-mem: add support for octal I/O data transfer
>
> Patch 5 should be moved before patch 4 (ideally in 2nd position) if you want this
> series to be bisectable.
>
Ok.
For now, order which I have selected is as per the comments from Vignesh. Would resend again with the suggested order.
--
Regards
Yogesh Gaur
> Regards,
>
> Boris
>
> > spi: nxp-fspi: add mode flag bit for octal support
> > arm64: dts: lx2160a: update fspi node
> >
> > Changes for v2:
> > Incorporated review comments of Boris and Vignesh.
> >
> > arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++
> > drivers/mtd/devices/m25p80.c | 9 ++++++++-
> > drivers/mtd/spi-nor/spi-nor.c | 15 ++++++++++++++-
> > drivers/spi/spi-mem.c | 9 ++++++++-
> > drivers/spi/spi-nxp-fspi.c | 4 ++--
> > drivers/spi/spi.c | 6 ++++++
> > include/linux/mtd/spi-nor.h | 8 ++++++++
> > include/linux/spi/spi.h | 2 ++
> > 8 files changed, 52 insertions(+), 5 deletions(-)
> >