2019-02-27 01:29:33

by Anson Huang

Subject: [PATCH RESEND V2 1/2] clk: imx8mq: add GPIO clocks to clock tree

i.MX8MQ has clock gate for each GPIO bank, add them
into clock tree for GPIO driver to manage.

Signed-off-by: Anson Huang <[email protected]>
---
No changes, just rebase to clk-next.
---
drivers/clk/imx/clk-imx8mq.c | 5 +++++
include/dt-bindings/clock/imx8mq-clock.h | 8 +++++++-
2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 01c771f..789dc8e 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -510,6 +510,11 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
clks[IMX8MQ_CLK_ECSPI2_ROOT] = imx_clk_gate4("ecspi2_root_clk", "ecspi2", base + 0x4080, 0);
clks[IMX8MQ_CLK_ECSPI3_ROOT] = imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0);
clks[IMX8MQ_CLK_ENET1_ROOT] = imx_clk_gate4("enet1_root_clk", "enet_axi", base + 0x40a0, 0);
+ clks[IMX8MQ_CLK_GPIO1_ROOT] = imx_clk_gate4("gpio1_root_clk", "ipg_root", base + 0x40b0, 0);
+ clks[IMX8MQ_CLK_GPIO2_ROOT] = imx_clk_gate4("gpio2_root_clk", "ipg_root", base + 0x40c0, 0);
+ clks[IMX8MQ_CLK_GPIO3_ROOT] = imx_clk_gate4("gpio3_root_clk", "ipg_root", base + 0x40d0, 0);
+ clks[IMX8MQ_CLK_GPIO4_ROOT] = imx_clk_gate4("gpio4_root_clk", "ipg_root", base + 0x40e0, 0);
+ clks[IMX8MQ_CLK_GPIO5_ROOT] = imx_clk_gate4("gpio5_root_clk", "ipg_root", base + 0x40f0, 0);
clks[IMX8MQ_CLK_GPT1_ROOT] = imx_clk_gate4("gpt1_root_clk", "gpt1", base + 0x4100, 0);
clks[IMX8MQ_CLK_I2C1_ROOT] = imx_clk_gate4("i2c1_root_clk", "i2c1", base + 0x4170, 0);
clks[IMX8MQ_CLK_I2C2_ROOT] = imx_clk_gate4("i2c2_root_clk", "i2c2", base + 0x4180, 0);
diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h
index 491e39c..b58cc64 100644
--- a/include/dt-bindings/clock/imx8mq-clock.h
+++ b/include/dt-bindings/clock/imx8mq-clock.h
@@ -394,5 +394,11 @@
#define IMX8MQ_CLK_CLKO1 268
#define IMX8MQ_CLK_ARM 269

-#define IMX8MQ_CLK_END 270
+#define IMX8MQ_CLK_GPIO1_ROOT 270
+#define IMX8MQ_CLK_GPIO2_ROOT 271
+#define IMX8MQ_CLK_GPIO3_ROOT 272
+#define IMX8MQ_CLK_GPIO4_ROOT 273
+#define IMX8MQ_CLK_GPIO5_ROOT 274
+
+#define IMX8MQ_CLK_END 275
#endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */
--
2.7.4

2019-02-27 01:31:54

by Anson Huang

Subject: [PATCH RESEND V2 2/2] arm64: dts: freescale: imx8mq: add clock for GPIO node

i.MX8MQ has clock gate for each GPIO bank, add clock info
to GPIO node for clock management.

Signed-off-by: Anson Huang <[email protected]>
---
No changes.
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 8e9d6d5..6be8849 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -149,6 +149,7 @@
reg = <0x30200000 0x10000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_GPIO1_ROOT>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -160,6 +161,7 @@
reg = <0x30210000 0x10000>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_GPIO2_ROOT>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -171,6 +173,7 @@
reg = <0x30220000 0x10000>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_GPIO3_ROOT>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -182,6 +185,7 @@
reg = <0x30230000 0x10000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_GPIO4_ROOT>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -193,6 +197,7 @@
reg = <0x30240000 0x10000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_GPIO5_ROOT>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
--
2.7.4

2019-02-27 01:43:31

by Fabio Estevam

Subject: Re: [PATCH RESEND V2 1/2] clk: imx8mq: add GPIO clocks to clock tree

On Tue, Feb 26, 2019 at 10:28 PM Anson Huang <[email protected]> wrote:
>
> i.MX8MQ has clock gate for each GPIO bank, add them
> into clock tree for GPIO driver to manage.
>
> Signed-off-by: Anson Huang <[email protected]>

Reviewed-by: Fabio Estevam <[email protected]>

2019-02-27 01:44:07

by Fabio Estevam

Subject: Re: [PATCH RESEND V2 2/2] arm64: dts: freescale: imx8mq: add clock for GPIO node

On Tue, Feb 26, 2019 at 10:29 PM Anson Huang <[email protected]> wrote:
>
> i.MX8MQ has clock gate for each GPIO bank, add clock info
> to GPIO node for clock management.
>
> Signed-off-by: Anson Huang <[email protected]>

Reviewed-by: Fabio Estevam <[email protected]>

2019-02-28 20:23:32

by Stephen Boyd

Subject: Re: [PATCH RESEND V2 1/2] clk: imx8mq: add GPIO clocks to clock tree

Quoting Anson Huang (2019-02-26 17:28:26)
> i.MX8MQ has clock gate for each GPIO bank, add them
> into clock tree for GPIO driver to manage.
>
> Signed-off-by: Anson Huang <[email protected]>
> ---

Applied to clk-next

2019-03-19 13:01:54

by Shawn Guo

Subject: Re: [PATCH RESEND V2 2/2] arm64: dts: freescale: imx8mq: add clock for GPIO node

On Wed, Feb 27, 2019 at 01:28:32AM +0000, Anson Huang wrote:
> i.MX8MQ has clock gate for each GPIO bank, add clock info
> to GPIO node for clock management.
>
> Signed-off-by: Anson Huang <[email protected]>

Prefix 'arm64: dts: imx8mq: ...' is good enough. Dropped 'freescale: '
and applied the patch.

Shawn