From: Ludovic Barre <[email protected]>
This patch series adds get_datactrl_cfg callback in mmci_host_ops
to allow to get datactrl configuration specific at variant.
Ludovic Barre (5):
mmc: mmci: add get_datactrl_cfg callback
mmc: mmci: define get_dctrl_cfg for legacy variant
mmc: mmci: qcom: define get_dctrl_cfg
mmc: mmci: stm32: define get_dctrl_cfg
mmc: mmci: replace blksz_datactrlXX by get_datactrl_cfg callback
drivers/mmc/host/mmci.c | 51 ++++++++++++++++++++++++-------------
drivers/mmc/host/mmci.h | 11 ++++----
drivers/mmc/host/mmci_qcom_dml.c | 8 ++++++
drivers/mmc/host/mmci_stm32_sdmmc.c | 21 +++++++++++++++
4 files changed, 68 insertions(+), 23 deletions(-)
--
2.7.4
From: Ludovic Barre <[email protected]>
This patch defines get_dctrl_cfg callback for legacy variants
whatever DMA_ENGINE configuration.
Signed-off-by: Ludovic Barre <[email protected]>
---
drivers/mmc/host/mmci.c | 38 ++++++++++++++++++++++++++++++++------
1 file changed, 32 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 387ff14..e1d3f42 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -47,11 +47,8 @@
#define DRIVER_NAME "mmci-pl18x"
-#ifdef CONFIG_DMA_ENGINE
void mmci_variant_init(struct mmci_host *host);
-#else
-static inline void mmci_variant_init(struct mmci_host *host) {}
-#endif
+void mmci_ux500v2_variant_init(struct mmci_host *host);
#ifdef CONFIG_MMC_STM32_SDMMC
void sdmmc_variant_init(struct mmci_host *host);
@@ -238,7 +235,7 @@ static struct variant_data variant_ux500v2 = {
.irq_pio_mask = MCI_IRQ_PIO_MASK,
.start_err = MCI_STARTBITERR,
.opendrain = MCI_OD,
- .init = mmci_variant_init,
+ .init = mmci_ux500v2_variant_init,
};
static struct variant_data variant_stm32 = {
@@ -624,6 +621,24 @@ static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data)
sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
}
+u32 mmci_get_dctrl_cfg(struct mmci_host *host)
+{
+ struct variant_data *variant = host->variant;
+ int blksz_bits;
+
+ blksz_bits = ffs(host->data->blksz) - 1;
+ BUG_ON(1 << blksz_bits != host->data->blksz);
+
+ return variant->datactrl_dpsm_enable | blksz_bits << 4;
+}
+
+u32 mmci_ux500v2_get_dctrl_cfg(struct mmci_host *host)
+{
+ struct variant_data *variant = host->variant;
+
+ return variant->datactrl_dpsm_enable | (host->data->blksz << 16);
+}
+
/*
* All the DMA operation mode stuff goes inside this ifdef.
* This assumes that you have a generic DMA device interface,
@@ -952,6 +967,7 @@ void mmci_dmae_unprep_data(struct mmci_host *host,
static struct mmci_host_ops mmci_variant_ops = {
.prep_data = mmci_dmae_prep_data,
.unprep_data = mmci_dmae_unprep_data,
+ .get_datactrl_cfg = mmci_get_dctrl_cfg,
.get_next_data = mmci_dmae_get_next_data,
.dma_setup = mmci_dmae_setup,
.dma_release = mmci_dmae_release,
@@ -959,12 +975,22 @@ static struct mmci_host_ops mmci_variant_ops = {
.dma_finalize = mmci_dmae_finalize,
.dma_error = mmci_dmae_error,
};
+#else
+static struct mmci_host_ops mmci_variant_ops = {
+ .get_datactrl_cfg = mmci_get_dctrl_cfg,
+}
+#endif
void mmci_variant_init(struct mmci_host *host)
{
host->ops = &mmci_variant_ops;
}
-#endif
+
+void mmci_ux500v2_variant_init(struct mmci_host *host)
+{
+ host->ops = &mmci_variant_ops;
+ host->ops->get_datactrl_cfg = mmci_ux500v2_get_dctrl_cfg;
+}
static void mmci_pre_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
--
2.7.4
From: Ludovic Barre <[email protected]>
This patch defines get_dctrl_cfg callback for sdmmc variant.
sdmmc variant has specific stm32 transfer modes.
sdmmc data transfer mode selection could be:
-Block data transfer ending on block count.
-SDIO multibyte data transfer.
-MMC Stream data transfer (not used).
-Block data transfer ending with STOP_TRANSMISSION command.
Signed-off-by: Ludovic Barre <[email protected]>
---
drivers/mmc/host/mmci.h | 5 +++++
drivers/mmc/host/mmci_stm32_sdmmc.c | 21 +++++++++++++++++++++
2 files changed, 26 insertions(+)
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index 6f28f71..eb5d99af 100644
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -131,6 +131,11 @@
/* Control register extensions in the Qualcomm versions */
#define MCI_DPSM_QCOM_DATA_PEND BIT(17)
#define MCI_DPSM_QCOM_RX_DATA_PEND BIT(20)
+/* Control register extensions in STM32 versions */
+#define MCI_DPSM_STM32_MODE_BLOCK (0 << 2)
+#define MCI_DPSM_STM32_MODE_SDIO (1 << 2)
+#define MCI_DPSM_STM32_MODE_STREAM (2 << 2)
+#define MCI_DPSM_STM32_MODE_BLOCK_STOP (3 << 2)
#define MMCIDATACNT 0x030
#define MMCISTATUS 0x034
diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c b/drivers/mmc/host/mmci_stm32_sdmmc.c
index cfbfc6f..e7bf744 100644
--- a/drivers/mmc/host/mmci_stm32_sdmmc.c
+++ b/drivers/mmc/host/mmci_stm32_sdmmc.c
@@ -265,10 +265,31 @@ static void mmci_sdmmc_set_pwrreg(struct mmci_host *host, unsigned int pwr)
}
}
+u32 sdmmc_get_dctrl_cfg(struct mmci_host *host)
+{
+ struct variant_data *variant = host->variant;
+ int blksz_bits;
+ u32 datactrl;
+
+ blksz_bits = ffs(host->data->blksz) - 1;
+ datactrl = variant->datactrl_dpsm_enable | blksz_bits << 4;
+
+ if (host->mmc->card && mmc_card_sdio(host->mmc->card) &&
+ host->data->blocks == 1)
+ datactrl |= MCI_DPSM_STM32_MODE_SDIO;
+ else if (host->data->stop && !host->mrq->sbc)
+ datactrl |= MCI_DPSM_STM32_MODE_BLOCK_STOP;
+ else
+ datactrl |= MCI_DPSM_STM32_MODE_BLOCK;
+
+ return datactrl;
+}
+
static struct mmci_host_ops sdmmc_variant_ops = {
.validate_data = sdmmc_idma_validate_data,
.prep_data = sdmmc_idma_prep_data,
.unprep_data = sdmmc_idma_unprep_data,
+ .get_datactrl_cfg = sdmmc_get_dctrl_cfg,
.dma_setup = sdmmc_idma_setup,
.dma_start = sdmmc_idma_start,
.dma_finalize = sdmmc_idma_finalize,
--
2.7.4
From: Ludovic Barre <[email protected]>
This patch allows to get datactrl configuration specific
at variant. This introduce more flexibility on datactlr
value.
Signed-off-by: Ludovic Barre <[email protected]>
---
drivers/mmc/host/mmci.c | 13 +------------
drivers/mmc/host/mmci.h | 5 -----
2 files changed, 1 insertion(+), 17 deletions(-)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index e1d3f42..fe424ae 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -221,7 +221,6 @@ static struct variant_data variant_ux500v2 = {
.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
.st_sdio = true,
.st_clkdiv = true,
- .blksz_datactrl16 = true,
.pwrreg_powerup = MCI_PWR_ON,
.f_max = 100000000,
.signal_direction = true,
@@ -296,7 +295,6 @@ static struct variant_data variant_qcom = {
.cmdreg_srsp_crc = MCI_CPSM_RESPONSE,
.cmdreg_srsp = MCI_CPSM_RESPONSE,
.data_cmd_enable = MCI_CPSM_QCOM_DATCMD,
- .blksz_datactrl4 = true,
.datalength_bits = 24,
.datactrl_blocksz = 11,
.datactrl_dpsm_enable = MCI_DPSM_ENABLE,
@@ -1026,7 +1024,6 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
unsigned int datactrl, timeout, irqmask;
unsigned long long clks;
void __iomem *base;
- int blksz_bits;
dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n",
data->blksz, data->blocks, data->flags);
@@ -1044,15 +1041,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
writel(timeout, base + MMCIDATATIMER);
writel(host->size, base + MMCIDATALENGTH);
- blksz_bits = ffs(data->blksz) - 1;
- BUG_ON(1 << blksz_bits != data->blksz);
-
- if (variant->blksz_datactrl16)
- datactrl = variant->datactrl_dpsm_enable | (data->blksz << 16);
- else if (variant->blksz_datactrl4)
- datactrl = variant->datactrl_dpsm_enable | (data->blksz << 4);
- else
- datactrl = variant->datactrl_dpsm_enable | blksz_bits << 4;
+ datactrl = host->ops->get_datactrl_cfg(host);
if (data->flags & MMC_DATA_READ)
datactrl |= MCI_DPSM_DIRECTION;
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index eb5d99af..fb5a83f 100644
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -280,9 +280,6 @@ struct mmci_host;
* @st_clkdiv: true if using a ST-specific clock divider algorithm
* @stm32_clkdiv: true if using a STM32-specific clock divider algorithm
* @datactrl_mask_ddrmode: ddr mode mask in datactrl register.
- * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register
- * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl
- * register
* @datactrl_mask_sdio: SDIO enable mask in datactrl register
* @datactrl_blksz: block size in power of two
* @datactrl_dpsm_enable: enable value for DPSM
@@ -336,8 +333,6 @@ struct variant_data {
u8 st_sdio:1;
u8 st_clkdiv:1;
u8 stm32_clkdiv:1;
- u8 blksz_datactrl16:1;
- u8 blksz_datactrl4:1;
u32 pwrreg_powerup;
u32 f_max;
u8 signal_direction:1;
--
2.7.4
From: Ludovic Barre <[email protected]>
This patch adds get_datactrl_cfg callback in mmci_host_ops
to allow to get datactrl configuration specific at variant.
Signed-off-by: Ludovic Barre <[email protected]>
---
drivers/mmc/host/mmci.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index 14df810..6f28f71 100644
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -362,6 +362,7 @@ struct mmci_host_ops {
bool next);
void (*unprep_data)(struct mmci_host *host, struct mmc_data *data,
int err);
+ u32 (*get_datactrl_cfg)(struct mmci_host *host);
void (*get_next_data)(struct mmci_host *host, struct mmc_data *data);
int (*dma_setup)(struct mmci_host *host);
void (*dma_release)(struct mmci_host *host);
--
2.7.4
From: Ludovic Barre <[email protected]>
This patch defines get_dctrl_cfg callback for qcom variant.
qcom variant has a specific block size definition.
Signed-off-by: Ludovic Barre <[email protected]>
---
drivers/mmc/host/mmci_qcom_dml.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/mmc/host/mmci_qcom_dml.c b/drivers/mmc/host/mmci_qcom_dml.c
index 25d0a75..d7b083d 100644
--- a/drivers/mmc/host/mmci_qcom_dml.c
+++ b/drivers/mmc/host/mmci_qcom_dml.c
@@ -183,9 +183,17 @@ static int qcom_dma_setup(struct mmci_host *host)
return 0;
}
+u32 qcom_get_dctrl_cfg(struct mmci_host *host)
+{
+ struct variant_data *variant = host->variant;
+
+ return variant->datactrl_dpsm_enable | (host->data->blksz << 4);
+}
+
static struct mmci_host_ops qcom_variant_ops = {
.prep_data = mmci_dmae_prep_data,
.unprep_data = mmci_dmae_unprep_data,
+ .get_datactrl_cfg = qcom_get_dctrl_cfg,
.get_next_data = mmci_dmae_get_next_data,
.dma_setup = qcom_dma_setup,
.dma_release = mmci_dmae_release,
--
2.7.4
On Mon, 4 Mar 2019 at 11:17, Ludovic Barre <[email protected]> wrote:
>
> From: Ludovic Barre <[email protected]>
>
> This patch defines get_dctrl_cfg callback for qcom variant.
> qcom variant has a specific block size definition.
>
> Signed-off-by: Ludovic Barre <[email protected]>
> ---
> drivers/mmc/host/mmci_qcom_dml.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/mmc/host/mmci_qcom_dml.c b/drivers/mmc/host/mmci_qcom_dml.c
> index 25d0a75..d7b083d 100644
> --- a/drivers/mmc/host/mmci_qcom_dml.c
> +++ b/drivers/mmc/host/mmci_qcom_dml.c
> @@ -183,9 +183,17 @@ static int qcom_dma_setup(struct mmci_host *host)
> return 0;
> }
>
> +u32 qcom_get_dctrl_cfg(struct mmci_host *host)
This can be static.
> +{
> + struct variant_data *variant = host->variant;
> +
> + return variant->datactrl_dpsm_enable | (host->data->blksz << 4);
> +}
> +
> static struct mmci_host_ops qcom_variant_ops = {
> .prep_data = mmci_dmae_prep_data,
> .unprep_data = mmci_dmae_unprep_data,
> + .get_datactrl_cfg = qcom_get_dctrl_cfg,
> .get_next_data = mmci_dmae_get_next_data,
> .dma_setup = qcom_dma_setup,
> .dma_release = mmci_dmae_release,
> --
> 2.7.4
>
Kind regards
Uffe
On Mon, 4 Mar 2019 at 11:17, Ludovic Barre <[email protected]> wrote:
>
> From: Ludovic Barre <[email protected]>
>
> This patch defines get_dctrl_cfg callback for sdmmc variant.
> sdmmc variant has specific stm32 transfer modes.
> sdmmc data transfer mode selection could be:
> -Block data transfer ending on block count.
> -SDIO multibyte data transfer.
> -MMC Stream data transfer (not used).
> -Block data transfer ending with STOP_TRANSMISSION command.
>
> Signed-off-by: Ludovic Barre <[email protected]>
> ---
> drivers/mmc/host/mmci.h | 5 +++++
> drivers/mmc/host/mmci_stm32_sdmmc.c | 21 +++++++++++++++++++++
> 2 files changed, 26 insertions(+)
>
> diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
> index 6f28f71..eb5d99af 100644
> --- a/drivers/mmc/host/mmci.h
> +++ b/drivers/mmc/host/mmci.h
> @@ -131,6 +131,11 @@
> /* Control register extensions in the Qualcomm versions */
> #define MCI_DPSM_QCOM_DATA_PEND BIT(17)
> #define MCI_DPSM_QCOM_RX_DATA_PEND BIT(20)
> +/* Control register extensions in STM32 versions */
> +#define MCI_DPSM_STM32_MODE_BLOCK (0 << 2)
> +#define MCI_DPSM_STM32_MODE_SDIO (1 << 2)
> +#define MCI_DPSM_STM32_MODE_STREAM (2 << 2)
> +#define MCI_DPSM_STM32_MODE_BLOCK_STOP (3 << 2)
>
> #define MMCIDATACNT 0x030
> #define MMCISTATUS 0x034
> diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c b/drivers/mmc/host/mmci_stm32_sdmmc.c
> index cfbfc6f..e7bf744 100644
> --- a/drivers/mmc/host/mmci_stm32_sdmmc.c
> +++ b/drivers/mmc/host/mmci_stm32_sdmmc.c
> @@ -265,10 +265,31 @@ static void mmci_sdmmc_set_pwrreg(struct mmci_host *host, unsigned int pwr)
> }
> }
>
> +u32 sdmmc_get_dctrl_cfg(struct mmci_host *host)
> +{
> + struct variant_data *variant = host->variant;
> + int blksz_bits;
> + u32 datactrl;
> +
> + blksz_bits = ffs(host->data->blksz) - 1;
> + datactrl = variant->datactrl_dpsm_enable | blksz_bits << 4;
> +
> + if (host->mmc->card && mmc_card_sdio(host->mmc->card) &&
> + host->data->blocks == 1)
These settings are not limited to deal with the block size bits.
Don't get me wrong, it seems reasonable to include them, but the
generic code in mmci_start_data() also have code to cope with SDIO. I
think we should start by splitting that up into a couple of
helper/library functions, and make the legacy variant to use them.
This should probably be done as a preparation to your series, so you
can build on top of that.
Does it make sense? If not, please tell and I can try to provide some
patch to show you what I mean.
> + datactrl |= MCI_DPSM_STM32_MODE_SDIO;
> + else if (host->data->stop && !host->mrq->sbc)
> + datactrl |= MCI_DPSM_STM32_MODE_BLOCK_STOP;
> + else
> + datactrl |= MCI_DPSM_STM32_MODE_BLOCK;
> +
> + return datactrl;
> +}
> +
> static struct mmci_host_ops sdmmc_variant_ops = {
> .validate_data = sdmmc_idma_validate_data,
> .prep_data = sdmmc_idma_prep_data,
> .unprep_data = sdmmc_idma_unprep_data,
> + .get_datactrl_cfg = sdmmc_get_dctrl_cfg,
> .dma_setup = sdmmc_idma_setup,
> .dma_start = sdmmc_idma_start,
> .dma_finalize = sdmmc_idma_finalize,
> --
> 2.7.4
>
Kind regards
Uffe
On 3/6/19 2:31 PM, Ulf Hansson wrote:
> On Mon, 4 Mar 2019 at 11:17, Ludovic Barre <[email protected]> wrote:
>>
>> From: Ludovic Barre <[email protected]>
>>
>> This patch defines get_dctrl_cfg callback for sdmmc variant.
>> sdmmc variant has specific stm32 transfer modes.
>> sdmmc data transfer mode selection could be:
>> -Block data transfer ending on block count.
>> -SDIO multibyte data transfer.
>> -MMC Stream data transfer (not used).
>> -Block data transfer ending with STOP_TRANSMISSION command.
>>
>> Signed-off-by: Ludovic Barre <[email protected]>
>> ---
>> drivers/mmc/host/mmci.h | 5 +++++
>> drivers/mmc/host/mmci_stm32_sdmmc.c | 21 +++++++++++++++++++++
>> 2 files changed, 26 insertions(+)
>>
>> diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
>> index 6f28f71..eb5d99af 100644
>> --- a/drivers/mmc/host/mmci.h
>> +++ b/drivers/mmc/host/mmci.h
>> @@ -131,6 +131,11 @@
>> /* Control register extensions in the Qualcomm versions */
>> #define MCI_DPSM_QCOM_DATA_PEND BIT(17)
>> #define MCI_DPSM_QCOM_RX_DATA_PEND BIT(20)
>> +/* Control register extensions in STM32 versions */
>> +#define MCI_DPSM_STM32_MODE_BLOCK (0 << 2)
>> +#define MCI_DPSM_STM32_MODE_SDIO (1 << 2)
>> +#define MCI_DPSM_STM32_MODE_STREAM (2 << 2)
>> +#define MCI_DPSM_STM32_MODE_BLOCK_STOP (3 << 2)
>>
>> #define MMCIDATACNT 0x030
>> #define MMCISTATUS 0x034
>> diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c b/drivers/mmc/host/mmci_stm32_sdmmc.c
>> index cfbfc6f..e7bf744 100644
>> --- a/drivers/mmc/host/mmci_stm32_sdmmc.c
>> +++ b/drivers/mmc/host/mmci_stm32_sdmmc.c
>> @@ -265,10 +265,31 @@ static void mmci_sdmmc_set_pwrreg(struct mmci_host *host, unsigned int pwr)
>> }
>> }
>>
>> +u32 sdmmc_get_dctrl_cfg(struct mmci_host *host)
>> +{
>> + struct variant_data *variant = host->variant;
>> + int blksz_bits;
>> + u32 datactrl;
>> +
>> + blksz_bits = ffs(host->data->blksz) - 1;
>> + datactrl = variant->datactrl_dpsm_enable | blksz_bits << 4;
>> +
>> + if (host->mmc->card && mmc_card_sdio(host->mmc->card) &&
>> + host->data->blocks == 1)
>
> These settings are not limited to deal with the block size bits.
>
> Don't get me wrong, it seems reasonable to include them, but the
> generic code in mmci_start_data() also have code to cope with SDIO. I
> think we should start by splitting that up into a couple of
> helper/library functions, and make the legacy variant to use them.
> This should probably be done as a preparation to your series, so you
> can build on top of that.
I think you wish helper functions for each group of datactrl feature,
like for dpsm direction|sdio|ios timming. Each variant call theses
helpers to define its own datactrl value. it's possible, no problem.
In mmci_start_data will remain the part on clk_reg for sdio card
if (host->mmc->card && mmc_card_sdio(host->mmc->card)) {
u32 clk;
/*
* The ST Micro variant for SDIO small write transfers
* needs to have clock H/W flow control disabled,
* otherwise the transfer will not start. The threshold
* depends on the rate of MCLK.
*/
if (variant->st_sdio && data->flags & MMC_DATA_WRITE &&
(host->size < 8 ||
(host->size <= 8 && host->mclk > 50000000)))
clk = host->clk_reg & ~variant->clkreg_enable;
else
clk = host->clk_reg | variant->clkreg_enable;
mmci_write_clkreg(host, clk);
}
it's OK ?
>
> Does it make sense? If not, please tell and I can try to provide some
> patch to show you what I mean.
>
>
>> + datactrl |= MCI_DPSM_STM32_MODE_SDIO;
>> + else if (host->data->stop && !host->mrq->sbc)
>> + datactrl |= MCI_DPSM_STM32_MODE_BLOCK_STOP;
>> + else
>> + datactrl |= MCI_DPSM_STM32_MODE_BLOCK;
>> +
>> + return datactrl;
>> +}
>> +
>> static struct mmci_host_ops sdmmc_variant_ops = {
>> .validate_data = sdmmc_idma_validate_data,
>> .prep_data = sdmmc_idma_prep_data,
>> .unprep_data = sdmmc_idma_unprep_data,
>> + .get_datactrl_cfg = sdmmc_get_dctrl_cfg,
>> .dma_setup = sdmmc_idma_setup,
>> .dma_start = sdmmc_idma_start,
>> .dma_finalize = sdmmc_idma_finalize,
>> --
>> 2.7.4
>>
>
> Kind regards
> Uffe
>