2020-07-30 02:08:08

by Anson Huang

Subject: [PATCH V3 2/2] watchdog: imx7ulp: Watchdog should continue running for wait/stop mode

When kernel idle, system will enter wait/stop mode, wdog should continue
running in this scenario, and the refresh thread can wake up system from
wait/stop mode.

Signed-off-by: Anson Huang <[email protected]>
---
no change.
---
drivers/watchdog/imx7ulp_wdt.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/watchdog/imx7ulp_wdt.c b/drivers/watchdog/imx7ulp_wdt.c
index 010ddd1..77773b0 100644
--- a/drivers/watchdog/imx7ulp_wdt.c
+++ b/drivers/watchdog/imx7ulp_wdt.c
@@ -22,6 +22,8 @@
#define WDOG_CS_CLK (LPO_CLK << LPO_CLK_SHIFT)
#define WDOG_CS_EN BIT(7)
#define WDOG_CS_UPDATE BIT(5)
+#define WDOG_CS_WAIT BIT(1)
+#define WDOG_CS_STOP BIT(0)

#define WDOG_CNT 0x4
#define WDOG_TOVAL 0x8
@@ -187,7 +189,8 @@ static int imx7ulp_wdt_init(void __iomem *base, unsigned int timeout)
/* set an initial timeout value in TOVAL */
writel(timeout, base + WDOG_TOVAL);
/* enable 32bit command sequence and reconfigure */
- val = WDOG_CS_CMD32EN | WDOG_CS_CLK | WDOG_CS_UPDATE;
+ val = WDOG_CS_CMD32EN | WDOG_CS_CLK | WDOG_CS_UPDATE |
+ WDOG_CS_WAIT | WDOG_CS_STOP;
writel(val, base + WDOG_CS);
imx7ulp_wdt_wait(base, WDOG_CS_RCS);

--
2.7.4

2020-07-30 16:54:42

by Guenter Roeck

Subject: Re: [PATCH V3 2/2] watchdog: imx7ulp: Watchdog should continue running for wait/stop mode

On Thu, Jul 30, 2020 at 10:03:11AM +0800, Anson Huang wrote:
> When kernel idle, system will enter wait/stop mode, wdog should continue
> running in this scenario, and the refresh thread can wake up system from
> wait/stop mode.
>
> Signed-off-by: Anson Huang <[email protected]>

Reviewed-by: Guenter Roeck <[email protected]>

> ---
> no change.
> ---
> drivers/watchdog/imx7ulp_wdt.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/watchdog/imx7ulp_wdt.c b/drivers/watchdog/imx7ulp_wdt.c
> index 010ddd1..77773b0 100644
> --- a/drivers/watchdog/imx7ulp_wdt.c
> +++ b/drivers/watchdog/imx7ulp_wdt.c
> @@ -22,6 +22,8 @@
> #define WDOG_CS_CLK (LPO_CLK << LPO_CLK_SHIFT)
> #define WDOG_CS_EN BIT(7)
> #define WDOG_CS_UPDATE BIT(5)
> +#define WDOG_CS_WAIT BIT(1)
> +#define WDOG_CS_STOP BIT(0)
>
> #define WDOG_CNT 0x4
> #define WDOG_TOVAL 0x8
> @@ -187,7 +189,8 @@ static int imx7ulp_wdt_init(void __iomem *base, unsigned int timeout)
> /* set an initial timeout value in TOVAL */
> writel(timeout, base + WDOG_TOVAL);
> /* enable 32bit command sequence and reconfigure */
> - val = WDOG_CS_CMD32EN | WDOG_CS_CLK | WDOG_CS_UPDATE;
> + val = WDOG_CS_CMD32EN | WDOG_CS_CLK | WDOG_CS_UPDATE |
> + WDOG_CS_WAIT | WDOG_CS_STOP;
> writel(val, base + WDOG_CS);
> imx7ulp_wdt_wait(base, WDOG_CS_RCS);
>
> --
> 2.7.4
>