2020-10-22 20:10:03

by Weiyi Lu

Subject: [PATCH v2 0/4] Mediatek MT8192 scpsys support

This series is based on v5.9-rc1, MT8192 clock v4[1] and
soc: mediatek: pm-domains: Add new driver for SCPSYS power domains controller[2]

[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=368799
[2] https://patchwork.kernel.org/project/linux-mediatek/list/?series=358429

change since v1:
- add patch of default power off flag

Weiyi Lu (4):
dt-bindings: power: Add MT8192 power domains
soc: mediatek: pm-domains: Add default power off flag
soc: mediatek: pm-domains: Add support for mt8192
arm64: dts: mediatek: Add mt8192 power domains controller

.../power/mediatek,power-controller.yaml | 1 +
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 201 +++++++++++
drivers/soc/mediatek/mtk-pm-domains.c | 313 +++++++++++++++++-
include/dt-bindings/power/mt8192-power.h | 32 ++
include/linux/soc/mediatek/infracfg.h | 56 ++++
5 files changed, 596 insertions(+), 7 deletions(-)
create mode 100644 include/dt-bindings/power/mt8192-power.h

2020-10-22 20:10:03

by Weiyi Lu

Subject: [PATCH v2 1/4] dt-bindings: power: Add MT8192 power domains

Add power domains dt-bindings for MT8192.

Signed-off-by: Weiyi Lu <[email protected]>
---
.../bindings/power/mediatek,power-controller.yaml | 1 +
include/dt-bindings/power/mt8192-power.h | 32 ++++++++++++++++++++++
2 files changed, 33 insertions(+)
create mode 100644 include/dt-bindings/power/mt8192-power.h

diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
index 67a15f2..1ebed79 100644
--- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
@@ -25,6 +25,7 @@ properties:
enum:
- mediatek,mt8173-power-controller
- mediatek,mt8183-power-controller
+ - mediatek,mt8192-power-controller

'#power-domain-cells':
const: 1
diff --git a/include/dt-bindings/power/mt8192-power.h b/include/dt-bindings/power/mt8192-power.h
new file mode 100644
index 0000000..4eaa53d
--- /dev/null
+++ b/include/dt-bindings/power/mt8192-power.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Weiyi Lu <[email protected]>
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8192_POWER_H
+#define _DT_BINDINGS_POWER_MT8192_POWER_H
+
+#define MT8192_POWER_DOMAIN_AUDIO 0
+#define MT8192_POWER_DOMAIN_CONN 1
+#define MT8192_POWER_DOMAIN_MFG0 2
+#define MT8192_POWER_DOMAIN_MFG1 3
+#define MT8192_POWER_DOMAIN_MFG2 4
+#define MT8192_POWER_DOMAIN_MFG3 5
+#define MT8192_POWER_DOMAIN_MFG4 6
+#define MT8192_POWER_DOMAIN_MFG5 7
+#define MT8192_POWER_DOMAIN_MFG6 8
+#define MT8192_POWER_DOMAIN_DISP 9
+#define MT8192_POWER_DOMAIN_IPE 10
+#define MT8192_POWER_DOMAIN_ISP 11
+#define MT8192_POWER_DOMAIN_ISP2 12
+#define MT8192_POWER_DOMAIN_MDP 13
+#define MT8192_POWER_DOMAIN_VENC 14
+#define MT8192_POWER_DOMAIN_VDEC 15
+#define MT8192_POWER_DOMAIN_VDEC2 16
+#define MT8192_POWER_DOMAIN_CAM 17
+#define MT8192_POWER_DOMAIN_CAM_RAWA 18
+#define MT8192_POWER_DOMAIN_CAM_RAWB 19
+#define MT8192_POWER_DOMAIN_CAM_RAWC 20
+
+#endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */
--
1.8.1.1.dirty