2021-05-13 16:41:16

by Andi Kleen

Subject: [PATCH] x86/cpu: Fix comment for Sapphire Rapids

Sapphire Rapids uses Golden Cove, not Willow Cove.

Cc: [email protected]
Fixes: 53375a5a218e ("x86/cpu: Resort and comment Intel models")
Signed-off-by: Andi Kleen <[email protected]>
---
arch/x86/include/asm/intel-family.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 955b06d6325a..27158436f322 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -102,7 +102,8 @@

#define INTEL_FAM6_TIGERLAKE_L 0x8C /* Willow Cove */
#define INTEL_FAM6_TIGERLAKE 0x8D /* Willow Cove */
-#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Willow Cove */
+
+#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Golden Cove */

#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
--
2.25.4

2021-05-14 18:17:28

by tip-bot2 for Alexey Makhalov

Subject: [tip: x86/cpu] x86/cpu: Fix core name for Sapphire Rapids

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID: 28188cc461f6cf8b7d28de4f6df52014cc1d5e39
Gitweb: https://git.kernel.org/tip/28188cc461f6cf8b7d28de4f6df52014cc1d5e39
Author: Andi Kleen <[email protected]>
AuthorDate: Thu, 13 May 2021 09:39:04 -07:00
Committer: Borislav Petkov <[email protected]>
CommitterDate: Fri, 14 May 2021 14:31:14 +02:00

x86/cpu: Fix core name for Sapphire Rapids

Sapphire Rapids uses Golden Cove, not Willow Cove.

Fixes: 53375a5a218e ("x86/cpu: Resort and comment Intel models")
Signed-off-by: Andi Kleen <[email protected]>
Signed-off-by: Borislav Petkov <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
---
arch/x86/include/asm/intel-family.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 955b06d..2715843 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -102,7 +102,8 @@

#define INTEL_FAM6_TIGERLAKE_L 0x8C /* Willow Cove */
#define INTEL_FAM6_TIGERLAKE 0x8D /* Willow Cove */
-#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Willow Cove */
+
+#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Golden Cove */

#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */