Fix the MSI IRQ used for PCIe instances 1 and 2.
Cc: [email protected]
Fixes: e53bdfc00977 ("arm64: dts: qcom: sm8250: Add PCIe support")
Reported-by: Jordan Crouse <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 6f6129b39c9c..8a3373c110fc 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1487,7 +1487,7 @@ pcie1: pci@1c08000 {
ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
- interrupts = <GIC_SPI 306 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
@@ -1593,7 +1593,7 @@ pcie2: pci@1c10000 {
ranges = <0x01000000 0x0 0x64200000 0x0 0x64200000 0x0 0x100000>,
<0x02000000 0x0 0x64300000 0x0 0x64300000 0x0 0x3d00000>;
- interrupts = <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
--
2.25.1
On Wed, 12 Jan 2022 at 06:56, Manivannan Sadhasivam
<[email protected]> wrote:
>
> Fix the MSI IRQ used for PCIe instances 1 and 2.
>
> Cc: [email protected]
> Fixes: e53bdfc00977 ("arm64: dts: qcom: sm8250: Add PCIe support")
> Reported-by: Jordan Crouse <[email protected]>
> Signed-off-by: Manivannan Sadhasivam <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 6f6129b39c9c..8a3373c110fc 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -1487,7 +1487,7 @@ pcie1: pci@1c08000 {
> ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
> <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
>
> - interrupts = <GIC_SPI 306 IRQ_TYPE_EDGE_RISING>;
> + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "msi";
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0x7>;
> @@ -1593,7 +1593,7 @@ pcie2: pci@1c10000 {
> ranges = <0x01000000 0x0 0x64200000 0x0 0x64200000 0x0 0x100000>,
> <0x02000000 0x0 0x64300000 0x0 0x64300000 0x0 0x3d00000>;
>
> - interrupts = <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>;
> + interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "msi";
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0x7>;
> --
> 2.25.1
>
--
With best wishes
Dmitry
On Wed, 12 Jan 2022 09:25:56 +0530, Manivannan Sadhasivam wrote:
> Fix the MSI IRQ used for PCIe instances 1 and 2.
>
>
Applied, thanks!
[1/1] arm64: dts: qcom: sm8250: Fix MSI IRQ for PCIe1 and PCIe2
commit: 1b7101e8124b450f2d6a35591e9cbb478c143ace
Best regards,
--
Bjorn Andersson <[email protected]>