The Qualcomm SC7280 has two GPI DMAengines, add definitions for these.
Co-developed-by: Vijaya Krishna Nivarthi <[email protected]>
Signed-off-by: Vijaya Krishna Nivarthi <[email protected]>
Signed-off-by: Vinod Koul <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 44 ++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index f0b64be63c21..20dd0f7ab322 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -901,6 +901,28 @@ opp-384000000 {
};
+ gpi_dma0: dma-controller@900000 {
+ #dma-cells = <3>;
+ compatible = "qcom,sc7280-gpi-dma";
+ reg = <0 0x00900000 0 0x60000>;
+ interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
+ dma-channels = <12>;
+ dma-channel-mask = <0x7f>;
+ iommus = <&apps_smmu 0x0136 0x0>;
+ status = "disabled";
+ };
+
qupv3_id_0: geniqup@9c0000 {
compatible = "qcom,geni-se-qup";
reg = <0 0x009c0000 0 0x2000>;
@@ -1330,6 +1352,28 @@ uart7: serial@99c000 {
};
};
+ gpi_dma1: dma-controller@a00000 {
+ #dma-cells = <3>;
+ compatible = "qcom,sc7280-gpi-dma";
+ reg = <0 0x00a00000 0 0x60000>;
+ interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
+ dma-channels = <12>;
+ dma-channel-mask = <0x1e>;
+ iommus = <&apps_smmu 0x56 0x0>;
+ status = "disabled";
+ };
+
qupv3_id_1: geniqup@ac0000 {
compatible = "qcom,geni-se-qup";
reg = <0 0x00ac0000 0 0x2000>;
--
2.34.1
Some versions of the firmware for the sc7280-idp board FIFO mode
disabled and must thus use GPI DMA. Enable gpi_dma0 and gpi_dma1 to
allow this.
Co-developed-by: Vijaya Krishna Nivarthi <[email protected]>
Signed-off-by: Vijaya Krishna Nivarthi <[email protected]>
Signed-off-by: Vinod Koul <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index ecbf2b89d896..00f7ef197be7 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -233,6 +233,14 @@ vreg_bob: bob {
};
};
+&gpi_dma0 {
+ status = "okay";
+};
+
+&gpi_dma1 {
+ status = "okay";
+};
+
&ipa {
status = "okay";
modem-init;
--
2.34.1
On Thu, 21 Apr 2022 17:25:24 +0530, Vinod Koul wrote:
> The Qualcomm SC7280 has two GPI DMAengines, add definitions for these.
>
>
Applied, thanks!
[1/3] arm64: dts: qcom: sc7280: Add GPI DMAengines
commit: c11e239f6aee32e20718dc3cf5349894d0e994ec
[2/3] arm64: dts: qcom: sc7280: Add GENI I2C/SPI DMA channels
commit: 18bec7f725c5184f7c5b2a404602dd95f630d4d7
[3/3] arm64: dts: qcom: sc7280-idp: Enable GPI DMAs
commit: f238ff81e8946540e1a7c1496aa92fa2386893dc
Best regards,
--
Bjorn Andersson <[email protected]>