Drop the assigned clock rate property and vote on the mdp clock to
max frequency during bind/probe sequence.
Changes in v2:
- Remove assigned-clock-rate property and set mdp clk during
resume sequence.
- Add fixes tag.
Changes in v3:
- Remove extra line after fixes tag.(Stephen Boyd)
- Add similar changes for sc7180, sdm845 which uses opp table for
voting mdp clk.(Stephen Boyd)
- Drop patch: "drm/msm/disp/dpu1: set mdp clk to the maximum
frequency in opp table"
Changes in v4:
- Add similar change for sm8250.(Dmitry)
Changes in v5:
- Add change to set mdp clk to max frequency in opp table
during mdp probe/bind.
Changes in v6:
- Remove change log in dt patch.
- Fix the leak reference for opp by adding dev_pm_opp_put. (Dmitry)
Changes in v7:
- Update commit message and fix tag. (Stephen/Doug)
Vinod Polimera (5):
drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table
during probe
arm64: dts: qcom: sm7280: remove assigned-clock-rate property for mdp
clk
arm64: dts: qcom: sm7180: remove assigned-clock-rate property for mdp
clk
arm64: dts: qcom: sdm845: remove assigned-clock-rate property for mdp
clk
arm64: dts: qcom: sm8250: remove assigned-clock-rate property for mdp
clk
arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++-------
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 ++-------
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 ++-------
arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 ++-------
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 ++++++++
5 files changed, 16 insertions(+), 28 deletions(-)
--
2.7.4
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.
This patch is dependent on the patch ("drm/msm/disp/dpu1: set mdp clk
to the maximum frequency in opp table during probe") [1].
[1] https://lore.kernel.org/r/[email protected]/
Signed-off-by: Vinod Polimera <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Reviewed-by: Douglas Anderson <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 9 ++-------
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index c07765d..a3c768c 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3086,9 +3086,6 @@
"ahb",
"core";
- assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
- assigned-clock-rates = <300000000>;
-
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
@@ -3122,11 +3119,9 @@
"lut",
"core",
"vsync";
- assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
+ assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
<&dispcc DISP_CC_MDSS_AHB_CLK>;
- assigned-clock-rates = <300000000>,
- <19200000>,
+ assigned-clock-rates = <19200000>,
<19200000>;
operating-points-v2 = <&mdp_opp_table>;
power-domains = <&rpmhpd SC7280_CX>;
--
2.7.4
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.
This patch is dependent on the patch ("drm/msm/disp/dpu1: set mdp clk
to the maximum frequency in opp table during probe") [1].
[1] https://lore.kernel.org/r/[email protected]/
Signed-off-by: Vinod Polimera <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Reviewed-by: Douglas Anderson <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++-------
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index e1c46b8..eaab746 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2900,9 +2900,6 @@
<&dispcc DISP_CC_MDSS_MDP_CLK>;
clock-names = "iface", "ahb", "core";
- assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
- assigned-clock-rates = <300000000>;
-
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
@@ -2932,12 +2929,10 @@
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
clock-names = "bus", "iface", "rot", "lut", "core",
"vsync";
- assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
+ assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
<&dispcc DISP_CC_MDSS_ROT_CLK>,
<&dispcc DISP_CC_MDSS_AHB_CLK>;
- assigned-clock-rates = <300000000>,
- <19200000>,
+ assigned-clock-rates = <19200000>,
<19200000>,
<19200000>;
operating-points-v2 = <&mdp_opp_table>;
--
2.7.4
On Tue, 22 Mar 2022 08:57:06 +0530, Vinod Polimera wrote:
> Drop the assigned clock rate property and vote on the mdp clock to
> max frequency during bind/probe sequence.
>
> Changes in v2:
> - Remove assigned-clock-rate property and set mdp clk during
> resume sequence.
> - Add fixes tag.
>
> [...]
Applied, thanks!
[2/5] arm64: dts: qcom: sm7280: remove assigned-clock-rate property for mdp clk
commit: 5241fd7fee9bee0cffa33f6d074194e94831e467
[3/5] arm64: dts: qcom: sm7180: remove assigned-clock-rate property for mdp clk
commit: aa4ae511a760e66f22641d9b9b6052b469df3c10
[4/5] arm64: dts: qcom: sdm845: remove assigned-clock-rate property for mdp clk
commit: 0b24829fd74cf954b3a02e9e4c4da3c098c69fbc
[5/5] arm64: dts: qcom: sm8250: remove assigned-clock-rate property for mdp clk
commit: 6edb323837909462d493f22c07a38a23ef44f944
Best regards,
--
Bjorn Andersson <[email protected]>