2022-09-28 10:06:25

by Ravi Bangoria

Subject: [PATCH v3 06/15] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR

IBS_DC_PHYSADDR provides the physical data address for the tagged load/
store operation. Populate perf sample physical address using it.

Signed-off-by: Ravi Bangoria <[email protected]>
---
arch/x86/events/amd/ibs.c | 8 +++++++-
kernel/events/core.c | 3 ++-
2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 0ad49105c154..3271735f0070 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -989,6 +989,11 @@ static void perf_ibs_parse_ld_st_data(__u64 sample_type,
data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
data->sample_flags |= PERF_SAMPLE_ADDR;
}
+
+ if (sample_type & PERF_SAMPLE_PHYS_ADDR && op_data3.dc_phy_addr_valid) {
+ data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
+ data->sample_flags |= PERF_SAMPLE_PHYS_ADDR;
+ }
}

static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
@@ -998,7 +1003,8 @@ static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
(perf_ibs == &perf_ibs_op &&
(sample_type & PERF_SAMPLE_DATA_SRC ||
sample_type & PERF_SAMPLE_WEIGHT_TYPE ||
- sample_type & PERF_SAMPLE_ADDR)))
+ sample_type & PERF_SAMPLE_ADDR ||
+ sample_type & PERF_SAMPLE_PHYS_ADDR)))
return perf_ibs->offset_max;
else if (check_rip)
return 3;
diff --git a/kernel/events/core.c b/kernel/events/core.c
index e1ffdb861b53..49bc3b5e6c8a 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -7435,7 +7435,8 @@ void perf_prepare_sample(struct perf_event_header *header,
header->size += size;
}

- if (sample_type & PERF_SAMPLE_PHYS_ADDR)
+ if (sample_type & PERF_SAMPLE_PHYS_ADDR &&
+ filtered_sample_type & PERF_SAMPLE_PHYS_ADDR)
data->phys_addr = perf_virt_to_phys(data->addr);

#ifdef CONFIG_CGROUP_PERF
--
2.31.1

2022-09-30 05:16:03

by Namhyung Kim

Subject: Re: [PATCH v3 06/15] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR

On Wed, Sep 28, 2022 at 3:00 AM Ravi Bangoria <[email protected]> wrote:
>
> IBS_DC_PHYSADDR provides the physical data address for the tagged load/
> store operation. Populate perf sample physical address using it.
>
> Signed-off-by: Ravi Bangoria <[email protected]>
> ---
> arch/x86/events/amd/ibs.c | 8 +++++++-
> kernel/events/core.c | 3 ++-
> 2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
> index 0ad49105c154..3271735f0070 100644
> --- a/arch/x86/events/amd/ibs.c
> +++ b/arch/x86/events/amd/ibs.c
> @@ -989,6 +989,11 @@ static void perf_ibs_parse_ld_st_data(__u64 sample_type,
> data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
> data->sample_flags |= PERF_SAMPLE_ADDR;
> }
> +
> + if (sample_type & PERF_SAMPLE_PHYS_ADDR && op_data3.dc_phy_addr_valid) {
> + data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
> + data->sample_flags |= PERF_SAMPLE_PHYS_ADDR;
> + }
> }
>
> static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
> @@ -998,7 +1003,8 @@ static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
> (perf_ibs == &perf_ibs_op &&
> (sample_type & PERF_SAMPLE_DATA_SRC ||
> sample_type & PERF_SAMPLE_WEIGHT_TYPE ||
> - sample_type & PERF_SAMPLE_ADDR)))
> + sample_type & PERF_SAMPLE_ADDR ||
> + sample_type & PERF_SAMPLE_PHYS_ADDR)))
> return perf_ibs->offset_max;
> else if (check_rip)
> return 3;
> diff --git a/kernel/events/core.c b/kernel/events/core.c
> index e1ffdb861b53..49bc3b5e6c8a 100644
> --- a/kernel/events/core.c
> +++ b/kernel/events/core.c
> @@ -7435,7 +7435,8 @@ void perf_prepare_sample(struct perf_event_header *header,
> header->size += size;
> }
>
> - if (sample_type & PERF_SAMPLE_PHYS_ADDR)
> + if (sample_type & PERF_SAMPLE_PHYS_ADDR &&
> + filtered_sample_type & PERF_SAMPLE_PHYS_ADDR)

It'd be enough to check the filtered_sample_type only.

Thanks,
Namhyung


> data->phys_addr = perf_virt_to_phys(data->addr);
>
> #ifdef CONFIG_CGROUP_PERF
> --
> 2.31.1
>

2022-09-30 05:17:27

by Ravi Bangoria

Subject: Re: [PATCH v3 06/15] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR

>> diff --git a/kernel/events/core.c b/kernel/events/core.c
>> index e1ffdb861b53..49bc3b5e6c8a 100644
>> --- a/kernel/events/core.c
>> +++ b/kernel/events/core.c
>> @@ -7435,7 +7435,8 @@ void perf_prepare_sample(struct perf_event_header *header,
>> header->size += size;
>> }
>>
>> - if (sample_type & PERF_SAMPLE_PHYS_ADDR)
>> + if (sample_type & PERF_SAMPLE_PHYS_ADDR &&
>> + filtered_sample_type & PERF_SAMPLE_PHYS_ADDR)
>
> It'd be enough to check the filtered_sample_type only.

+1. Will fix it.

Thanks,
Ravi

2022-09-30 10:03:08

by tip-bot2 for Eric Biggers

Subject: [tip: perf/core] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR

The following commit has been merged into the perf/core branch of tip:

Commit-ID: 5b26af6d2b7854639ddf893366bbca7e74fa7c54
Gitweb: https://git.kernel.org/tip/5b26af6d2b7854639ddf893366bbca7e74fa7c54
Author: Ravi Bangoria <[email protected]>
AuthorDate: Wed, 28 Sep 2022 15:27:56 +05:30
Committer: Peter Zijlstra <[email protected]>
CommitterDate: Thu, 29 Sep 2022 12:20:56 +02:00

perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR

IBS_DC_PHYSADDR provides the physical data address for the tagged load/
store operation. Populate perf sample physical address using it.

Signed-off-by: Ravi Bangoria <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
---
arch/x86/events/amd/ibs.c | 8 +++++++-
kernel/events/core.c | 3 ++-
2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 0ad4910..3271735 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -989,6 +989,11 @@ static void perf_ibs_parse_ld_st_data(__u64 sample_type,
data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
data->sample_flags |= PERF_SAMPLE_ADDR;
}
+
+ if (sample_type & PERF_SAMPLE_PHYS_ADDR && op_data3.dc_phy_addr_valid) {
+ data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
+ data->sample_flags |= PERF_SAMPLE_PHYS_ADDR;
+ }
}

static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
@@ -998,7 +1003,8 @@ static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
(perf_ibs == &perf_ibs_op &&
(sample_type & PERF_SAMPLE_DATA_SRC ||
sample_type & PERF_SAMPLE_WEIGHT_TYPE ||
- sample_type & PERF_SAMPLE_ADDR)))
+ sample_type & PERF_SAMPLE_ADDR ||
+ sample_type & PERF_SAMPLE_PHYS_ADDR)))
return perf_ibs->offset_max;
else if (check_rip)
return 3;
diff --git a/kernel/events/core.c b/kernel/events/core.c
index e1ffdb8..49bc3b5 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -7435,7 +7435,8 @@ void perf_prepare_sample(struct perf_event_header *header,
header->size += size;
}

- if (sample_type & PERF_SAMPLE_PHYS_ADDR)
+ if (sample_type & PERF_SAMPLE_PHYS_ADDR &&
+ filtered_sample_type & PERF_SAMPLE_PHYS_ADDR)
data->phys_addr = perf_virt_to_phys(data->addr);

#ifdef CONFIG_CGROUP_PERF

2022-09-30 17:25:23

by Jiri Olsa

Subject: Re: [PATCH v3 06/15] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR

hi,
there's typo in the subject 'PHYS' ;-)

jirka

On Wed, Sep 28, 2022 at 03:27:56PM +0530, Ravi Bangoria wrote:
> IBS_DC_PHYSADDR provides the physical data address for the tagged load/
> store operation. Populate perf sample physical address using it.
>
> Signed-off-by: Ravi Bangoria <[email protected]>
> ---
> arch/x86/events/amd/ibs.c | 8 +++++++-
> kernel/events/core.c | 3 ++-
> 2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
> index 0ad49105c154..3271735f0070 100644
> --- a/arch/x86/events/amd/ibs.c
> +++ b/arch/x86/events/amd/ibs.c
> @@ -989,6 +989,11 @@ static void perf_ibs_parse_ld_st_data(__u64 sample_type,
> data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
> data->sample_flags |= PERF_SAMPLE_ADDR;
> }
> +
> + if (sample_type & PERF_SAMPLE_PHYS_ADDR && op_data3.dc_phy_addr_valid) {
> + data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
> + data->sample_flags |= PERF_SAMPLE_PHYS_ADDR;
> + }
> }
>
> static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
> @@ -998,7 +1003,8 @@ static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
> (perf_ibs == &perf_ibs_op &&
> (sample_type & PERF_SAMPLE_DATA_SRC ||
> sample_type & PERF_SAMPLE_WEIGHT_TYPE ||
> - sample_type & PERF_SAMPLE_ADDR)))
> + sample_type & PERF_SAMPLE_ADDR ||
> + sample_type & PERF_SAMPLE_PHYS_ADDR)))
> return perf_ibs->offset_max;
> else if (check_rip)
> return 3;
> diff --git a/kernel/events/core.c b/kernel/events/core.c
> index e1ffdb861b53..49bc3b5e6c8a 100644
> --- a/kernel/events/core.c
> +++ b/kernel/events/core.c
> @@ -7435,7 +7435,8 @@ void perf_prepare_sample(struct perf_event_header *header,
> header->size += size;
> }
>
> - if (sample_type & PERF_SAMPLE_PHYS_ADDR)
> + if (sample_type & PERF_SAMPLE_PHYS_ADDR &&
> + filtered_sample_type & PERF_SAMPLE_PHYS_ADDR)
> data->phys_addr = perf_virt_to_phys(data->addr);
>
> #ifdef CONFIG_CGROUP_PERF
> --
> 2.31.1
>