2022-09-28 15:44:51

by Liang, Kan

Subject: [PATCH V2 1/4] perf/x86: Add new Raptor Lake S support

From: Kan Liang <[email protected]>

From PMU's perspective, the new Raptor Lake S is the same as the other
of hybrid {ALDER,RAPTOP}LAKE.

Signed-off-by: Kan Liang <[email protected]>
---

Changes since V1:
- Rebase on top of tip master branch
9286a39427d5 ("Merge branch into tip/master: 'perf/core'")

arch/x86/events/intel/core.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 5b26f902899b..a646a5f9a235 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6382,6 +6382,7 @@ __init int intel_pmu_init(void)
case INTEL_FAM6_ALDERLAKE_L:
case INTEL_FAM6_RAPTORLAKE:
case INTEL_FAM6_RAPTORLAKE_P:
+ case INTEL_FAM6_RAPTORLAKE_S:
/*
* Alder Lake has 2 types of CPU, core and atom.
*
--
2.35.1

2022-09-28 15:45:23

by Liang, Kan

Subject: [PATCH V2 2/4] perf/x86/msr: Add new Raptor Lake S support

From: Kan Liang <[email protected]>

The same as the other hybrid {ALDER,RAPTOP}LAKE, the new Raptor Lake S
also support PPERF and SMI_COUNT MSRs.

Signed-off-by: Kan Liang <[email protected]>
---

Changes since V1:
- Rebase on top of tip master branch
9286a39427d5 ("Merge branch into tip/master: 'perf/core'")

arch/x86/events/msr.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index ac542f98c070..ecced3a52668 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -106,6 +106,7 @@ static bool test_intel(int idx, void *data)
case INTEL_FAM6_ALDERLAKE_N:
case INTEL_FAM6_RAPTORLAKE:
case INTEL_FAM6_RAPTORLAKE_P:
+ case INTEL_FAM6_RAPTORLAKE_S:
if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
return true;
break;
--
2.35.1

2022-09-28 16:18:23

by Liang, Kan

Subject: [PATCH V2 3/4] perf/x86/cstate: Add new Raptor Lake S support

From: Kan Liang <[email protected]>

From the perspective of Intel cstate residency counters, the new
Raptor Lake S is the same as the other hybrid {ALDER,RAPTOP}LAKE.

Signed-off-by: Kan Liang <[email protected]>
---

Changes since V1:
- Rebase on top of tip master branch
9286a39427d5 ("Merge branch into tip/master: 'perf/core'")

arch/x86/events/intel/cstate.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 8ec23f47fee9..a2834bc93149 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -685,6 +685,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_cstates),
+ X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_cstates),
{ },
};
MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
--
2.35.1

2022-09-28 16:36:31

by Liang, Kan

Subject: [PATCH V2 4/4] perf/x86/uncore: Add new Raptor Lake S support

From: Kan Liang <[email protected]>

From the perspective of the uncore PMU, the new Raptor Lake S is the
same as the other hybrid {ALDER,RAPTOP}LAKE.

Signed-off-by: Kan Liang <[email protected]>
---

Changes since V1:
- Rebase on top of tip master branch
9286a39427d5 ("Merge branch into tip/master: 'perf/core'")

arch/x86/events/intel/uncore.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index db6c31bca809..6f1ccc57a692 100644
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1831,6 +1831,7 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &adl_uncore_init),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_uncore_init),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_uncore_init),
+ X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_uncore_init),
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &spr_uncore_init),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &snr_uncore_init),
{},
--
2.35.1

2022-09-30 09:41:32

by tip-bot2 for Eric Biggers

Subject: [tip: perf/core] perf/x86/msr: Add new Raptor Lake S support

The following commit has been merged into the perf/core branch of tip:

Commit-ID: 193c888b7ffe4da97346950c0e98dd77cc629f24
Gitweb: https://git.kernel.org/tip/193c888b7ffe4da97346950c0e98dd77cc629f24
Author: Kan Liang <[email protected]>
AuthorDate: Wed, 28 Sep 2022 08:33:29 -07:00
Committer: Peter Zijlstra <[email protected]>
CommitterDate: Thu, 29 Sep 2022 12:20:53 +02:00

perf/x86/msr: Add new Raptor Lake S support

The same as the other hybrid {ALDER,RAPTOP}LAKE, the new Raptor Lake S
also support PPERF and SMI_COUNT MSRs.

Signed-off-by: Kan Liang <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/events/msr.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index ac542f9..ecced3a 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -106,6 +106,7 @@ static bool test_intel(int idx, void *data)
case INTEL_FAM6_ALDERLAKE_N:
case INTEL_FAM6_RAPTORLAKE:
case INTEL_FAM6_RAPTORLAKE_P:
+ case INTEL_FAM6_RAPTORLAKE_S:
if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
return true;
break;

2022-09-30 09:42:37

by tip-bot2 for Eric Biggers

Subject: [tip: perf/core] perf/x86: Add new Raptor Lake S support

The following commit has been merged into the perf/core branch of tip:

Commit-ID: 50b0c97bf00e4815aee09cace28b940ebb060e69
Gitweb: https://git.kernel.org/tip/50b0c97bf00e4815aee09cace28b940ebb060e69
Author: Kan Liang <[email protected]>
AuthorDate: Wed, 28 Sep 2022 08:33:28 -07:00
Committer: Peter Zijlstra <[email protected]>
CommitterDate: Thu, 29 Sep 2022 12:20:52 +02:00

perf/x86: Add new Raptor Lake S support

>From PMU's perspective, the new Raptor Lake S is the same as the other
of hybrid {ALDER,RAPTOP}LAKE.

Signed-off-by: Kan Liang <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/events/intel/core.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index b2d8def..3939deb 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6344,6 +6344,7 @@ __init int intel_pmu_init(void)
case INTEL_FAM6_ALDERLAKE_N:
case INTEL_FAM6_RAPTORLAKE:
case INTEL_FAM6_RAPTORLAKE_P:
+ case INTEL_FAM6_RAPTORLAKE_S:
/*
* Alder Lake has 2 types of CPU, core and atom.
*

2022-09-30 10:01:25

by tip-bot2 for Eric Biggers

Subject: [tip: perf/core] perf/x86/cstate: Add new Raptor Lake S support

The following commit has been merged into the perf/core branch of tip:

Commit-ID: d12940d2ead51c6978e7d38b2abf12b833270b2a
Gitweb: https://git.kernel.org/tip/d12940d2ead51c6978e7d38b2abf12b833270b2a
Author: Kan Liang <[email protected]>
AuthorDate: Wed, 28 Sep 2022 08:33:30 -07:00
Committer: Peter Zijlstra <[email protected]>
CommitterDate: Thu, 29 Sep 2022 12:20:53 +02:00

perf/x86/cstate: Add new Raptor Lake S support

>From the perspective of Intel cstate residency counters, the new
Raptor Lake S is the same as the other hybrid {ALDER,RAPTOP}LAKE.

Signed-off-by: Kan Liang <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/events/intel/cstate.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 8ec23f4..a2834bc 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -685,6 +685,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_cstates),
+ X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_cstates),
{ },
};
MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);

2022-09-30 10:09:23

by tip-bot2 for Eric Biggers

Subject: [tip: perf/core] perf/x86/uncore: Add new Raptor Lake S support

The following commit has been merged into the perf/core branch of tip:

Commit-ID: e04a1607c9c3c0e2dc48715aeb570f2581f514bc
Gitweb: https://git.kernel.org/tip/e04a1607c9c3c0e2dc48715aeb570f2581f514bc
Author: Kan Liang <[email protected]>
AuthorDate: Wed, 28 Sep 2022 08:33:31 -07:00
Committer: Peter Zijlstra <[email protected]>
CommitterDate: Thu, 29 Sep 2022 12:20:53 +02:00

perf/x86/uncore: Add new Raptor Lake S support

>From the perspective of the uncore PMU, the new Raptor Lake S is the
same as the other hybrid {ALDER,RAPTOP}LAKE.

Signed-off-by: Kan Liang <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/events/intel/uncore.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index db6c31b..6f1ccc5 100644
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1831,6 +1831,7 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &adl_uncore_init),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_uncore_init),
X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_uncore_init),
+ X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_uncore_init),
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &spr_uncore_init),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &snr_uncore_init),
{},