The J784S4 SoC belongs to the K3 Multicore SoC architecture
platform, providing advanced system integration in automotive,
ADAS and industrial applications requiring AI at the network edge.
This SoC extends the K3 Jacinto 7 family of SoCs with focus on
raising performance and integration while providing interfaces,
memory architecture and compute performance for multi-sensor, high
concurrency applications.
Some highlights of this SoC are:
* Up to 8 Cortex-A72s, four clusters of lockstep capable dual Cortex-R5F MCUs,
4 C7x floating point vector DSPs with Matrix Multiply Accelerator(MMA) for
deep learning and CNN.
* 3D GPU: Automotive grade IMG BXS-4-64
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
and Motion Processing Accelerator (DMPAC)
* Three CSI2.0 4L RX plus two CSI2.0 4L TX, two DSI Tx, one eDP/DP and one
DPI interface.
* Integrated gigabit ethernet switch, up to 8 ports (TDA4VH), two ports
support 10Gb USXGMII; Two 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role
device subsystems, Up to 20 MCANs, among other peripherals.
See J784S4 Technical Reference Manual (SPRUJ52 - JUNE 2022)
for further details: http://www.ti.com/lit/zip/spruj52
bootlog: https://rentry.co/gbefx/raw
Changes in v5:
- Converted all 0x0 to 0x00 in dtsi files
Changes in v4:
- Removed ti,sci-dev-id from main_navss and mcu_navss, also changed their
compatibles to "simple-bus"
- Removed status = "disabled" from phy_gmii_sel and cpts@3d000
- Removed empty chosen {} from k3-j784s4.dtsi
Changes in v3:
- Enabled hwspinlock, main_ringacc, main_udmap, cpts, and mcu_navss in
the dtsi
- Removed alignment in secure_ddr optee
- Changed the assigned clock parent in main and mcu cpts to main pll0, hsdiv6
from pll3, hsdiv1
- Removed few signed-off by
- Formatting fixes at some places
- Corrected link to EVM board schmatics in the commit
Changes in v2:
- Disabled all the IPs that are not mandatory for booting up the SoC by
default in the dtsi, and thus this gives a minimal SoC boot devicetree.
- Moved no-1-8-v property from the k3-j784s4-evm.dts file to
k3-j784s4-main.dtsi file.
- Naming changes (hwlock, regulator) and commit description changes.
- Added device specific compatible for j721e system controller.
- Dropped bootargs completely.
Apurva Nandan (4):
dt-bindings: arm: ti: Add bindings for J784s4 SoC
dt-bindings: pinctrl: k3: Introduce pinmux definitions for J784s4
arm64: dts: ti: Add initial support for J784S4 SoC
arm64: dts: ti: Add support for J784S4 EVM board
.../devicetree/bindings/arm/ti/k3.yaml | 6 +
arch/arm64/boot/dts/ti/Makefile | 2 +
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 196 ++++
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 1007 +++++++++++++++++
.../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 311 +++++
arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 284 +++++
include/dt-bindings/pinctrl/k3.h | 3 +
7 files changed, 1809 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4.dtsi
--
2.34.1
Hi Apurva Nandan,
On Thu, 12 Jan 2023 19:57:21 +0530, Apurva Nandan wrote:
> The J784S4 SoC belongs to the K3 Multicore SoC architecture
> platform, providing advanced system integration in automotive,
> ADAS and industrial applications requiring AI at the network edge.
> This SoC extends the K3 Jacinto 7 family of SoCs with focus on
> raising performance and integration while providing interfaces,
> memory architecture and compute performance for multi-sensor, high
> concurrency applications.
>
> [...]
I have applied the following to branch ti-k3-next on [1].
Thank you!
[1/4] dt-bindings: arm: ti: Add bindings for J784s4 SoC
commit: 5e0a1e0d265cb11fca3464bbe9511740c46f759f
[2/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions for J784s4
commit: a0c01bc565332cff9183bd8a17b4db94732d645d
[3/4] arm64: dts: ti: Add initial support for J784S4 SoC
commit: 4664ebd8346adaa7530555a29b47392104b5ba6c
[4/4] arm64: dts: ti: Add support for J784S4 EVM board
commit: e20a06aca5c9d2d68354c340f96999d8dcb7128d
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh