Some SoCs (like SM6115 or SC7280 with various firmwares) expect a single
clock for the LPASS pinctrl.
This serires addresses that by simplifying the probe code and relying
on bindings to sanction the correct number of clocks. That allows us to
shoot down another downstream-ism.
Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (3):
pinctrl: qcom: lpass-lpi: Make the clocks optional, always
dt-bindings: pinctrl: qcom: lpass-lpi: Remove qcom,adsp-bypass-mode
arm64: dts: qcom: sc7280: Remove qcom,adsp-bypass-mode
.../devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 5 -----
arch/arm64/boot/dts/qcom/sc7280.dtsi | 1 -
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 6 +-----
3 files changed, 1 insertion(+), 11 deletions(-)
---
base-commit: 7c2878be573282a9961c359b806ccf70afe1a6b6
change-id: 20230714-topic-lpass_lpi_cleanup-f37ab68f9985
Best regards,
--
Konrad Dybcio <[email protected]>
This property isn't used or defined anymore. Get rid of it.
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 925428a5f6ae..ce7d318afd57 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2510,7 +2510,6 @@ lpass_tlmm: pinctrl@33c0000 {
compatible = "qcom,sc7280-lpass-lpi-pinctrl";
reg = <0 0x033c0000 0x0 0x20000>,
<0 0x03550000 0x0 0x10000>;
- qcom,adsp-bypass-mode;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 15>;
--
2.41.0
Some platforms provide a single clock source to all LPASS peripherals,
others provide two, and there are probably others that provide it through
magic invisible-to-Linux wires.
Rely on bindings to mandate the adequate number of clocks necessary.
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
index fdb6585a9234..6cf6c734db17 100644
--- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
+++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
@@ -438,11 +438,7 @@ int lpi_pinctrl_probe(struct platform_device *pdev)
return dev_err_probe(dev, PTR_ERR(pctrl->slew_base),
"Slew resource not provided\n");
- if (of_property_read_bool(dev->of_node, "qcom,adsp-bypass-mode"))
- ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
- else
- ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
-
+ ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
if (ret)
return ret;
--
2.41.0
This property was introduced as a bad hack. Now that it's useless, get
rid of it.
Signed-off-by: Konrad Dybcio <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 5 -----
1 file changed, 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
index fa51fa9536f7..00c5a00e35fc 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
@@ -17,11 +17,6 @@ properties:
compatible:
const: qcom,sc7280-lpass-lpi-pinctrl
- qcom,adsp-bypass-mode:
- description:
- Tells ADSP is in bypass mode.
- type: boolean
-
reg:
maxItems: 2
--
2.41.0
On Fri, 14 Jul 2023 14:40:47 +0200, Konrad Dybcio wrote:
> This property was introduced as a bad hack. Now that it's useless, get
> rid of it.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 5 -----
> 1 file changed, 5 deletions(-)
>
Acked-by: Rob Herring <[email protected]>
On Fri, Jul 14, 2023 at 2:40 PM Konrad Dybcio <[email protected]> wrote:
> Some SoCs (like SM6115 or SC7280 with various firmwares) expect a single
> clock for the LPASS pinctrl.
>
> This serires addresses that by simplifying the probe code and relying
> on bindings to sanction the correct number of clocks. That allows us to
> shoot down another downstream-ism.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
Patch 1 & 2 applied to the pinctrl tree, please funnel patch 3 through
the SoC tree.
Yours,
Linus Walleij
On Fri, 14 Jul 2023 14:40:45 +0200, Konrad Dybcio wrote:
> Some SoCs (like SM6115 or SC7280 with various firmwares) expect a single
> clock for the LPASS pinctrl.
>
> This serires addresses that by simplifying the probe code and relying
> on bindings to sanction the correct number of clocks. That allows us to
> shoot down another downstream-ism.
>
> [...]
Applied, thanks!
[3/3] arm64: dts: qcom: sc7280: Remove qcom,adsp-bypass-mode
commit: 274926cc4ced14f4e61204c0cd23fd099daa9b16
Best regards,
--
Bjorn Andersson <[email protected]>