2023-09-25 04:40:47

by Krzysztof Kozlowski

[permalink] [raw]
Subject: [RESEND PATCH 1/3] ARM: dts: qcom: sdx65: correct PCIe EP phy-names

Qualcomm PCIe endpoint bindings expect phy-names to be "pciephy":

arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dtb: pcie-ep@1c00000: phy-names:0: 'pciephy' was expected

Fixes: 9c0bb38414a4 ("ARM: dts: qcom: sdx65: Add support for PCIe EP")
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
index dd711484dfc9..c9790217320b 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
@@ -337,7 +337,7 @@ pcie_ep: pcie-ep@1c00000 {
power-domains = <&gcc PCIE_GDSC>;

phys = <&pcie_phy>;
- phy-names = "pcie-phy";
+ phy-names = "pciephy";

max-link-speed = <3>;
num-lanes = <2>;
--
2.34.1


2023-09-25 11:36:23

by Dmitry Baryshkov

[permalink] [raw]
Subject: Re: [RESEND PATCH 1/3] ARM: dts: qcom: sdx65: correct PCIe EP phy-names

On Sun, 24 Sept 2023 at 21:31, Krzysztof Kozlowski
<[email protected]> wrote:
>
> Qualcomm PCIe endpoint bindings expect phy-names to be "pciephy":
>
> arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dtb: pcie-ep@1c00000: phy-names:0: 'pciephy' was expected
>
> Fixes: 9c0bb38414a4 ("ARM: dts: qcom: sdx65: Add support for PCIe EP")
> Reviewed-by: Konrad Dybcio <[email protected]>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Dmitry Baryshkov <[email protected]>



--
With best wishes
Dmitry

2023-09-26 10:43:54

by Manivannan Sadhasivam

[permalink] [raw]
Subject: Re: [RESEND PATCH 1/3] ARM: dts: qcom: sdx65: correct PCIe EP phy-names

On Sun, Sep 24, 2023 at 08:31:01PM +0200, Krzysztof Kozlowski wrote:
> Qualcomm PCIe endpoint bindings expect phy-names to be "pciephy":
>
> arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dtb: pcie-ep@1c00000: phy-names:0: 'pciephy' was expected
>
> Fixes: 9c0bb38414a4 ("ARM: dts: qcom: sdx65: Add support for PCIe EP")
> Reviewed-by: Konrad Dybcio <[email protected]>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Reviewed-by: Manivannan Sadhasivam <[email protected]>

- Mani

> ---
> arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
> index dd711484dfc9..c9790217320b 100644
> --- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
> @@ -337,7 +337,7 @@ pcie_ep: pcie-ep@1c00000 {
> power-domains = <&gcc PCIE_GDSC>;
>
> phys = <&pcie_phy>;
> - phy-names = "pcie-phy";
> + phy-names = "pciephy";
>
> max-link-speed = <3>;
> num-lanes = <2>;
> --
> 2.34.1
>

--
மணிவண்ணன் சதாசிவம்

2023-12-03 04:53:16

by Bjorn Andersson

[permalink] [raw]
Subject: Re: (subset) [RESEND PATCH 1/3] ARM: dts: qcom: sdx65: correct PCIe EP phy-names


On Sun, 24 Sep 2023 20:31:01 +0200, Krzysztof Kozlowski wrote:
> Qualcomm PCIe endpoint bindings expect phy-names to be "pciephy":
>
> arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dtb: pcie-ep@1c00000: phy-names:0: 'pciephy' was expected
>
>

Applied, thanks!

[1/3] ARM: dts: qcom: sdx65: correct PCIe EP phy-names
commit: 94da379dba88c4cdd562bad21c9ba5656e5ed5df
[2/3] ARM: dts: qcom: sdx65: add missing GCC clocks
commit: f64f653df2ef713359178c731bc8f89ff54014b1
[3/3] ARM: dts: qcom: sdx65: correct SPMI node name
commit: a900ad783f507cb396e402827052e70c0c565ae9

Best regards,
--
Bjorn Andersson <[email protected]>