2022-07-07 15:34:40

by Matthew Gerlach

[permalink] [raw]
Subject: [PATCH v3 0/2] Add PCIE device IDs for Intel DFL cards

From: Matthew Gerlach <[email protected]>

This patch set adds the PCIE device IDs for Intel cards with Device Feature
Lists (DFL) to the pci_dev_table for the dfl-pci driver. This patch set
was separated for clarity from a larger patch set submitted by
[email protected].

Patch 1 adds documentation about identifying PCIE FPGA cards
with Device Feature Lists (DFL).

Patch 2 adds the device ids to the pci_dev_table for the dfl-pci driver.

Matthew Gerlach (2):
Documentation: fpga: dfl: add PCI Identification documentation
fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards

Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++
drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++
2 files changed, 40 insertions(+)

--
2.25.1


2022-07-07 15:35:25

by Matthew Gerlach

[permalink] [raw]
Subject: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards

From: Matthew Gerlach <[email protected]>

Add pci_dev_table entries supporting the Intel N6000, N6001
and C6100 cards to the dfl-pci driver.

Signed-off-by: Matthew Gerlach <[email protected]>
Signed-off-by: Tianfei Zhang <[email protected]>
---
v3: added necessary subdevice ids
removed 'drivers: ' from title

v2: changed names from INTEL_OFS to INTEL_DFL
---
drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)

diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
index fd1fa55c9113..94eabdf1d2f7 100644
--- a/drivers/fpga/dfl-pci.c
+++ b/drivers/fpga/dfl-pci.c
@@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
#define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B
#define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000
#define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001
+#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce

/* VF Device */
#define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF
#define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1
#define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5
#define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C
+#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf
+
+/* PCI Subdevice ID */
+#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770
+#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771
+#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4

static struct pci_device_id cci_pcie_id_tbl[] = {
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),},
@@ -96,6 +103,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = {
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),},
{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},
{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},
+ {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
+ PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
+ {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
+ PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
+ {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
+ PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
+ {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
+ PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
+ {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
+ PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
+ {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
+ PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
{0,}
};
MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);
--
2.25.1

2022-07-07 15:59:44

by Matthew Gerlach

[permalink] [raw]
Subject: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation

From: Matthew Gerlach <[email protected]>

Add documentation on identifying FPGA based PCI cards prompted
by discussion on the [email protected] mailing list.

Signed-off-by: Matthew Gerlach <[email protected]>
---
v3: Add url to page tracking PCI ID information for DFL based cards.

v2: Introduced in v2.
---
Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)

diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
index 15b670926084..5144775b860a 100644
--- a/Documentation/fpga/dfl.rst
+++ b/Documentation/fpga/dfl.rst
@@ -507,6 +507,27 @@ ids application.
https://github.com/OPAE/dfl-feature-id


+PCI Device Identification
+================================
+Since FPGA based PCI cards can be reconfigured to a perform a completely
+new function at runtime, properly identifying such cards and binding the
+correct driver can be challenging. In many use cases, deployed FPGA based
+PCI cards are essentially static and the PCI Product ID and Vendor ID pair
+is sufficient to identify the card. The DFL framework helps with the
+dynamic case of deployed FPGA cards changing at run time by providing
+more detailed information about card discoverable at runtime.
+
+At one level, the DFL on a PCI card describes the function of the card.
+However, the same DFL could be instantiated on different physical cards.
+Conversely, different DFLs could be instantiated on the same physical card.
+Practical management of a cloud containing a heterogeneous set of such cards
+requires a PCI level of card identification. While the PCI Product ID and
+Vendor ID may be sufficient to bind the dfl-pci driver, it is expected
+that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem
+Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking
+can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci-ids.rst.
+
+
Location of DFLs on a PCI Device
================================
The original method for finding a DFL on a PCI device assumed the start of the
--
2.25.1

2022-07-12 16:29:12

by Marco Pagani

[permalink] [raw]
Subject: Re: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards

On 2022-07-07 17:05, [email protected] wrote:
> From: Matthew Gerlach <[email protected]>
>
> Add pci_dev_table entries supporting the Intel N6000, N6001
> and C6100 cards to the dfl-pci driver.
>
> Signed-off-by: Matthew Gerlach <[email protected]>
> Signed-off-by: Tianfei Zhang <[email protected]>

Tested-by: Marco Pagani <[email protected]>

> ---
> v3: added necessary subdevice ids
> removed 'drivers: ' from title
>
> v2: changed names from INTEL_OFS to INTEL_DFL
> ---
> drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
> index fd1fa55c9113..94eabdf1d2f7 100644
> --- a/drivers/fpga/dfl-pci.c
> +++ b/drivers/fpga/dfl-pci.c
> @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
> #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B
> #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000
> #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001
> +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce
>
> /* VF Device */
> #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF
> #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1
> #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5
> #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C
> +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf
> +
> +/* PCI Subdevice ID */
> +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770
> +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771
> +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4
>
> static struct pci_device_id cci_pcie_id_tbl[] = {
> {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),},
> @@ -96,6 +103,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = {
> {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),},
> {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},
> {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
> {0,}
> };
> MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);

2022-07-12 17:17:23

by Marco Pagani

[permalink] [raw]
Subject: Re: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation

On 2022-07-07 17:05, [email protected] wrote:
> From: Matthew Gerlach <[email protected]>
>
> Add documentation on identifying FPGA based PCI cards prompted
> by discussion on the [email protected] mailing list.
>
> Signed-off-by: Matthew Gerlach <[email protected]>
> ---
> v3: Add url to page tracking PCI ID information for DFL based cards.
>
> v2: Introduced in v2.
> ---
> Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> index 15b670926084..5144775b860a 100644
> --- a/Documentation/fpga/dfl.rst
> +++ b/Documentation/fpga/dfl.rst
> @@ -507,6 +507,27 @@ ids application.
> https://github.com/OPAE/dfl-feature-id
>
>
> +PCI Device Identification
> +================================
> +Since FPGA based PCI cards can be reconfigured to a perform a completely

There's a small typo: "to a perform" --> "to perform"

> +new function at runtime, properly identifying such cards and binding the
> +correct driver can be challenging. In many use cases, deployed FPGA based
> +PCI cards are essentially static and the PCI Product ID and Vendor ID pair
> +is sufficient to identify the card. The DFL framework helps with the
> +dynamic case of deployed FPGA cards changing at run time by providing
> +more detailed information about card discoverable at runtime.
> +
> +At one level, the DFL on a PCI card describes the function of the card.
> +However, the same DFL could be instantiated on different physical cards.
> +Conversely, different DFLs could be instantiated on the same physical card.
> +Practical management of a cloud containing a heterogeneous set of such cards
> +requires a PCI level of card identification. While the PCI Product ID and
> +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected
> +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem
> +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking
> +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci-ids.rst.
> +
> +
> Location of DFLs on a PCI Device
> ================================
> The original method for finding a DFL on a PCI device assumed the start of the

Marco

2022-07-12 19:48:59

by Matthew Gerlach

[permalink] [raw]
Subject: Re: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards



On Tue, 12 Jul 2022, Marco Pagani wrote:

> On 2022-07-07 17:05, [email protected] wrote:
>> From: Matthew Gerlach <[email protected]>
>>
>> Add pci_dev_table entries supporting the Intel N6000, N6001
>> and C6100 cards to the dfl-pci driver.
>>
>> Signed-off-by: Matthew Gerlach <[email protected]>
>> Signed-off-by: Tianfei Zhang <[email protected]>
>
> Tested-by: Marco Pagani <[email protected]>

Thanks for testing.

Matthew
>
>> ---
>> v3: added necessary subdevice ids
>> removed 'drivers: ' from title
>>
>> v2: changed names from INTEL_OFS to INTEL_DFL
>> ---
>> drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++
>> 1 file changed, 19 insertions(+)
>>
>> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
>> index fd1fa55c9113..94eabdf1d2f7 100644
>> --- a/drivers/fpga/dfl-pci.c
>> +++ b/drivers/fpga/dfl-pci.c
>> @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
>> #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B
>> #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000
>> #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001
>> +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce
>>
>> /* VF Device */
>> #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF
>> #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1
>> #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5
>> #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C
>> +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf
>> +
>> +/* PCI Subdevice ID */
>> +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770
>> +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771
>> +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4
>>
>> static struct pci_device_id cci_pcie_id_tbl[] = {
>> {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),},
>> @@ -96,6 +103,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = {
>> {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),},
>> {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},
>> {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},
>> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
>> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
>> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
>> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
>> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
>> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
>> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
>> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
>> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
>> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
>> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
>> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
>> {0,}
>> };
>> MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);
>
>

2022-07-13 22:02:03

by Tom Rix

[permalink] [raw]
Subject: Re: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards


On 7/7/22 8:05 AM, [email protected] wrote:
> From: Matthew Gerlach <[email protected]>
>
> Add pci_dev_table entries supporting the Intel N6000, N6001
> and C6100 cards to the dfl-pci driver.
>
> Signed-off-by: Matthew Gerlach <[email protected]>
> Signed-off-by: Tianfei Zhang <[email protected]>
> ---
> v3: added necessary subdevice ids
> removed 'drivers: ' from title
>
> v2: changed names from INTEL_OFS to INTEL_DFL
> ---
> drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
> index fd1fa55c9113..94eabdf1d2f7 100644
> --- a/drivers/fpga/dfl-pci.c
> +++ b/drivers/fpga/dfl-pci.c
> @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
> #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B
> #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000
> #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001
> +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce
>
> /* VF Device */
> #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF
> #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1
> #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5
> #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C
> +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf
> +
> +/* PCI Subdevice ID */
> +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770
> +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771
> +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4
>
> static struct pci_device_id cci_pcie_id_tbl[] = {
> {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),},
> @@ -96,6 +103,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = {
> {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),},
> {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},
> {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
> + {PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
> + PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},

Matt,

Thanks for making this change, this addresses my concerns with the
earlier patch.

Reviewed-by: Tom Rix <[email protected]>

> {0,}
> };
> MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);

2022-07-13 22:18:21

by Tom Rix

[permalink] [raw]
Subject: Re: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation


On 7/7/22 8:05 AM, [email protected] wrote:
> From: Matthew Gerlach <[email protected]>
>
> Add documentation on identifying FPGA based PCI cards prompted
> by discussion on the [email protected] mailing list.
>
> Signed-off-by: Matthew Gerlach <[email protected]>
> ---
> v3: Add url to page tracking PCI ID information for DFL based cards.
>
> v2: Introduced in v2.
> ---
> Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> index 15b670926084..5144775b860a 100644
> --- a/Documentation/fpga/dfl.rst
> +++ b/Documentation/fpga/dfl.rst
> @@ -507,6 +507,27 @@ ids application.
> https://github.com/OPAE/dfl-feature-id
>
>
> +PCI Device Identification
> +================================
> +Since FPGA based PCI cards can be reconfigured to a perform a completely
> +new function at runtime, properly identifying such cards and binding the
> +correct driver can be challenging. In many use cases, deployed FPGA based
> +PCI cards are essentially static and the PCI Product ID and Vendor ID pair
> +is sufficient to identify the card. The DFL framework helps with the
> +dynamic case of deployed FPGA cards changing at run time by providing
> +more detailed information about card discoverable at runtime.
> +
> +At one level, the DFL on a PCI card describes the function of the card.
> +However, the same DFL could be instantiated on different physical cards.
> +Conversely, different DFLs could be instantiated on the same physical card.
> +Practical management of a cloud containing a heterogeneous set of such cards
> +requires a PCI level of card identification. While the PCI Product ID and
> +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected
> +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem
> +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking
> +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci-ids.rst.

This link looks good.

It may be good to be explicit and say which device(s) needs to be
specified by the quadruple.

Reviewed-by: Tom Rix <[email protected]>

> +
> +
> Location of DFLs on a PCI Device
> ================================
> The original method for finding a DFL on a PCI device assumed the start of the

2022-07-18 04:51:49

by Wu Hao

[permalink] [raw]
Subject: RE: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation

> -----Original Message-----
> From: [email protected] <[email protected]>
> Sent: Thursday, July 7, 2022 11:06 PM
> To: Wu, Hao <[email protected]>; Xu, Yilun <[email protected]>; Weight,
> Russell H <[email protected]>; Muddebihal, Basheer Ahmed
> <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected]; linux-
> [email protected]; [email protected]; Zhang, Tianfei
> <[email protected]>
> Cc: Matthew Gerlach <[email protected]>
> Subject: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification
> documentation
>
> From: Matthew Gerlach <[email protected]>
>
> Add documentation on identifying FPGA based PCI cards prompted
> by discussion on the [email protected] mailing list.
>
> Signed-off-by: Matthew Gerlach <[email protected]>
> ---
> v3: Add url to page tracking PCI ID information for DFL based cards.
>
> v2: Introduced in v2.
> ---
> Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> index 15b670926084..5144775b860a 100644
> --- a/Documentation/fpga/dfl.rst
> +++ b/Documentation/fpga/dfl.rst
> @@ -507,6 +507,27 @@ ids application.
> https://github.com/OPAE/dfl-feature-id
>
>
> +PCI Device Identification
> +================================
> +Since FPGA based PCI cards can be reconfigured to a perform a completely
> +new function at runtime, properly identifying such cards and binding the
> +correct driver can be challenging. In many use cases, deployed FPGA based
> +PCI cards are essentially static and the PCI Product ID and Vendor ID pair
> +is sufficient to identify the card. The DFL framework helps with the
> +dynamic case of deployed FPGA cards changing at run time by providing
> +more detailed information about card discoverable at runtime.
> +
> +At one level, the DFL on a PCI card describes the function of the card.
> +However, the same DFL could be instantiated on different physical cards.
> +Conversely, different DFLs could be instantiated on the same physical card.
> +Practical management of a cloud containing a heterogeneous set of such
> cards
> +requires a PCI level of card identification. While the PCI Product ID and
> +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected
> +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem
> +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking
> +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci-
> ids.rst.

I feel that we may not really need this in fpga-dfl doc, as this is not describing
any new method provided by DFL, but just something from PCI standard, right?

Thanks
Hao

2022-07-18 05:04:17

by Wu Hao

[permalink] [raw]
Subject: RE: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards

> -----Original Message-----
> From: [email protected] <[email protected]>
> Sent: Thursday, July 7, 2022 11:06 PM
> To: Wu, Hao <[email protected]>; Xu, Yilun <[email protected]>; Weight,
> Russell H <[email protected]>; Muddebihal, Basheer Ahmed
> <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected]; linux-
> [email protected]; [email protected]; Zhang, Tianfei
> <[email protected]>
> Cc: Matthew Gerlach <[email protected]>
> Subject: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and
> C6100 cards
>
> From: Matthew Gerlach <[email protected]>
>
> Add pci_dev_table entries supporting the Intel N6000, N6001
> and C6100 cards to the dfl-pci driver.
>
> Signed-off-by: Matthew Gerlach <[email protected]>
> Signed-off-by: Tianfei Zhang <[email protected]>
> ---
> v3: added necessary subdevice ids
> removed 'drivers: ' from title
>
> v2: changed names from INTEL_OFS to INTEL_DFL
> ---
> drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
> index fd1fa55c9113..94eabdf1d2f7 100644
> --- a/drivers/fpga/dfl-pci.c
> +++ b/drivers/fpga/dfl-pci.c
> @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
> #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B
> #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000
> #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001
> +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce
>
> /* VF Device */
> #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF
> #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1
> #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5
> #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C
> +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf
> +
> +/* PCI Subdevice ID */
> +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770
> +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771
> +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4

Please move SUBDEVICE_ID above together with DEVICE_ID.
If we add new SUBDEVICE to some other device like this, it will
be hard to distinguish them.

With above change.
Acked-by: Wu Hao <[email protected]>

Thanks
Hao

2022-07-18 19:30:46

by Matthew Gerlach

[permalink] [raw]
Subject: RE: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards



On Mon, 18 Jul 2022, Wu, Hao wrote:

>> -----Original Message-----
>> From: [email protected] <[email protected]>
>> Sent: Thursday, July 7, 2022 11:06 PM
>> To: Wu, Hao <[email protected]>; Xu, Yilun <[email protected]>; Weight,
>> Russell H <[email protected]>; Muddebihal, Basheer Ahmed
>> <[email protected]>; [email protected];
>> [email protected]; [email protected]; [email protected]; linux-
>> [email protected]; [email protected]; Zhang, Tianfei
>> <[email protected]>
>> Cc: Matthew Gerlach <[email protected]>
>> Subject: [PATCH v3 2/2] fpga: dfl-pci: Add IDs for Intel N6000, N6001 and
>> C6100 cards
>>
>> From: Matthew Gerlach <[email protected]>
>>
>> Add pci_dev_table entries supporting the Intel N6000, N6001
>> and C6100 cards to the dfl-pci driver.
>>
>> Signed-off-by: Matthew Gerlach <[email protected]>
>> Signed-off-by: Tianfei Zhang <[email protected]>
>> ---
>> v3: added necessary subdevice ids
>> removed 'drivers: ' from title
>>
>> v2: changed names from INTEL_OFS to INTEL_DFL
>> ---
>> drivers/fpga/dfl-pci.c | 19 +++++++++++++++++++
>> 1 file changed, 19 insertions(+)
>>
>> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
>> index fd1fa55c9113..94eabdf1d2f7 100644
>> --- a/drivers/fpga/dfl-pci.c
>> +++ b/drivers/fpga/dfl-pci.c
>> @@ -77,12 +77,19 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
>> #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B
>> #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000
>> #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001
>> +#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce
>>
>> /* VF Device */
>> #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF
>> #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1
>> #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5
>> #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C
>> +#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf
>> +
>> +/* PCI Subdevice ID */
>> +#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770
>> +#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771
>> +#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4
>
> Please move SUBDEVICE_ID above together with DEVICE_ID.
> If we add new SUBDEVICE to some other device like this, it will
> be hard to distinguish them.

This is a very good suggestion. I will resubmit with your suggestion.

Thanks for the review.
Matthew
>
> With above change.
> Acked-by: Wu Hao <[email protected]>
>
> Thanks
> Hao
>
>

2022-07-18 20:03:35

by Matthew Gerlach

[permalink] [raw]
Subject: RE: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification documentation



On Mon, 18 Jul 2022, Wu, Hao wrote:

>> -----Original Message-----
>> From: [email protected] <[email protected]>
>> Sent: Thursday, July 7, 2022 11:06 PM
>> To: Wu, Hao <[email protected]>; Xu, Yilun <[email protected]>; Weight,
>> Russell H <[email protected]>; Muddebihal, Basheer Ahmed
>> <[email protected]>; [email protected];
>> [email protected]; [email protected]; [email protected]; linux-
>> [email protected]; [email protected]; Zhang, Tianfei
>> <[email protected]>
>> Cc: Matthew Gerlach <[email protected]>
>> Subject: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification
>> documentation
>>
>> From: Matthew Gerlach <[email protected]>
>>
>> Add documentation on identifying FPGA based PCI cards prompted
>> by discussion on the [email protected] mailing list.
>>
>> Signed-off-by: Matthew Gerlach <[email protected]>
>> ---
>> v3: Add url to page tracking PCI ID information for DFL based cards.
>>
>> v2: Introduced in v2.
>> ---
>> Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++
>> 1 file changed, 21 insertions(+)
>>
>> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
>> index 15b670926084..5144775b860a 100644
>> --- a/Documentation/fpga/dfl.rst
>> +++ b/Documentation/fpga/dfl.rst
>> @@ -507,6 +507,27 @@ ids application.
>> https://github.com/OPAE/dfl-feature-id
>>
>>
>> +PCI Device Identification
>> +================================
>> +Since FPGA based PCI cards can be reconfigured to a perform a completely
>> +new function at runtime, properly identifying such cards and binding the
>> +correct driver can be challenging. In many use cases, deployed FPGA based
>> +PCI cards are essentially static and the PCI Product ID and Vendor ID pair
>> +is sufficient to identify the card. The DFL framework helps with the
>> +dynamic case of deployed FPGA cards changing at run time by providing
>> +more detailed information about card discoverable at runtime.
>> +
>> +At one level, the DFL on a PCI card describes the function of the card.
>> +However, the same DFL could be instantiated on different physical cards.
>> +Conversely, different DFLs could be instantiated on the same physical card.
>> +Practical management of a cloud containing a heterogeneous set of such
>> cards
>> +requires a PCI level of card identification. While the PCI Product ID and
>> +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected
>> +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem
>> +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking
>> +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci-
>> ids.rst.
>
> I feel that we may not really need this in fpga-dfl doc, as this is not describing
> any new method provided by DFL, but just something from PCI standard, right?

I think you are correct that this documentation change is not necessary.
It was useful as a mechanism for discussion, but it is really just
something from the PCI standard.

I will not include it in the v4 patch set.

>
> Thanks
> Hao
>