Hello,
we just implemented the Intel PIIX DMA Bus Master capable IDE Controller
in FAUmachine. This improved the IO access to virtual IDE Devices using
DMA as transport mechanism a lot.
But with the current simulation it is only possible to access 4 devices
via DMA.
Because of that I am looking for a good documented PCI IDE Controller
Card to provide DMA access to more than 4 devices with public available
documentation. Any pointers?
Please CC me because I am currently not subscribed to linux-kernel.
Thomas
--
Thomas Glanzmann ++49 (0) 9131 85-27574 Department of Computer Science III
Martensstrasse 3 D-91058 Erlangen Germany University of Erlangen-Nuremberg
http://www3.informatik.uni-erlangen.de/Research/FAUmachine/
Hi,
On Sat, 19 Feb 2005 11:24:10 +0100, Thomas Glanzmann
<[email protected]> wrote:
> Hello,
> we just implemented the Intel PIIX DMA Bus Master capable IDE Controller
> in FAUmachine. This improved the IO access to virtual IDE Devices using
> DMA as transport mechanism a lot.
>
> But with the current simulation it is only possible to access 4 devices
> via DMA.
>
> Because of that I am looking for a good documented PCI IDE Controller
> Card to provide DMA access to more than 4 devices with public available
> documentation. Any pointers?
In IDE you have 2 devices per port and usually 2 ports per PCI device.
There are some controller cards with 4 ports but they don't have public
available documentation etc. I really wonder what are you trying to
achieve and why just can't you use more than 1 "virtual" PIIX crontoller.
Bartlomiej
Hello Bartlomiej,
> In IDE you have 2 devices per port and usually 2 ports per PCI device.
> There are some controller cards with 4 ports but they don't have public
> available documentation etc. I really wonder what are you trying to
> achieve and why just can't you use more than 1 "virtual" PIIX crontoller.
we implemented the PIIX controller as part of an Intel Southbridge
82371AB[1] Chip so I didn't thought that it was also available as
seperate PCI Device. Do you have any pointers to products or better
sepcification of this products?
If this is the case that would be the best solution for our problem.
[1] Intel(R) 82371AB PCI-TO-ISA/IDE Xcelerator (PIIX4) Datasheet
http://www.intel.com/design/intarch/datashts/290562.htm
ftp://download.intel.com/design/intarch/datashts/29056201.pdf
Greetings,
Thomas
Hello,
to clear things up. We implemented the PIIX IDE controller as part of
the Intel Southbridge 82371AB which is part of the South bridge and a
*onboard* chip. This chip has only two IDE channels AFAIK.
The best thing would be if there is a PCI card or another chipset which
has a PIIX IDE controller with more channels.
Otherwise I look for another easy to implement IDE Bus Master capable
chip with 2 channels which I can implement as PCI Card to use more of
the card to get more DMA capable IDE channels in the virtual machine.
Thomas
On Sat, 19 Feb 2005 14:26:07 +0100, Thomas Glanzmann
<[email protected]> wrote:
> Hello Bartlomiej,
>
> > In IDE you have 2 devices per port and usually 2 ports per PCI device.
> > There are some controller cards with 4 ports but they don't have public
> > available documentation etc. I really wonder what are you trying to
> > achieve and why just can't you use more than 1 "virtual" PIIX crontoller.
>
> we implemented the PIIX controller as part of an Intel Southbridge
> 82371AB[1] Chip so I didn't thought that it was also available as
> seperate PCI Device. Do you have any pointers to products or better
> sepcification of this products?
Nope.
> If this is the case that would be the best solution for our problem.
Hm, maybe you will have to implement some PCI add-on IDE controller,
AFAIR Silicon Image 680 datasheet is publicly available now.
Bartlomiej
Hello,
> Hm, maybe you will have to implement some PCI add-on IDE controller,
> AFAIR Silicon Image 680 datasheet is publicly available now.
I just talked with a coworker who has experience with the above card. He
told me that this IDE controller (hardware) has havy problems if you
have havy load on both channels. (Blue screens in windows and DMA errors
in Linux).
He also told me that everything works fine if you use one channel in PIO
mode and that there are workarounds in the linux kernel to circumvent
the upcomming problems under havy load.
Is that true or just nonsense?
However it is worth to look at them. Thanks for the pointer! :-)
Thomas