Please check the patch.
On Fri, 3 Nov 2006 21:27:35 -0800
"Yinghai Lu" <[email protected]> wrote:
> For co-prcessor with mem installed, the ram will be treated to pref mem.
What is "pref mem"?
> Under 64bit kernel, when 64bit pref mem size is above 4G, sz from pci_size in low bits, will get 0,
> at this point, we need to check szhi too. Otherwise the pre-set value by firmware can not be read
> to resrource struct, it will skip that resource, and try to hi 32 bit as another 32bit resource.
>
> Cc: Myles Watson <[email protected]>
> Signed-off-by: Yinghai Lu <[email protected]>
>
>
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -165,8 +165,13 @@ static void pci_read_bases(struct pci_de
> l = 0;
> if ((l & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) {
> sz = pci_size(l, sz, (u32)PCI_BASE_ADDRESS_MEM_MASK);
> - if (!sz)
> - continue;
> + /* for 64bit pref, sz could be 0, if the real size is bigger than 4G,
> + so need to check szhi for it
> + */
> + if ((l & (PCI_BASE_ADDRESS_SPACE | PCI_BASE_ADDRESS_MEM_TYPE_MASK))
> + != (PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64))
> + if (!sz)
> + continue;
> res->start = l & PCI_BASE_ADDRESS_MEM_MASK;
> res->flags |= l & ~PCI_BASE_ADDRESS_MEM_MASK;
> } else {
> @@ -188,6 +193,12 @@ static void pci_read_bases(struct pci_de
> szhi = pci_size(lhi, szhi, 0xffffffff);
> next++;
> #if BITS_PER_LONG == 64
> + if( !sz && !szhi) {
> + res->start = 0;
> + res->end = 0;
> + res->flags = 0;
> + continue;
> + }
> res->start |= ((unsigned long) lhi) << 32;
> res->end = res->start + sz;
> if (szhi) {
I don't really understand what this patch does.
We have a PCI device with a 64-bit BAR and the size is also 64-bit and is
larger than 4G, yes?
But the code appears to already be attempting to handle such devices.
Confused.
-----Original Message-----
From: Andrew Morton [mailto:[email protected]]
>I don't really understand what this patch does.
>We have a PCI device with a 64-bit BAR and the size is also 64-bit and
is
>larger than 4G, yes?
Yes
>But the code appears to already be attempting to handle such devices.
>Confused.
The old code will
Try to calculate the sz from lo 32 bit addr reg, and sz is 0 if the 64
bit resource size if 4G above, so it will continue can skip that
register, and it will go on try to treat the hi 32bit addr reg as
another 32 bit resource addr reg.
YH
On Mon, 6 Nov 2006 14:15:23 -0800
"Lu, Yinghai" <[email protected]> wrote:
> -----Original Message-----
> From: Andrew Morton [mailto:[email protected]]
> >I don't really understand what this patch does.
> >We have a PCI device with a 64-bit BAR and the size is also 64-bit and
> is
> >larger than 4G, yes?
>
> Yes
>
> >But the code appears to already be attempting to handle such devices.
> >Confused.
>
> The old code will
> Try to calculate the sz from lo 32 bit addr reg, and sz is 0 if the 64
> bit resource size if 4G above, so it will continue can skip that
> register, and it will go on try to treat the hi 32bit addr reg as
> another 32 bit resource addr reg.
>
OK... I still don't know what a "pref" is though.
I reworked the path a bit, as below. Look OK?
From: "Yinghai Lu" <[email protected]>
If the PCI device is 64-bit memory and has a size of 0xnnnnnnnn00000000 then
pci_read_bases() will incorrectly assume that it has a size of zero.
Cc: Myles Watson <[email protected]>
Signed-off-by: Yinghai Lu <[email protected]>
Cc: Greg KH <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
---
drivers/pci/probe.c | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff -puN drivers/pci/probe.c~pci-check-szhi-when-sz-is-0-for-64-bit-pref-mem drivers/pci/probe.c
--- a/drivers/pci/probe.c~pci-check-szhi-when-sz-is-0-for-64-bit-pref-mem
+++ a/drivers/pci/probe.c
@@ -144,6 +144,14 @@ static u32 pci_size(u32 base, u32 maxbas
return size;
}
+static inline bool is_64_bit_memory(u32 v)
+{
+ if ((v & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK)) ==
+ (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64))
+ return true;
+ return false;
+}
+
static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
{
unsigned int pos, reg, next;
@@ -165,7 +173,11 @@ static void pci_read_bases(struct pci_de
l = 0;
if ((l & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) {
sz = pci_size(l, sz, (u32)PCI_BASE_ADDRESS_MEM_MASK);
- if (!sz)
+ /*
+ * For a 64bit BAR, sz could be 0 if the real size is
+ * bigger than 4G so we need to check szhi for that.
+ */
+ if (!is_64_bit_memory(l) && !sz)
continue;
res->start = l & PCI_BASE_ADDRESS_MEM_MASK;
res->flags |= l & ~PCI_BASE_ADDRESS_MEM_MASK;
@@ -178,8 +190,7 @@ static void pci_read_bases(struct pci_de
}
res->end = res->start + (unsigned long) sz;
res->flags |= pci_calc_resource_flags(l);
- if ((l & (PCI_BASE_ADDRESS_SPACE | PCI_BASE_ADDRESS_MEM_TYPE_MASK))
- == (PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64)) {
+ if (is_64_bit_memory(l)) {
u32 szhi, lhi;
pci_read_config_dword(dev, reg+4, &lhi);
pci_write_config_dword(dev, reg+4, ~0);
@@ -188,6 +199,12 @@ static void pci_read_bases(struct pci_de
szhi = pci_size(lhi, szhi, 0xffffffff);
next++;
#if BITS_PER_LONG == 64
+ if (!sz && !szhi) {
+ res->start = 0;
+ res->end = 0;
+ res->flags = 0;
+ continue;
+ }
res->start |= ((unsigned long) lhi) << 32;
res->end = res->start + sz;
if (szhi) {
_
please check version with pci_size64.
Andrew Morton <[email protected]> writes:
> On Fri, 3 Nov 2006 21:27:35 -0800
> "Yinghai Lu" <[email protected]> wrote:
>
>> For co-prcessor with mem installed, the ram will be treated to pref mem.
>
> What is "pref mem"?
Memory mapped base address registers can be either normal or for prefetchable
sections of memory mapped I/O. Frequently all prefetchable bars are 64bit.
The prefetchable bars are also frequently ask for the largest amounts of
memory. So it is easy and worthwhile to place all prefetchable bars about 4G.
The "pref mem" short hand comes from a the LinuxBIOS print statements that
report every bar value and what kind of bar it is, during boot up.
Eric
On Wed, 08 Nov 2006 11:19:40 -0700
[email protected] (Eric W. Biederman) wrote:
> Andrew Morton <[email protected]> writes:
>
> > On Fri, 3 Nov 2006 21:27:35 -0800
> > "Yinghai Lu" <[email protected]> wrote:
> >
> >> For co-prcessor with mem installed, the ram will be treated to pref mem.
> >
> > What is "pref mem"?
>
> Memory mapped base address registers can be either normal or for prefetchable
> sections of memory mapped I/O. Frequently all prefetchable bars are 64bit.
> The prefetchable bars are also frequently ask for the largest amounts of
> memory. So it is easy and worthwhile to place all prefetchable bars about 4G.
>
> The "pref mem" short hand comes from a the LinuxBIOS print statements that
> report every bar value and what kind of bar it is, during boot up.
>
Ah. Prefetchable. Thanks.
I've basically given up in exhaustion on that patch. Maybe when I have a
burst of extra energy I'll go back and take the time to understand it,
or maybe when Greg comes back he'll save me.
-----Original Message-----
From: Andrew Morton [mailto:[email protected]]
>I've basically given up in exhaustion on that patch. Maybe when I have
a
>burst of extra energy I'll go back and take the time to understand it,
>or maybe when Greg comes back he'll save me.
Please
http://lkml.org/lkml/2006/11/6/341
that would be more clean.
Thanks
Yinghai Lu
On Wed, Nov 08, 2006 at 11:15:59AM -0800, Lu, Yinghai wrote:
> -----Original Message-----
> From: Andrew Morton [mailto:[email protected]]
>
> >I've basically given up in exhaustion on that patch. Maybe when I have
> a
> >burst of extra energy I'll go back and take the time to understand it,
> >or maybe when Greg comes back he'll save me.
>
> Please
> http://lkml.org/lkml/2006/11/6/341
>
> that would be more clean.
Can you just forward the proper version of this patch to me, as it seems
there are lots of different versions of this change floating around?
thanks,
greg k-h