LinuxLists.cc - [PATCH 0/3] dts: Add the property of IB and OB

2017-11-03 09:50:45

Subject: [PATCH 0/3] dts: Add the property of IB and OB

Depend on http://patchwork.ozlabs.org/patch/815382/

Bao Xiaowei (3):
ARMv8: dts: ls1046a: add the property of IB and OB
ARMv8: layerscape: add the pcie ep function support
ARMv8: pcie: make the DWC EP driver support for layerscape

arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ++
drivers/pci/dwc/Kconfig | 1 +
drivers/pci/dwc/pci-layerscape.c | 122 +++++++++++++++++++++++--
3 files changed, 123 insertions(+), 6 deletions(-)

--
2.14.1

From 1583527022733895426@xxx Wed Nov 08 19:24:10 +0000 2017
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2017-11-03 09:51:01

by Bao Xiaowei

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Subject: [PATCH 1/3] ARMv8: dts: ls1046a: add the property of IB and OB

Add the property of inbind and outbind windows number for ep
driver.

add the inband or outband window entry for pcie controller
ep driver used in dts.

Signed-off-by: Bao Xiaowei <[email protected]>
Acked-by: Minghuan Lian <[email protected]>
---
v2:
- no change

arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 06b5e12d04d8..f8332669663c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -674,6 +674,8 @@
device_type = "pci";
dma-coherent;
num-lanes = <4>;
+ num-ib-windows = <6>;
+ num-ob-windows = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
@@ -699,6 +701,8 @@
device_type = "pci";
dma-coherent;
num-lanes = <2>;
+ num-ib-windows = <6>;
+ num-ob-windows = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
@@ -724,6 +728,8 @@
device_type = "pci";
dma-coherent;
num-lanes = <2>;
+ num-ib-windows = <6>;
+ num-ob-windows = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
--
2.14.1

From 1583029109566713016@xxx Fri Nov 03 07:30:03 +0000 2017
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2017-11-03 09:52:16

by Bao Xiaowei

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Subject: [PATCH 3/3] ARMv8: pcie: make the DWC EP driver support for layerscape

Layerscape pcie controllers support RC or EP mode, Add the EP mode
support in Kconfig, the driver will support both RC and EP mode, and
the driver is able to judge the pcie controllers work on RC or EP mode.

Signed-off-by: Bao Xiaowei <[email protected]>
Acked-by: Minghuan Lian <[email protected]>
---
v2:
- no change

drivers/pci/dwc/Kconfig | 1 +
1 file changed, 1 insertion(+)

diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig
index 22ec82fcdea2..b5f507795779 100644
--- a/drivers/pci/dwc/Kconfig
+++ b/drivers/pci/dwc/Kconfig
@@ -108,6 +108,7 @@ config PCI_LAYERSCAPE
depends on PCI_MSI_IRQ_DOMAIN
select MFD_SYSCON
select PCIE_DW_HOST
+ select PCIE_DW_EP
help
Say Y here if you want PCIe controller support on Layerscape SoCs.

--
2.14.1

From 1582945449739795531@xxx Thu Nov 02 09:20:19 +0000 2017
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2017-11-02 09:32:31

by M.h. Lian

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Subject: RE: [PATCH 3/3] ARMv8: pcie: make the DWC EP driver support for layerscape

2017-11-02 08:56:05

by M.h. Lian

[permalink] [raw]

Subject: RE: [PATCH 1/3] ARMv8: dts: ls1046a: add the property of IB and OB

Acked-by: Minghuan Lian <[email protected]>

> -----Original Message-----
> From: Bao Xiaowei [mailto:[email protected]]
> Sent: Tuesday, October 24, 2017 4:31 PM
> To: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> Madalin-cristian Bucur <[email protected]>; Sumit Garg
> <[email protected]>; Y.b. Lu <[email protected]>; [email protected];
> Andy Tang <[email protected]>; Leo Li <[email protected]>;
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; linux-arm-
> [email protected]; [email protected]; linux-
> [email protected]; [email protected]; Z.q. Hou
> <[email protected]>; Mingkai Hu <[email protected]>; M.h. Lian
> <[email protected]>
> Cc: Xiaowei Bao <[email protected]>
> Subject: [PATCH 1/3] ARMv8: dts: ls1046a: add the property of IB and OB
>
> Add the property of inbind and outbind windows number for ep driver.
>
> add the inband or outband window entry for pcie controller ep driver used in dts.
>
> Signed-off-by: Bao Xiaowei <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index 06b5e12d04d8..f8332669663c 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -674,6 +674,8 @@
> device_type = "pci";
> dma-coherent;
> num-lanes = <4>;
> + num-ib-windows = <6>;
> + num-ob-windows = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x40
> 0x00010000 0x0 0x00010000 /* downstream I/O */
> 0x82000000 0x0 0x40000000 0x40
> 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -699,6
> +701,8 @@
> device_type = "pci";
> dma-coherent;
> num-lanes = <2>;
> + num-ib-windows = <6>;
> + num-ob-windows = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x48
> 0x00010000 0x0 0x00010000 /* downstream I/O */
> 0x82000000 0x0 0x40000000 0x48
> 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -724,6
> +728,8 @@
> device_type = "pci";
> dma-coherent;
> num-lanes = <2>;
> + num-ib-windows = <6>;
> + num-ob-windows = <6>;
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x50
> 0x00010000 0x0 0x00010000 /* downstream I/O */
> 0x82000000 0x0 0x40000000 0x50
> 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
> --
> 2.14.1

From 1582128269672224519@xxx Tue Oct 24 08:51:36 +0000 2017
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