2017-11-14 18:06:21

by Stephen Boyd

[permalink] [raw]
Subject: Re: [PATCH] clk: uniphier: fix DAPLL2 clock rate of Pro5

On 10/05, Masahiro Yamada wrote:
> The parent of DAPLL2 should be DAPLL1. Fix the clock connection.
>
> Signed-off-by: Masahiro Yamada <[email protected]>
> ---

Applied to clk-next

--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

From 1583504436685627005@xxx Wed Nov 08 13:25:11 +0000 2017
X-GM-THRID: 1580383275891500471
X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread