2018-01-11 13:23:38

by Christian König

[permalink] [raw]
Subject: [PATCH 1/2] x86/PCI: add kernel option and taint it when we add a 64bit window v2

Only try to enable a 64bit window on AMD CPUs when pci=big_root_window is
specified and taint the kernel when we add the window.

v2: add documentation for the new option.

Signed-off-by: Christian König <[email protected]>
---
Documentation/admin-guide/kernel-parameters.txt | 4 ++++
arch/x86/include/asm/pci_x86.h | 1 +
arch/x86/pci/common.c | 5 +++++
arch/x86/pci/fixup.c | 4 ++++
4 files changed, 14 insertions(+)

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 6571fbfdb2a1..0cf9e3785840 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -3094,6 +3094,10 @@
pcie_scan_all Scan all possible PCIe devices. Otherwise we
only look for one device below a PCIe downstream
port.
+ big_root_window Try to add a big 64bit memory window to the PCIe
+ root complex on AMD CPUs. This is useful for GFX
+ hardware which can resize their PCIe BAR to
+ allow full CPU access to VRAM.

pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power
Management.
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index 7a5d6695abd3..eb66fa9cd0fc 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -38,6 +38,7 @@ do { \
#define PCI_NOASSIGN_ROMS 0x80000
#define PCI_ROOT_NO_CRS 0x100000
#define PCI_NOASSIGN_BARS 0x200000
+#define PCI_BIG_ROOT_WINDOW 0x400000

extern unsigned int pci_probe;
extern unsigned long pirq_table_addr;
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 7a5350d08cef..563049c483a1 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -594,6 +594,11 @@ char *__init pcibios_setup(char *str)
} else if (!strcmp(str, "nocrs")) {
pci_probe |= PCI_ROOT_NO_CRS;
return NULL;
+#ifdef CONFIG_PHYS_ADDR_T_64BIT
+ } else if (!strcmp(str, "big_root_window")) {
+ pci_probe |= PCI_BIG_ROOT_WINDOW;
+ return NULL;
+#endif
} else if (!strcmp(str, "earlydump")) {
pci_early_dump_regs = 1;
return NULL;
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index e663d6bf1328..a91280da2ea1 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -667,6 +667,9 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
struct resource *res, *conflict;
struct pci_dev *other;

+ if (!(pci_probe & PCI_BIG_ROOT_WINDOW))
+ return;
+
/* Check that we are the only device of that type */
other = pci_get_device(dev->vendor, dev->device, NULL);
if (other != dev ||
@@ -715,6 +718,7 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
}

dev_info(&dev->dev, "adding root bus resource %pR\n", res);
+ add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);

base = ((res->start >> 8) & AMD_141b_MMIO_BASE_MMIOBASE_MASK) |
AMD_141b_MMIO_BASE_RE_MASK | AMD_141b_MMIO_BASE_WE_MASK;
--
2.11.0


2018-01-11 13:23:40

by Christian König

[permalink] [raw]
Subject: [PATCH 2/2] x86/PCI: limit the size of the 64bit window to 256GB v3

Avoid problems with BIOS implementations which don't report all used
resources to the OS by only allocating a 256GB window directly below the
hardware limit.

For the full hardware documentation see:
https://support.amd.com/TechDocs/49125_15h_Models_30h-3Fh_BKDG.pdf

Fixes a silent reboot loop reported by Aaro Koskinen <[email protected]> on
an AMD-based MSI MS-7699/760GA-P43(FX) system.

v2: cleanup code a bit more, update comment and explain the hw limit
v3: improve commit message

Link: https://lkml.kernel.org/r/[email protected]
Reported-by: Aaro Koskinen <[email protected]>
Signed-off-by: Christian König <[email protected]>
---
arch/x86/pci/fixup.c | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index a91280da2ea1..9c1c98d7e3a7 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -662,10 +662,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2033, quirk_no_aersid);
*/
static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
{
- unsigned i;
u32 base, limit, high;
- struct resource *res, *conflict;
struct pci_dev *other;
+ struct resource *res;
+ unsigned i;
+ int r;

if (!(pci_probe & PCI_BIG_ROOT_WINDOW))
return;
@@ -702,19 +703,17 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
if (!res)
return;

+ /* Allocate a 256GB window directly below the 0xfd00000000 hw limit */
res->name = "PCI Bus 0000:00";
res->flags = IORESOURCE_PREFETCH | IORESOURCE_MEM |
IORESOURCE_MEM_64 | IORESOURCE_WINDOW;
- res->start = 0x100000000ull;
+ res->start = 0xbd00000000ull;
res->end = 0xfd00000000ull - 1;

- /* Just grab the free area behind system memory for this */
- while ((conflict = request_resource_conflict(&iomem_resource, res))) {
- if (conflict->end >= res->end) {
- kfree(res);
- return;
- }
- res->start = conflict->end + 1;
+ r = request_resource(&iomem_resource, res);
+ if (r) {
+ kfree(res);
+ return;
}

dev_info(&dev->dev, "adding root bus resource %pR\n", res);
--
2.11.0

2018-01-11 14:21:47

by Bjorn Helgaas

[permalink] [raw]
Subject: Re: [PATCH 2/2] x86/PCI: limit the size of the 64bit window to 256GB v3

On Thu, Jan 11, 2018 at 02:23:30PM +0100, Christian K?nig wrote:
> Avoid problems with BIOS implementations which don't report all used
> resources to the OS by only allocating a 256GB window directly below the
> hardware limit.
>
> For the full hardware documentation see:
> https://support.amd.com/TechDocs/49125_15h_Models_30h-3Fh_BKDG.pdf

If you can supply a section number, I'll add it here. That spec is 700
pages, so a hint would be useful.

> Fixes a silent reboot loop reported by Aaro Koskinen <[email protected]> on
> an AMD-based MSI MS-7699/760GA-P43(FX) system.
>
> v2: cleanup code a bit more, update comment and explain the hw limit
> v3: improve commit message
>
> Link: https://lkml.kernel.org/r/[email protected]
> Reported-by: Aaro Koskinen <[email protected]>
> Signed-off-by: Christian K?nig <[email protected]>
> ---
> arch/x86/pci/fixup.c | 19 +++++++++----------
> 1 file changed, 9 insertions(+), 10 deletions(-)
>
> diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
> index a91280da2ea1..9c1c98d7e3a7 100644
> --- a/arch/x86/pci/fixup.c
> +++ b/arch/x86/pci/fixup.c
> @@ -662,10 +662,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2033, quirk_no_aersid);
> */
> static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
> {
> - unsigned i;
> u32 base, limit, high;
> - struct resource *res, *conflict;
> struct pci_dev *other;
> + struct resource *res;
> + unsigned i;
> + int r;
>
> if (!(pci_probe & PCI_BIG_ROOT_WINDOW))
> return;
> @@ -702,19 +703,17 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
> if (!res)
> return;
>
> + /* Allocate a 256GB window directly below the 0xfd00000000 hw limit */
> res->name = "PCI Bus 0000:00";
> res->flags = IORESOURCE_PREFETCH | IORESOURCE_MEM |
> IORESOURCE_MEM_64 | IORESOURCE_WINDOW;
> - res->start = 0x100000000ull;
> + res->start = 0xbd00000000ull;
> res->end = 0xfd00000000ull - 1;
>
> - /* Just grab the free area behind system memory for this */
> - while ((conflict = request_resource_conflict(&iomem_resource, res))) {
> - if (conflict->end >= res->end) {
> - kfree(res);
> - return;
> - }
> - res->start = conflict->end + 1;
> + r = request_resource(&iomem_resource, res);
> + if (r) {
> + kfree(res);
> + return;
> }
>
> dev_info(&dev->dev, "adding root bus resource %pR\n", res);
> --
> 2.11.0
>

2018-01-11 14:51:50

by Christian König

[permalink] [raw]
Subject: Re: [PATCH 2/2] x86/PCI: limit the size of the 64bit window to 256GB v3

Am 11.01.2018 um 15:21 schrieb Bjorn Helgaas:
> On Thu, Jan 11, 2018 at 02:23:30PM +0100, Christian König wrote:
>> Avoid problems with BIOS implementations which don't report all used
>> resources to the OS by only allocating a 256GB window directly below the
>> hardware limit.
>>
>> For the full hardware documentation see:
>> https://support.amd.com/TechDocs/49125_15h_Models_30h-3Fh_BKDG.pdf
> If you can supply a section number, I'll add it here. That spec is 700
> pages, so a hint would be useful.

Sorry, had to search for that as well. That is noted in section "2.4.6
System Address Map".

Do you want to add that or should I resend the patch?

Regards,
Christian.

>
>> Fixes a silent reboot loop reported by Aaro Koskinen <[email protected]> on
>> an AMD-based MSI MS-7699/760GA-P43(FX) system.
>>
>> v2: cleanup code a bit more, update comment and explain the hw limit
>> v3: improve commit message
>>
>> Link: https://lkml.kernel.org/r/[email protected]
>> Reported-by: Aaro Koskinen <[email protected]>
>> Signed-off-by: Christian König <[email protected]>
>> ---
>> arch/x86/pci/fixup.c | 19 +++++++++----------
>> 1 file changed, 9 insertions(+), 10 deletions(-)
>>
>> diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
>> index a91280da2ea1..9c1c98d7e3a7 100644
>> --- a/arch/x86/pci/fixup.c
>> +++ b/arch/x86/pci/fixup.c
>> @@ -662,10 +662,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2033, quirk_no_aersid);
>> */
>> static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
>> {
>> - unsigned i;
>> u32 base, limit, high;
>> - struct resource *res, *conflict;
>> struct pci_dev *other;
>> + struct resource *res;
>> + unsigned i;
>> + int r;
>>
>> if (!(pci_probe & PCI_BIG_ROOT_WINDOW))
>> return;
>> @@ -702,19 +703,17 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
>> if (!res)
>> return;
>>
>> + /* Allocate a 256GB window directly below the 0xfd00000000 hw limit */
>> res->name = "PCI Bus 0000:00";
>> res->flags = IORESOURCE_PREFETCH | IORESOURCE_MEM |
>> IORESOURCE_MEM_64 | IORESOURCE_WINDOW;
>> - res->start = 0x100000000ull;
>> + res->start = 0xbd00000000ull;
>> res->end = 0xfd00000000ull - 1;
>>
>> - /* Just grab the free area behind system memory for this */
>> - while ((conflict = request_resource_conflict(&iomem_resource, res))) {
>> - if (conflict->end >= res->end) {
>> - kfree(res);
>> - return;
>> - }
>> - res->start = conflict->end + 1;
>> + r = request_resource(&iomem_resource, res);
>> + if (r) {
>> + kfree(res);
>> + return;
>> }
>>
>> dev_info(&dev->dev, "adding root bus resource %pR\n", res);
>> --
>> 2.11.0
>>

2018-01-11 18:06:59

by Bjorn Helgaas

[permalink] [raw]
Subject: Re: [PATCH 2/2] x86/PCI: limit the size of the 64bit window to 256GB v3

On Thu, Jan 11, 2018 at 03:51:45PM +0100, Christian K?nig wrote:
> Am 11.01.2018 um 15:21 schrieb Bjorn Helgaas:
> >On Thu, Jan 11, 2018 at 02:23:30PM +0100, Christian K?nig wrote:
> >>Avoid problems with BIOS implementations which don't report all used
> >>resources to the OS by only allocating a 256GB window directly below the
> >>hardware limit.
> >>
> >>For the full hardware documentation see:
> >>https://support.amd.com/TechDocs/49125_15h_Models_30h-3Fh_BKDG.pdf
> >If you can supply a section number, I'll add it here. That spec is 700
> >pages, so a hint would be useful.
>
> Sorry, had to search for that as well. That is noted in section
> "2.4.6 System Address Map".
>
> Do you want to add that or should I resend the patch?

I added it and put both patches on my for-linus branch for v4.15, thanks!

> >>Fixes a silent reboot loop reported by Aaro Koskinen <[email protected]> on
> >>an AMD-based MSI MS-7699/760GA-P43(FX) system.
> >>
> >>v2: cleanup code a bit more, update comment and explain the hw limit
> >>v3: improve commit message
> >>
> >>Link: https://lkml.kernel.org/r/[email protected]
> >>Reported-by: Aaro Koskinen <[email protected]>
> >>Signed-off-by: Christian K?nig <[email protected]>
> >>---
> >> arch/x86/pci/fixup.c | 19 +++++++++----------
> >> 1 file changed, 9 insertions(+), 10 deletions(-)
> >>
> >>diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
> >>index a91280da2ea1..9c1c98d7e3a7 100644
> >>--- a/arch/x86/pci/fixup.c
> >>+++ b/arch/x86/pci/fixup.c
> >>@@ -662,10 +662,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2033, quirk_no_aersid);
> >> */
> >> static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
> >> {
> >>- unsigned i;
> >> u32 base, limit, high;
> >>- struct resource *res, *conflict;
> >> struct pci_dev *other;
> >>+ struct resource *res;
> >>+ unsigned i;
> >>+ int r;
> >> if (!(pci_probe & PCI_BIG_ROOT_WINDOW))
> >> return;
> >>@@ -702,19 +703,17 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
> >> if (!res)
> >> return;
> >>+ /* Allocate a 256GB window directly below the 0xfd00000000 hw limit */
> >> res->name = "PCI Bus 0000:00";
> >> res->flags = IORESOURCE_PREFETCH | IORESOURCE_MEM |
> >> IORESOURCE_MEM_64 | IORESOURCE_WINDOW;
> >>- res->start = 0x100000000ull;
> >>+ res->start = 0xbd00000000ull;
> >> res->end = 0xfd00000000ull - 1;
> >>- /* Just grab the free area behind system memory for this */
> >>- while ((conflict = request_resource_conflict(&iomem_resource, res))) {
> >>- if (conflict->end >= res->end) {
> >>- kfree(res);
> >>- return;
> >>- }
> >>- res->start = conflict->end + 1;
> >>+ r = request_resource(&iomem_resource, res);
> >>+ if (r) {
> >>+ kfree(res);
> >>+ return;
> >> }
> >> dev_info(&dev->dev, "adding root bus resource %pR\n", res);
> >>--
> >>2.11.0
> >>
>