Add lx2160a compatible to bindings documentation.
Signed-off-by: Peng Ma <[email protected]>
---
changed for V6:
- no changed
.../devicetree/bindings/ata/ahci-fsl-qoriq.txt | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
index 7c3ca0e..9ecc019 100644
--- a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
@@ -3,7 +3,7 @@ Binding for Freescale QorIQ AHCI SATA Controller
Required properties:
- reg: Physical base address and size of the controller's register area.
- compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where
- chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc.
+ chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a, lx2160a, etc.
- clocks: Input clock specifier. Refer to common clock bindings.
- interrupts: Interrupt specifier. Refer to interrupt binding.
--
1.7.1
Add SATA device nodes for fsl-lx2160a and enable support
for QDS and RDB boards.
Signed-off-by: Peng Ma <[email protected]>
---
changed for V6:
- no change
arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 16 +++++++
arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 16 +++++++
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 44 +++++++++++++++++++++
3 files changed, 76 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
index 99a22ab..1a5acf6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
@@ -95,6 +95,22 @@
};
};
+&sata0 {
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
+&sata3 {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 6481e5f..5b6799e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -102,6 +102,22 @@
};
};
+&sata0 {
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
+&sata3 {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index a79f5c1..592034b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -671,6 +671,50 @@
status = "disabled";
};
+ sata0: sata@3200000 {
+ compatible = "fsl,lx2160a-ahci";
+ reg = <0x0 0x3200000 0x0 0x10000>,
+ <0x7 0x100520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
+ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 3>;
+ dma-coherent;
+ status = "disabled";
+ };
+
+ sata1: sata@3210000 {
+ compatible = "fsl,lx2160a-ahci";
+ reg = <0x0 0x3210000 0x0 0x10000>,
+ <0x7 0x100520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 3>;
+ dma-coherent;
+ status = "disabled";
+ };
+
+ sata2: sata@3220000 {
+ compatible = "fsl,lx2160a-ahci";
+ reg = <0x0 0x3220000 0x0 0x10000>,
+ <0x7 0x100520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 3>;
+ dma-coherent;
+ status = "disabled";
+ };
+
+ sata3: sata@3230000 {
+ compatible = "fsl,lx2160a-ahci";
+ reg = <0x0 0x3230000 0x0 0x10000>,
+ <0x7 0x100520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 3>;
+ dma-coherent;
+ status = "disabled";
+ };
+
smmu: iommu@5000000 {
compatible = "arm,mmu-500";
reg = <0 0x5000000 0 0x800000>;
--
1.7.1
Lx2160a is a new introduced soc which supports ATA3.0
Signed-off-by: Peng Ma <[email protected]>
---
changed for V6:
- Add ecc_initialized to ensure set sata bit once of
ECC error register
- Recovery AHCI_LS2088A platform
drivers/ata/ahci_qoriq.c | 52 +++++++++++++++++++++++++++++++---------------
1 files changed, 35 insertions(+), 17 deletions(-)
diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c
index ce59253..08dbb86 100644
--- a/drivers/ata/ahci_qoriq.c
+++ b/drivers/ata/ahci_qoriq.c
@@ -58,6 +58,7 @@ enum ahci_qoriq_type {
AHCI_LS1046A,
AHCI_LS1088A,
AHCI_LS2088A,
+ AHCI_LX2160A,
};
struct ahci_qoriq_priv {
@@ -67,6 +68,8 @@ struct ahci_qoriq_priv {
bool is_dmacoherent;
};
+static bool ecc_initialized;
+
static const struct of_device_id ahci_qoriq_of_match[] = {
{ .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A},
{ .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A},
@@ -74,6 +77,7 @@ struct ahci_qoriq_priv {
{ .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A},
{ .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A},
{ .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A},
+ { .compatible = "fsl,lx2160a-ahci", .data = (void *)AHCI_LX2160A},
{},
};
MODULE_DEVICE_TABLE(of, ahci_qoriq_of_match);
@@ -165,9 +169,10 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
switch (qpriv->type) {
case AHCI_LS1021A:
- if (!qpriv->ecc_addr)
+ if (!(qpriv->ecc_addr || ecc_initialized))
return -EINVAL;
- writel(SATA_ECC_DISABLE, qpriv->ecc_addr);
+ else if (qpriv->ecc_addr && !ecc_initialized)
+ writel(SATA_ECC_DISABLE, qpriv->ecc_addr);
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2);
writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3);
@@ -180,10 +185,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
break;
case AHCI_LS1043A:
- if (!qpriv->ecc_addr)
+ if (!(qpriv->ecc_addr || ecc_initialized))
return -EINVAL;
- writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
- qpriv->ecc_addr);
+ else if (qpriv->ecc_addr && !ecc_initialized)
+ writel(readl(qpriv->ecc_addr) |
+ ECC_DIS_ARMV8_CH2,
+ qpriv->ecc_addr);
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
@@ -202,10 +209,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
break;
case AHCI_LS1046A:
- if (!qpriv->ecc_addr)
+ if (!(qpriv->ecc_addr || ecc_initialized))
return -EINVAL;
- writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
- qpriv->ecc_addr);
+ else if (qpriv->ecc_addr && !ecc_initialized)
+ writel(readl(qpriv->ecc_addr) |
+ ECC_DIS_ARMV8_CH2,
+ qpriv->ecc_addr);
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
@@ -215,10 +224,13 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
break;
case AHCI_LS1088A:
- if (!qpriv->ecc_addr)
+ case AHCI_LX2160A:
+ if (!(qpriv->ecc_addr || ecc_initialized))
return -EINVAL;
- writel(readl(qpriv->ecc_addr) | ECC_DIS_LS1088A,
- qpriv->ecc_addr);
+ else if (qpriv->ecc_addr && !ecc_initialized)
+ writel(readl(qpriv->ecc_addr) |
+ ECC_DIS_LS1088A,
+ qpriv->ecc_addr);
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);
writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);
@@ -237,6 +249,7 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
break;
}
+ ecc_initialized = true;
return 0;
}
@@ -264,13 +277,18 @@ static int ahci_qoriq_probe(struct platform_device *pdev)
qoriq_priv->type = (enum ahci_qoriq_type)of_id->data;
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
- "sata-ecc");
- if (res) {
- qoriq_priv->ecc_addr = devm_ioremap_resource(dev, res);
- if (IS_ERR(qoriq_priv->ecc_addr))
- return PTR_ERR(qoriq_priv->ecc_addr);
+ if (unlikely(!ecc_initialized)) {
+ res = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM,
+ "sata-ecc");
+ if (res) {
+ qoriq_priv->ecc_addr =
+ devm_ioremap_resource(dev, res);
+ if (IS_ERR(qoriq_priv->ecc_addr))
+ return PTR_ERR(qoriq_priv->ecc_addr);
+ }
}
+
qoriq_priv->is_dmacoherent = of_dma_is_coherent(np);
rc = ahci_platform_enable_resources(hpriv);
--
1.7.1
On Wed, 20 Feb 2019 08:56:05 +0000, Peng Ma wrote:
> Add lx2160a compatible to bindings documentation.
>
> Signed-off-by: Peng Ma <[email protected]>
> ---
> changed for V6:
> - no changed
>
> .../devicetree/bindings/ata/ahci-fsl-qoriq.txt | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.
If a tag was not added on purpose, please state why and what changed.
Hi Rob,
Thanks for your comments, I don't understand what you said.
This patch is one of the series patchs(http://patchwork.ozlabs.org/project/linux-ide/list/?series=93099&archive=both&state=*) for review.
There is not changed for 6th version of this patch.
Best Regards,
Peng
>-----Original Message-----
>From: Rob Herring <[email protected]>
>Sent: 2019??2??22?? 22:40
>To: Peng Ma <[email protected]>
>Cc: [email protected]; [email protected]; [email protected];
>[email protected]; Leo Li <[email protected]>; Andy Tang
><[email protected]>; [email protected]; [email protected];
>[email protected]; [email protected]; Mian
>Yousaf Kaukab <[email protected]>; Peng Ma <[email protected]>
>Subject: Re: [v6 1/3] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the
>list
>
>On Wed, 20 Feb 2019 08:56:05 +0000, Peng Ma wrote:
>> Add lx2160a compatible to bindings documentation.
>>
>> Signed-off-by: Peng Ma <[email protected]>
>> ---
>> changed for V6:
>> - no changed
>>
>> .../devicetree/bindings/ata/ahci-fsl-qoriq.txt | 2 +-
>> 1 files changed, 1 insertions(+), 1 deletions(-)
>>
>
>Please add Acked-by/Reviewed-by tags when posting new versions. However,
>there's no need to repost patches *only* to add the tags. The upstream
>maintainer will do that for acks received on the version they apply.
>
>If a tag was not added on purpose, please state why and what changed.
On Mon, Mar 11, 2019 at 1:57 AM Peng Ma <[email protected]> wrote:
>
> Hi Rob,
Please don't top post to mail lists.
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?
>
> Thanks for your comments, I don't understand what you said.
> This patch is one of the series patchs(http://patchwork.ozlabs.org/project/linux-ide/list/?series=93099&archive=both&state=*) for review.
> There is not changed for 6th version of this patch.
I reviewed v5 and gave my Reviewed-by. When you posted v6, you should
have added the tag so the maintainer applying this series doesn't have
to look at prior versions to collect tags and so I don't have to
review this again and can ignore it.
Rob