Add drivers to support scaling of the on-chip interconnects on QCS404-based
platforms. Also add the necessary device-tree nodes, so that the driver for
each NoC can probe and register as interconnect-provider.
v4:
- Move DT headers into the dt-bindings patch (Bjorn)
- Pick Bjorn's r-b on some patches.
- Return error if platform_device_register_data() fails (Bjorn)
- Use platform_set_drvdata() only in the child device. (Bjorn)
- Hide the smd-rpm proxy driver from config menu. (Bjorn)
- Add remove() function to zero out the rpm handle. (Bjorn)
- Move move the qcs404 driver patch later in the serie. (Bjorn)
- Insert the DT nodes after rng to keep the list sorted by address. (Bjorn)
v3: https://lore.kernel.org/lkml/[email protected]/
- Drop the patch introducing the qcom,qos DT property.
- Add two new patches to create an interconnect proxy device. This device is
part of the RPM hardware and handles the communication of the bus bandwidth
requests.
- Add a DT reg property and move the interconnect nodes under the "soc" node.
v2: https://lore.kernel.org/lkml/[email protected]/
- Use the clk_bulk API. (Bjorn)
- Move the port IDs into the provider file. (Bjorn)
- Use ARRAY_SIZE in the macro to automagically count the num_links. (Bjorn)
- Improve code readability. (Bjorn)
- Add patch [4/4] introducing a qcom,qos DT property to represent the link to
the MMIO QoS registers HW block.
v1: https://lore.kernel.org/lkml/[email protected]/
Bjorn Andersson (1):
interconnect: qcom: Add QCS404 interconnect provider driver
Georgi Djakov (4):
dt-bindings: interconnect: Add Qualcomm QCS404 DT bindings
soc: qcom: smd-rpm: Create RPM interconnect proxy child device
interconnect: qcom: Add interconnect SMD over SMD driver
arm64: dts: qcs404: Add interconnect provider DT nodes
.../bindings/interconnect/qcom,qcs404.txt | 46 ++
arch/arm64/boot/dts/qcom/qcs404.dtsi | 28 +
drivers/interconnect/qcom/Kconfig | 12 +
drivers/interconnect/qcom/Makefile | 4 +
drivers/interconnect/qcom/qcs404.c | 539 ++++++++++++++++++
drivers/interconnect/qcom/smd-rpm.c | 80 +++
drivers/interconnect/qcom/smd-rpm.h | 15 +
drivers/soc/qcom/smd-rpm.c | 17 +-
.../dt-bindings/interconnect/qcom,qcs404.h | 88 +++
9 files changed, 828 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
create mode 100644 drivers/interconnect/qcom/qcs404.c
create mode 100644 drivers/interconnect/qcom/smd-rpm.c
create mode 100644 drivers/interconnect/qcom/smd-rpm.h
create mode 100644 include/dt-bindings/interconnect/qcom,qcs404.h
Register a platform device to handle the communication of bus bandwidth
requests with the remote processor. The interconnect proxy device is part
of this remote processor (RPM) hardware. Let's create a icc-smd-rpm proxy
child device to represent the bus throughput functionality that is provided
by the RPM.
Signed-off-by: Georgi Djakov <[email protected]>
---
v4:
- Return error if platform_device_register_data() fails
- Remove platform_set_drvdata() on the child device.
v3:
- New patch.
drivers/soc/qcom/smd-rpm.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
index fa9dd12b5e39..34cdd638a6c1 100644
--- a/drivers/soc/qcom/smd-rpm.c
+++ b/drivers/soc/qcom/smd-rpm.c
@@ -19,12 +19,14 @@
/**
* struct qcom_smd_rpm - state of the rpm device driver
* @rpm_channel: reference to the smd channel
+ * @icc: interconnect proxy device
* @ack: completion for acks
* @lock: mutual exclusion around the send/complete pair
* @ack_status: result of the rpm request
*/
struct qcom_smd_rpm {
struct rpmsg_endpoint *rpm_channel;
+ struct platform_device *icc;
struct device *dev;
struct completion ack;
@@ -193,6 +195,7 @@ static int qcom_smd_rpm_callback(struct rpmsg_device *rpdev,
static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev)
{
struct qcom_smd_rpm *rpm;
+ int ret;
rpm = devm_kzalloc(&rpdev->dev, sizeof(*rpm), GFP_KERNEL);
if (!rpm)
@@ -205,11 +208,23 @@ static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev)
rpm->rpm_channel = rpdev->ept;
dev_set_drvdata(&rpdev->dev, rpm);
- return of_platform_populate(rpdev->dev.of_node, NULL, NULL, &rpdev->dev);
+ rpm->icc = platform_device_register_data(&rpdev->dev, "icc_smd_rpm", -1,
+ NULL, 0);
+ if (IS_ERR(rpm->icc))
+ return PTR_ERR(rpm->icc);
+
+ ret = of_platform_populate(rpdev->dev.of_node, NULL, NULL, &rpdev->dev);
+ if (ret)
+ platform_device_unregister(rpm->icc);
+
+ return ret;
}
static void qcom_smd_rpm_remove(struct rpmsg_device *rpdev)
{
+ struct qcom_smd_rpm *rpm = dev_get_drvdata(&rpdev->dev);
+
+ platform_device_unregister(rpm->icc);
of_platform_depopulate(&rpdev->dev);
}
On some Qualcomm SoCs, there is a remote processor, which controls some of
the Network-On-Chip interconnect resources. Other CPUs express their needs
by communicating with this processor. Add a driver to handle communication
with this remote processor.
Signed-off-by: Georgi Djakov <[email protected]>
---
v4:
- Hide the driver from config menu. It will be selected by other driver.
- Add remove() function to zero out the rpm handle.
v3:
- New patch.
drivers/interconnect/qcom/Kconfig | 3 ++
drivers/interconnect/qcom/Makefile | 2 +
drivers/interconnect/qcom/smd-rpm.c | 80 +++++++++++++++++++++++++++++
drivers/interconnect/qcom/smd-rpm.h | 15 ++++++
4 files changed, 100 insertions(+)
create mode 100644 drivers/interconnect/qcom/smd-rpm.c
create mode 100644 drivers/interconnect/qcom/smd-rpm.h
diff --git a/drivers/interconnect/qcom/Kconfig b/drivers/interconnect/qcom/Kconfig
index d5e70ebc2410..03fd67173494 100644
--- a/drivers/interconnect/qcom/Kconfig
+++ b/drivers/interconnect/qcom/Kconfig
@@ -12,3 +12,6 @@ config INTERCONNECT_QCOM_SDM845
help
This is a driver for the Qualcomm Network-on-Chip on sdm845-based
platforms.
+
+config INTERCONNECT_QCOM_SMD_RPM
+ tristate
diff --git a/drivers/interconnect/qcom/Makefile b/drivers/interconnect/qcom/Makefile
index 1c1cea690f92..a600cf6cc272 100644
--- a/drivers/interconnect/qcom/Makefile
+++ b/drivers/interconnect/qcom/Makefile
@@ -1,5 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
qnoc-sdm845-objs := sdm845.o
+icc-smd-rpm-objs := smd-rpm.o
obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o
+obj-$(CONFIG_INTERCONNECT_QCOM_SMD_RPM) += icc-smd-rpm.o
diff --git a/drivers/interconnect/qcom/smd-rpm.c b/drivers/interconnect/qcom/smd-rpm.c
new file mode 100644
index 000000000000..0a8c9547bd29
--- /dev/null
+++ b/drivers/interconnect/qcom/smd-rpm.c
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * RPM over SMD communication wrapper for interconnects
+ *
+ * Copyright (C) 2019 Linaro Ltd
+ * Author: Georgi Djakov <[email protected]>
+ */
+
+#include <linux/interconnect-provider.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/soc/qcom/smd-rpm.h>
+
+#include "smd-rpm.h"
+
+#define RPM_KEY_BW 0x00007762
+
+static struct qcom_smd_rpm *icc_smd_rpm;
+
+struct icc_rpm_smd_req {
+ __le32 key;
+ __le32 nbytes;
+ __le32 value;
+};
+
+bool qcom_icc_rpm_smd_available(void)
+{
+ if (!icc_smd_rpm)
+ return false;
+
+ return true;
+}
+EXPORT_SYMBOL_GPL(qcom_icc_rpm_smd_available);
+
+int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val)
+{
+ struct icc_rpm_smd_req req = {
+ .key = cpu_to_le32(RPM_KEY_BW),
+ .nbytes = cpu_to_le32(sizeof(u32)),
+ .value = cpu_to_le32(val),
+ };
+
+ return qcom_rpm_smd_write(icc_smd_rpm, ctx, rsc_type, id, &req,
+ sizeof(req));
+}
+EXPORT_SYMBOL_GPL(qcom_icc_rpm_smd_send);
+
+static int qcom_icc_rpm_smd_remove(struct platform_device *pdev)
+{
+ icc_smd_rpm = NULL;
+
+ return 0;
+}
+
+static int qcom_icc_rpm_smd_probe(struct platform_device *pdev)
+{
+ icc_smd_rpm = dev_get_drvdata(pdev->dev.parent);
+
+ if (!icc_smd_rpm) {
+ dev_err(&pdev->dev, "unable to retrieve handle to RPM\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static struct platform_driver qcom_interconnect_rpm_smd_driver = {
+ .driver = {
+ .name = "icc_smd_rpm",
+ },
+ .probe = qcom_icc_rpm_smd_probe,
+ .remove = qcom_icc_rpm_smd_remove,
+};
+module_platform_driver(qcom_interconnect_rpm_smd_driver);
+MODULE_AUTHOR("Georgi Djakov <[email protected]>");
+MODULE_DESCRIPTION("Qualcomm SMD RPM interconnect proxy driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:icc_smd_rpm");
diff --git a/drivers/interconnect/qcom/smd-rpm.h b/drivers/interconnect/qcom/smd-rpm.h
new file mode 100644
index 000000000000..ca9d0327b8ac
--- /dev/null
+++ b/drivers/interconnect/qcom/smd-rpm.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019, Linaro Ltd.
+ * Author: Georgi Djakov <[email protected]>
+ */
+
+#ifndef __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H
+#define __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H
+
+#include <linux/soc/qcom/smd-rpm.h>
+
+bool qcom_icc_rpm_smd_available(void);
+int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val);
+
+#endif
The Qualcomm QCS404 platform has several buses that could be controlled
and tuned according to the bandwidth demand.
Reviewed-by: Bjorn Andersson <[email protected]>
Signed-off-by: Georgi Djakov <[email protected]>
---
v4:
- Add the DT header into this patch.
- Pick Bjorn's r-b.
v3:
- Add a reg property and move the interconnect nodes under the "soc" node.
v2:
- No changes.
.../bindings/interconnect/qcom,qcs404.txt | 46 ++++++++++
.../dt-bindings/interconnect/qcom,qcs404.h | 88 +++++++++++++++++++
2 files changed, 134 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
create mode 100644 include/dt-bindings/interconnect/qcom,qcs404.h
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt b/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
new file mode 100644
index 000000000000..14a827268dda
--- /dev/null
+++ b/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
@@ -0,0 +1,46 @@
+Qualcomm QCS404 Network-On-Chip interconnect driver binding
+-----------------------------------------------------------
+
+Required properties :
+- compatible : shall contain only one of the following:
+ "qcom,qcs404-bimc"
+ "qcom,qcs404-pcnoc"
+ "qcom,qcs404-snoc"
+- #interconnect-cells : should contain 1
+
+Optional properties :
+reg : specifies the physical base address and size of registers
+clocks : list of phandles and specifiers to all interconnect bus clocks
+clock-names : clock names should include both "bus_clk" and "bus_a_clk"
+
+Example:
+
+soc {
+ ...
+ bimc: interconnect@400000 {
+ reg = <0x00400000 0x80000>;
+ compatible = "qcom,qcs404-bimc";
+ #interconnect-cells = <1>;
+ clock-names = "bus_clk", "bus_a_clk";
+ clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
+ <&rpmcc RPM_SMD_BIMC_A_CLK>;
+ };
+
+ pnoc: interconnect@500000 {
+ reg = <0x00500000 0x15080>;
+ compatible = "qcom,qcs404-pcnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus_clk", "bus_a_clk";
+ clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
+ <&rpmcc RPM_SMD_PNOC_A_CLK>;
+ };
+
+ snoc: interconnect@580000 {
+ reg = <0x00580000 0x23080>;
+ compatible = "qcom,qcs404-snoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus_clk", "bus_a_clk";
+ clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
+ <&rpmcc RPM_SMD_SNOC_A_CLK>;
+ };
+};
diff --git a/include/dt-bindings/interconnect/qcom,qcs404.h b/include/dt-bindings/interconnect/qcom,qcs404.h
new file mode 100644
index 000000000000..960f6e39c5f2
--- /dev/null
+++ b/include/dt-bindings/interconnect/qcom,qcs404.h
@@ -0,0 +1,88 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Qualcomm interconnect IDs
+ *
+ * Copyright (c) 2019, Linaro Ltd.
+ * Author: Georgi Djakov <[email protected]>
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
+#define __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
+
+#define MASTER_AMPSS_M0 0
+#define MASTER_OXILI 1
+#define MASTER_MDP_PORT0 2
+#define MASTER_SNOC_BIMC_1 3
+#define MASTER_TCU_0 4
+#define SLAVE_EBI_CH0 5
+#define SLAVE_BIMC_SNOC 6
+
+#define MASTER_SPDM 0
+#define MASTER_BLSP_1 1
+#define MASTER_BLSP_2 2
+#define MASTER_XI_USB_HS1 3
+#define MASTER_CRYPT0 4
+#define MASTER_SDCC_1 5
+#define MASTER_SDCC_2 6
+#define MASTER_SNOC_PCNOC 7
+#define MASTER_QPIC 8
+#define PCNOC_INT_0 9
+#define PCNOC_INT_2 10
+#define PCNOC_INT_3 11
+#define PCNOC_S_0 12
+#define PCNOC_S_1 13
+#define PCNOC_S_2 14
+#define PCNOC_S_3 15
+#define PCNOC_S_4 16
+#define PCNOC_S_6 17
+#define PCNOC_S_7 18
+#define PCNOC_S_8 19
+#define PCNOC_S_9 20
+#define PCNOC_S_10 21
+#define PCNOC_S_11 22
+#define SLAVE_SPDM 23
+#define SLAVE_PDM 24
+#define SLAVE_PRNG 25
+#define SLAVE_TCSR 26
+#define SLAVE_SNOC_CFG 27
+#define SLAVE_MESSAGE_RAM 28
+#define SLAVE_DISP_SS_CFG 29
+#define SLAVE_GPU_CFG 30
+#define SLAVE_BLSP_1 31
+#define SLAVE_BLSP_2 32
+#define SLAVE_TLMM_NORTH 33
+#define SLAVE_PCIE 34
+#define SLAVE_ETHERNET 35
+#define SLAVE_TLMM_EAST 36
+#define SLAVE_TCU 37
+#define SLAVE_PMIC_ARB 38
+#define SLAVE_SDCC_1 39
+#define SLAVE_SDCC_2 40
+#define SLAVE_TLMM_SOUTH 41
+#define SLAVE_USB_HS 42
+#define SLAVE_USB3 43
+#define SLAVE_CRYPTO_0_CFG 44
+#define SLAVE_PCNOC_SNOC 45
+
+#define MASTER_QDSS_BAM 0
+#define MASTER_BIMC_SNOC 1
+#define MASTER_PCNOC_SNOC 2
+#define MASTER_QDSS_ETR 3
+#define MASTER_EMAC 4
+#define MASTER_PCIE 5
+#define MASTER_USB3 6
+#define QDSS_INT 7
+#define SNOC_INT_0 8
+#define SNOC_INT_1 9
+#define SNOC_INT_2 10
+#define SLAVE_KPSS_AHB 11
+#define SLAVE_WCSS 12
+#define SLAVE_SNOC_BIMC_1 13
+#define SLAVE_IMEM 14
+#define SLAVE_SNOC_PCNOC 15
+#define SLAVE_QDSS_STM 16
+#define SLAVE_CATS_0 17
+#define SLAVE_CATS_1 18
+#define SLAVE_LPASS 19
+
+#endif
On Thu 13 Jun 08:13 PDT 2019, Georgi Djakov wrote:
> Register a platform device to handle the communication of bus bandwidth
> requests with the remote processor. The interconnect proxy device is part
> of this remote processor (RPM) hardware. Let's create a icc-smd-rpm proxy
> child device to represent the bus throughput functionality that is provided
> by the RPM.
>
Reviewed-by: Bjorn Andersson <[email protected]>
> Signed-off-by: Georgi Djakov <[email protected]>
> ---
>
> v4:
> - Return error if platform_device_register_data() fails
> - Remove platform_set_drvdata() on the child device.
>
> v3:
> - New patch.
>
> drivers/soc/qcom/smd-rpm.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
> index fa9dd12b5e39..34cdd638a6c1 100644
> --- a/drivers/soc/qcom/smd-rpm.c
> +++ b/drivers/soc/qcom/smd-rpm.c
> @@ -19,12 +19,14 @@
> /**
> * struct qcom_smd_rpm - state of the rpm device driver
> * @rpm_channel: reference to the smd channel
> + * @icc: interconnect proxy device
> * @ack: completion for acks
> * @lock: mutual exclusion around the send/complete pair
> * @ack_status: result of the rpm request
> */
> struct qcom_smd_rpm {
> struct rpmsg_endpoint *rpm_channel;
> + struct platform_device *icc;
> struct device *dev;
>
> struct completion ack;
> @@ -193,6 +195,7 @@ static int qcom_smd_rpm_callback(struct rpmsg_device *rpdev,
> static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev)
> {
> struct qcom_smd_rpm *rpm;
> + int ret;
>
> rpm = devm_kzalloc(&rpdev->dev, sizeof(*rpm), GFP_KERNEL);
> if (!rpm)
> @@ -205,11 +208,23 @@ static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev)
> rpm->rpm_channel = rpdev->ept;
> dev_set_drvdata(&rpdev->dev, rpm);
>
> - return of_platform_populate(rpdev->dev.of_node, NULL, NULL, &rpdev->dev);
> + rpm->icc = platform_device_register_data(&rpdev->dev, "icc_smd_rpm", -1,
> + NULL, 0);
> + if (IS_ERR(rpm->icc))
> + return PTR_ERR(rpm->icc);
> +
> + ret = of_platform_populate(rpdev->dev.of_node, NULL, NULL, &rpdev->dev);
> + if (ret)
> + platform_device_unregister(rpm->icc);
> +
> + return ret;
> }
>
> static void qcom_smd_rpm_remove(struct rpmsg_device *rpdev)
> {
> + struct qcom_smd_rpm *rpm = dev_get_drvdata(&rpdev->dev);
> +
> + platform_device_unregister(rpm->icc);
> of_platform_depopulate(&rpdev->dev);
> }
>
On Thu 13 Jun 08:13 PDT 2019, Georgi Djakov wrote:
> On some Qualcomm SoCs, there is a remote processor, which controls some of
> the Network-On-Chip interconnect resources. Other CPUs express their needs
> by communicating with this processor. Add a driver to handle communication
> with this remote processor.
>
> Signed-off-by: Georgi Djakov <[email protected]>
> ---
>
> v4:
> - Hide the driver from config menu. It will be selected by other driver.
> - Add remove() function to zero out the rpm handle.
>
> v3:
> - New patch.
>
> drivers/interconnect/qcom/Kconfig | 3 ++
> drivers/interconnect/qcom/Makefile | 2 +
> drivers/interconnect/qcom/smd-rpm.c | 80 +++++++++++++++++++++++++++++
> drivers/interconnect/qcom/smd-rpm.h | 15 ++++++
> 4 files changed, 100 insertions(+)
> create mode 100644 drivers/interconnect/qcom/smd-rpm.c
> create mode 100644 drivers/interconnect/qcom/smd-rpm.h
>
> diff --git a/drivers/interconnect/qcom/Kconfig b/drivers/interconnect/qcom/Kconfig
> index d5e70ebc2410..03fd67173494 100644
> --- a/drivers/interconnect/qcom/Kconfig
> +++ b/drivers/interconnect/qcom/Kconfig
> @@ -12,3 +12,6 @@ config INTERCONNECT_QCOM_SDM845
> help
> This is a driver for the Qualcomm Network-on-Chip on sdm845-based
> platforms.
> +
> +config INTERCONNECT_QCOM_SMD_RPM
> + tristate
> diff --git a/drivers/interconnect/qcom/Makefile b/drivers/interconnect/qcom/Makefile
> index 1c1cea690f92..a600cf6cc272 100644
> --- a/drivers/interconnect/qcom/Makefile
> +++ b/drivers/interconnect/qcom/Makefile
> @@ -1,5 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
>
> qnoc-sdm845-objs := sdm845.o
> +icc-smd-rpm-objs := smd-rpm.o
>
> obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o
> +obj-$(CONFIG_INTERCONNECT_QCOM_SMD_RPM) += icc-smd-rpm.o
> diff --git a/drivers/interconnect/qcom/smd-rpm.c b/drivers/interconnect/qcom/smd-rpm.c
> new file mode 100644
> index 000000000000..0a8c9547bd29
> --- /dev/null
> +++ b/drivers/interconnect/qcom/smd-rpm.c
> @@ -0,0 +1,80 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * RPM over SMD communication wrapper for interconnects
> + *
> + * Copyright (C) 2019 Linaro Ltd
> + * Author: Georgi Djakov <[email protected]>
> + */
> +
> +#include <linux/interconnect-provider.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/soc/qcom/smd-rpm.h>
> +
> +#include "smd-rpm.h"
> +
> +#define RPM_KEY_BW 0x00007762
> +
> +static struct qcom_smd_rpm *icc_smd_rpm;
> +
> +struct icc_rpm_smd_req {
> + __le32 key;
> + __le32 nbytes;
> + __le32 value;
> +};
> +
> +bool qcom_icc_rpm_smd_available(void)
> +{
> + if (!icc_smd_rpm)
> + return false;
> +
> + return true;
A more succinct form would have been:
return !!icc_smd_rpm;
Reviewed-by: Bjorn Andersson <[email protected]>
> +}
> +EXPORT_SYMBOL_GPL(qcom_icc_rpm_smd_available);
> +
> +int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val)
> +{
> + struct icc_rpm_smd_req req = {
> + .key = cpu_to_le32(RPM_KEY_BW),
> + .nbytes = cpu_to_le32(sizeof(u32)),
> + .value = cpu_to_le32(val),
> + };
> +
> + return qcom_rpm_smd_write(icc_smd_rpm, ctx, rsc_type, id, &req,
> + sizeof(req));
> +}
> +EXPORT_SYMBOL_GPL(qcom_icc_rpm_smd_send);
> +
> +static int qcom_icc_rpm_smd_remove(struct platform_device *pdev)
> +{
> + icc_smd_rpm = NULL;
> +
> + return 0;
> +}
> +
> +static int qcom_icc_rpm_smd_probe(struct platform_device *pdev)
> +{
> + icc_smd_rpm = dev_get_drvdata(pdev->dev.parent);
> +
> + if (!icc_smd_rpm) {
> + dev_err(&pdev->dev, "unable to retrieve handle to RPM\n");
> + return -ENODEV;
> + }
> +
> + return 0;
> +}
> +
> +static struct platform_driver qcom_interconnect_rpm_smd_driver = {
> + .driver = {
> + .name = "icc_smd_rpm",
> + },
> + .probe = qcom_icc_rpm_smd_probe,
> + .remove = qcom_icc_rpm_smd_remove,
> +};
> +module_platform_driver(qcom_interconnect_rpm_smd_driver);
> +MODULE_AUTHOR("Georgi Djakov <[email protected]>");
> +MODULE_DESCRIPTION("Qualcomm SMD RPM interconnect proxy driver");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:icc_smd_rpm");
> diff --git a/drivers/interconnect/qcom/smd-rpm.h b/drivers/interconnect/qcom/smd-rpm.h
> new file mode 100644
> index 000000000000..ca9d0327b8ac
> --- /dev/null
> +++ b/drivers/interconnect/qcom/smd-rpm.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (c) 2019, Linaro Ltd.
> + * Author: Georgi Djakov <[email protected]>
> + */
> +
> +#ifndef __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H
> +#define __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H
> +
> +#include <linux/soc/qcom/smd-rpm.h>
> +
> +bool qcom_icc_rpm_smd_available(void);
> +int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val);
> +
> +#endif
Hi Rob,
On 6/13/19 18:13, Georgi Djakov wrote:
> The Qualcomm QCS404 platform has several buses that could be controlled
> and tuned according to the bandwidth demand.
>
> Reviewed-by: Bjorn Andersson <[email protected]>
> Signed-off-by: Georgi Djakov <[email protected]>
> ---
>
> v4:
> - Add the DT header into this patch.
> - Pick Bjorn's r-b.
>
> v3:
> - Add a reg property and move the interconnect nodes under the "soc" node.
>
> v2:
> - No changes.
>
> .../bindings/interconnect/qcom,qcs404.txt | 46 ++++++++++
> .../dt-bindings/interconnect/qcom,qcs404.h | 88 +++++++++++++++++++
> 2 files changed, 134 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
> create mode 100644 include/dt-bindings/interconnect/qcom,qcs404.h
>
> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt b/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
> new file mode 100644
> index 000000000000..14a827268dda
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
> @@ -0,0 +1,46 @@
> +Qualcomm QCS404 Network-On-Chip interconnect driver binding
> +-----------------------------------------------------------
> +
> +Required properties :
> +- compatible : shall contain only one of the following:
> + "qcom,qcs404-bimc"
> + "qcom,qcs404-pcnoc"
> + "qcom,qcs404-snoc"
> +- #interconnect-cells : should contain 1
> +
> +Optional properties :
> +reg : specifies the physical base address and size of registers
> +clocks : list of phandles and specifiers to all interconnect bus clocks
> +clock-names : clock names should include both "bus_clk" and "bus_a_clk"
> +
> +Example:
> +
> +soc {
> + ...
> + bimc: interconnect@400000 {
> + reg = <0x00400000 0x80000>;
> + compatible = "qcom,qcs404-bimc";
> + #interconnect-cells = <1>;
> + clock-names = "bus_clk", "bus_a_clk";
> + clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
> + <&rpmcc RPM_SMD_BIMC_A_CLK>;
> + };
> +
> + pnoc: interconnect@500000 {
> + reg = <0x00500000 0x15080>;
> + compatible = "qcom,qcs404-pcnoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus_clk", "bus_a_clk";
> + clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
> + <&rpmcc RPM_SMD_PNOC_A_CLK>;
> + };
> +
> + snoc: interconnect@580000 {
> + reg = <0x00580000 0x23080>;
> + compatible = "qcom,qcs404-snoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus_clk", "bus_a_clk";
> + clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
> + <&rpmcc RPM_SMD_SNOC_A_CLK>;
> + };
> +};
Does this look ok from DT perspective?
Thanks,
Georgi
> diff --git a/include/dt-bindings/interconnect/qcom,qcs404.h b/include/dt-bindings/interconnect/qcom,qcs404.h
> new file mode 100644
> index 000000000000..960f6e39c5f2
> --- /dev/null
> +++ b/include/dt-bindings/interconnect/qcom,qcs404.h
> @@ -0,0 +1,88 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Qualcomm interconnect IDs
> + *
> + * Copyright (c) 2019, Linaro Ltd.
> + * Author: Georgi Djakov <[email protected]>
> + */
> +
> +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
> +#define __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
> +
> +#define MASTER_AMPSS_M0 0
> +#define MASTER_OXILI 1
> +#define MASTER_MDP_PORT0 2
> +#define MASTER_SNOC_BIMC_1 3
> +#define MASTER_TCU_0 4
> +#define SLAVE_EBI_CH0 5
> +#define SLAVE_BIMC_SNOC 6
> +
> +#define MASTER_SPDM 0
> +#define MASTER_BLSP_1 1
> +#define MASTER_BLSP_2 2
> +#define MASTER_XI_USB_HS1 3
> +#define MASTER_CRYPT0 4
> +#define MASTER_SDCC_1 5
> +#define MASTER_SDCC_2 6
> +#define MASTER_SNOC_PCNOC 7
> +#define MASTER_QPIC 8
> +#define PCNOC_INT_0 9
> +#define PCNOC_INT_2 10
> +#define PCNOC_INT_3 11
> +#define PCNOC_S_0 12
> +#define PCNOC_S_1 13
> +#define PCNOC_S_2 14
> +#define PCNOC_S_3 15
> +#define PCNOC_S_4 16
> +#define PCNOC_S_6 17
> +#define PCNOC_S_7 18
> +#define PCNOC_S_8 19
> +#define PCNOC_S_9 20
> +#define PCNOC_S_10 21
> +#define PCNOC_S_11 22
> +#define SLAVE_SPDM 23
> +#define SLAVE_PDM 24
> +#define SLAVE_PRNG 25
> +#define SLAVE_TCSR 26
> +#define SLAVE_SNOC_CFG 27
> +#define SLAVE_MESSAGE_RAM 28
> +#define SLAVE_DISP_SS_CFG 29
> +#define SLAVE_GPU_CFG 30
> +#define SLAVE_BLSP_1 31
> +#define SLAVE_BLSP_2 32
> +#define SLAVE_TLMM_NORTH 33
> +#define SLAVE_PCIE 34
> +#define SLAVE_ETHERNET 35
> +#define SLAVE_TLMM_EAST 36
> +#define SLAVE_TCU 37
> +#define SLAVE_PMIC_ARB 38
> +#define SLAVE_SDCC_1 39
> +#define SLAVE_SDCC_2 40
> +#define SLAVE_TLMM_SOUTH 41
> +#define SLAVE_USB_HS 42
> +#define SLAVE_USB3 43
> +#define SLAVE_CRYPTO_0_CFG 44
> +#define SLAVE_PCNOC_SNOC 45
> +
> +#define MASTER_QDSS_BAM 0
> +#define MASTER_BIMC_SNOC 1
> +#define MASTER_PCNOC_SNOC 2
> +#define MASTER_QDSS_ETR 3
> +#define MASTER_EMAC 4
> +#define MASTER_PCIE 5
> +#define MASTER_USB3 6
> +#define QDSS_INT 7
> +#define SNOC_INT_0 8
> +#define SNOC_INT_1 9
> +#define SNOC_INT_2 10
> +#define SLAVE_KPSS_AHB 11
> +#define SLAVE_WCSS 12
> +#define SLAVE_SNOC_BIMC_1 13
> +#define SLAVE_IMEM 14
> +#define SLAVE_SNOC_PCNOC 15
> +#define SLAVE_QDSS_STM 16
> +#define SLAVE_CATS_0 17
> +#define SLAVE_CATS_1 18
> +#define SLAVE_LPASS 19
> +
> +#endif
>
On Thu 13 Jun 08:13 PDT 2019, Georgi Djakov wrote:
> The Qualcomm QCS404 platform has several buses that could be controlled
> and tuned according to the bandwidth demand.
>
> Reviewed-by: Bjorn Andersson <[email protected]>
> Signed-off-by: Georgi Djakov <[email protected]>
> ---
>
> v4:
> - Add the DT header into this patch.
> - Pick Bjorn's r-b.
>
> v3:
> - Add a reg property and move the interconnect nodes under the "soc" node.
>
> v2:
> - No changes.
>
> .../bindings/interconnect/qcom,qcs404.txt | 46 ++++++++++
> .../dt-bindings/interconnect/qcom,qcs404.h | 88 +++++++++++++++++++
> 2 files changed, 134 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
> create mode 100644 include/dt-bindings/interconnect/qcom,qcs404.h
>
> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt b/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
> new file mode 100644
> index 000000000000..14a827268dda
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
> @@ -0,0 +1,46 @@
> +Qualcomm QCS404 Network-On-Chip interconnect driver binding
> +-----------------------------------------------------------
> +
> +Required properties :
> +- compatible : shall contain only one of the following:
> + "qcom,qcs404-bimc"
> + "qcom,qcs404-pcnoc"
> + "qcom,qcs404-snoc"
> +- #interconnect-cells : should contain 1
> +
> +Optional properties :
> +reg : specifies the physical base address and size of registers
> +clocks : list of phandles and specifiers to all interconnect bus clocks
> +clock-names : clock names should include both "bus_clk" and "bus_a_clk"
Spoke to Rob about this patch, and I don't think these properties should
not be described as optional.
The reg isn't used unless we're implementing support for QoS, but let's
include them in the binding as required anyways.
Iirc the two clocks are required with the current implementation, but
shouldn't there be an iface clock as well, for accessing the QoS
register space?
PS. As I read this again, please drop _clk from the two clocks names -
we know they are clocks...
Regards,
Bjorn
> +
> +Example:
> +
> +soc {
> + ...
> + bimc: interconnect@400000 {
> + reg = <0x00400000 0x80000>;
> + compatible = "qcom,qcs404-bimc";
> + #interconnect-cells = <1>;
> + clock-names = "bus_clk", "bus_a_clk";
> + clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
> + <&rpmcc RPM_SMD_BIMC_A_CLK>;
> + };
> +
> + pnoc: interconnect@500000 {
> + reg = <0x00500000 0x15080>;
> + compatible = "qcom,qcs404-pcnoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus_clk", "bus_a_clk";
> + clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
> + <&rpmcc RPM_SMD_PNOC_A_CLK>;
> + };
> +
> + snoc: interconnect@580000 {
> + reg = <0x00580000 0x23080>;
> + compatible = "qcom,qcs404-snoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus_clk", "bus_a_clk";
> + clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
> + <&rpmcc RPM_SMD_SNOC_A_CLK>;
> + };
> +};
> diff --git a/include/dt-bindings/interconnect/qcom,qcs404.h b/include/dt-bindings/interconnect/qcom,qcs404.h
> new file mode 100644
> index 000000000000..960f6e39c5f2
> --- /dev/null
> +++ b/include/dt-bindings/interconnect/qcom,qcs404.h
> @@ -0,0 +1,88 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Qualcomm interconnect IDs
> + *
> + * Copyright (c) 2019, Linaro Ltd.
> + * Author: Georgi Djakov <[email protected]>
> + */
> +
> +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
> +#define __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
> +
> +#define MASTER_AMPSS_M0 0
> +#define MASTER_OXILI 1
> +#define MASTER_MDP_PORT0 2
> +#define MASTER_SNOC_BIMC_1 3
> +#define MASTER_TCU_0 4
> +#define SLAVE_EBI_CH0 5
> +#define SLAVE_BIMC_SNOC 6
> +
> +#define MASTER_SPDM 0
> +#define MASTER_BLSP_1 1
> +#define MASTER_BLSP_2 2
> +#define MASTER_XI_USB_HS1 3
> +#define MASTER_CRYPT0 4
> +#define MASTER_SDCC_1 5
> +#define MASTER_SDCC_2 6
> +#define MASTER_SNOC_PCNOC 7
> +#define MASTER_QPIC 8
> +#define PCNOC_INT_0 9
> +#define PCNOC_INT_2 10
> +#define PCNOC_INT_3 11
> +#define PCNOC_S_0 12
> +#define PCNOC_S_1 13
> +#define PCNOC_S_2 14
> +#define PCNOC_S_3 15
> +#define PCNOC_S_4 16
> +#define PCNOC_S_6 17
> +#define PCNOC_S_7 18
> +#define PCNOC_S_8 19
> +#define PCNOC_S_9 20
> +#define PCNOC_S_10 21
> +#define PCNOC_S_11 22
> +#define SLAVE_SPDM 23
> +#define SLAVE_PDM 24
> +#define SLAVE_PRNG 25
> +#define SLAVE_TCSR 26
> +#define SLAVE_SNOC_CFG 27
> +#define SLAVE_MESSAGE_RAM 28
> +#define SLAVE_DISP_SS_CFG 29
> +#define SLAVE_GPU_CFG 30
> +#define SLAVE_BLSP_1 31
> +#define SLAVE_BLSP_2 32
> +#define SLAVE_TLMM_NORTH 33
> +#define SLAVE_PCIE 34
> +#define SLAVE_ETHERNET 35
> +#define SLAVE_TLMM_EAST 36
> +#define SLAVE_TCU 37
> +#define SLAVE_PMIC_ARB 38
> +#define SLAVE_SDCC_1 39
> +#define SLAVE_SDCC_2 40
> +#define SLAVE_TLMM_SOUTH 41
> +#define SLAVE_USB_HS 42
> +#define SLAVE_USB3 43
> +#define SLAVE_CRYPTO_0_CFG 44
> +#define SLAVE_PCNOC_SNOC 45
> +
> +#define MASTER_QDSS_BAM 0
> +#define MASTER_BIMC_SNOC 1
> +#define MASTER_PCNOC_SNOC 2
> +#define MASTER_QDSS_ETR 3
> +#define MASTER_EMAC 4
> +#define MASTER_PCIE 5
> +#define MASTER_USB3 6
> +#define QDSS_INT 7
> +#define SNOC_INT_0 8
> +#define SNOC_INT_1 9
> +#define SNOC_INT_2 10
> +#define SLAVE_KPSS_AHB 11
> +#define SLAVE_WCSS 12
> +#define SLAVE_SNOC_BIMC_1 13
> +#define SLAVE_IMEM 14
> +#define SLAVE_SNOC_PCNOC 15
> +#define SLAVE_QDSS_STM 16
> +#define SLAVE_CATS_0 17
> +#define SLAVE_CATS_1 18
> +#define SLAVE_LPASS 19
> +
> +#endif
Hi Bjorn,
On 7/8/19 22:26, Bjorn Andersson wrote:
> On Thu 13 Jun 08:13 PDT 2019, Georgi Djakov wrote:
>
>> The Qualcomm QCS404 platform has several buses that could be controlled
>> and tuned according to the bandwidth demand.
>>
>> Reviewed-by: Bjorn Andersson <[email protected]>
>> Signed-off-by: Georgi Djakov <[email protected]>
>> ---
>>
>> v4:
>> - Add the DT header into this patch.
>> - Pick Bjorn's r-b.
>>
>> v3:
>> - Add a reg property and move the interconnect nodes under the "soc" node.
>>
>> v2:
>> - No changes.
>>
>> .../bindings/interconnect/qcom,qcs404.txt | 46 ++++++++++
>> .../dt-bindings/interconnect/qcom,qcs404.h | 88 +++++++++++++++++++
>> 2 files changed, 134 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
>> create mode 100644 include/dt-bindings/interconnect/qcom,qcs404.h
>>
>> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt b/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
>> new file mode 100644
>> index 000000000000..14a827268dda
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/interconnect/qcom,qcs404.txt
>> @@ -0,0 +1,46 @@
>> +Qualcomm QCS404 Network-On-Chip interconnect driver binding
>> +-----------------------------------------------------------
>> +
>> +Required properties :
>> +- compatible : shall contain only one of the following:
>> + "qcom,qcs404-bimc"
>> + "qcom,qcs404-pcnoc"
>> + "qcom,qcs404-snoc"
>> +- #interconnect-cells : should contain 1
>> +
>> +Optional properties :
>> +reg : specifies the physical base address and size of registers
>> +clocks : list of phandles and specifiers to all interconnect bus clocks
>> +clock-names : clock names should include both "bus_clk" and "bus_a_clk"
>
> Spoke to Rob about this patch, and I don't think these properties should
> not be described as optional.
>
> The reg isn't used unless we're implementing support for QoS, but let's
> include them in the binding as required anyways.
Ok, will do it!
>
> Iirc the two clocks are required with the current implementation, but
> shouldn't there be an iface clock as well, for accessing the QoS
> register space?
Actually i expect this to be a list of AXI clocks of the IP blocks, whose QoS
ports we configure. For this platform, according to downstream, it would be just
<&gcc GCC_SYS_NOC_USB3_CLK>. For other platforms i see these are a few usb/ufs
clocks that should be enabled while we set QoS for usb/ufs.
>
> PS. As I read this again, please drop _clk from the two clocks names -
> we know they are clocks...
Sure, will do it!
Thanks,
Georgi
>
> Regards,
> Bjorn
>
>> +
>> +Example:
>> +
>> +soc {
>> + ...
>> + bimc: interconnect@400000 {
>> + reg = <0x00400000 0x80000>;
>> + compatible = "qcom,qcs404-bimc";
>> + #interconnect-cells = <1>;
>> + clock-names = "bus_clk", "bus_a_clk";
>> + clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
>> + <&rpmcc RPM_SMD_BIMC_A_CLK>;
>> + };
>> +
>> + pnoc: interconnect@500000 {
>> + reg = <0x00500000 0x15080>;
>> + compatible = "qcom,qcs404-pcnoc";
>> + #interconnect-cells = <1>;
>> + clock-names = "bus_clk", "bus_a_clk";
>> + clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
>> + <&rpmcc RPM_SMD_PNOC_A_CLK>;
>> + };
>> +
>> + snoc: interconnect@580000 {
>> + reg = <0x00580000 0x23080>;
>> + compatible = "qcom,qcs404-snoc";
>> + #interconnect-cells = <1>;
>> + clock-names = "bus_clk", "bus_a_clk";
>> + clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
>> + <&rpmcc RPM_SMD_SNOC_A_CLK>;
>> + };
>> +};
>> diff --git a/include/dt-bindings/interconnect/qcom,qcs404.h b/include/dt-bindings/interconnect/qcom,qcs404.h
>> new file mode 100644
>> index 000000000000..960f6e39c5f2
>> --- /dev/null
>> +++ b/include/dt-bindings/interconnect/qcom,qcs404.h
>> @@ -0,0 +1,88 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/*
>> + * Qualcomm interconnect IDs
>> + *
>> + * Copyright (c) 2019, Linaro Ltd.
>> + * Author: Georgi Djakov <[email protected]>
>> + */
>> +
>> +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
>> +#define __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
>> +
>> +#define MASTER_AMPSS_M0 0
>> +#define MASTER_OXILI 1
>> +#define MASTER_MDP_PORT0 2
>> +#define MASTER_SNOC_BIMC_1 3
>> +#define MASTER_TCU_0 4
>> +#define SLAVE_EBI_CH0 5
>> +#define SLAVE_BIMC_SNOC 6
>> +
>> +#define MASTER_SPDM 0
>> +#define MASTER_BLSP_1 1
>> +#define MASTER_BLSP_2 2
>> +#define MASTER_XI_USB_HS1 3
>> +#define MASTER_CRYPT0 4
>> +#define MASTER_SDCC_1 5
>> +#define MASTER_SDCC_2 6
>> +#define MASTER_SNOC_PCNOC 7
>> +#define MASTER_QPIC 8
>> +#define PCNOC_INT_0 9
>> +#define PCNOC_INT_2 10
>> +#define PCNOC_INT_3 11
>> +#define PCNOC_S_0 12
>> +#define PCNOC_S_1 13
>> +#define PCNOC_S_2 14
>> +#define PCNOC_S_3 15
>> +#define PCNOC_S_4 16
>> +#define PCNOC_S_6 17
>> +#define PCNOC_S_7 18
>> +#define PCNOC_S_8 19
>> +#define PCNOC_S_9 20
>> +#define PCNOC_S_10 21
>> +#define PCNOC_S_11 22
>> +#define SLAVE_SPDM 23
>> +#define SLAVE_PDM 24
>> +#define SLAVE_PRNG 25
>> +#define SLAVE_TCSR 26
>> +#define SLAVE_SNOC_CFG 27
>> +#define SLAVE_MESSAGE_RAM 28
>> +#define SLAVE_DISP_SS_CFG 29
>> +#define SLAVE_GPU_CFG 30
>> +#define SLAVE_BLSP_1 31
>> +#define SLAVE_BLSP_2 32
>> +#define SLAVE_TLMM_NORTH 33
>> +#define SLAVE_PCIE 34
>> +#define SLAVE_ETHERNET 35
>> +#define SLAVE_TLMM_EAST 36
>> +#define SLAVE_TCU 37
>> +#define SLAVE_PMIC_ARB 38
>> +#define SLAVE_SDCC_1 39
>> +#define SLAVE_SDCC_2 40
>> +#define SLAVE_TLMM_SOUTH 41
>> +#define SLAVE_USB_HS 42
>> +#define SLAVE_USB3 43
>> +#define SLAVE_CRYPTO_0_CFG 44
>> +#define SLAVE_PCNOC_SNOC 45
>> +
>> +#define MASTER_QDSS_BAM 0
>> +#define MASTER_BIMC_SNOC 1
>> +#define MASTER_PCNOC_SNOC 2
>> +#define MASTER_QDSS_ETR 3
>> +#define MASTER_EMAC 4
>> +#define MASTER_PCIE 5
>> +#define MASTER_USB3 6
>> +#define QDSS_INT 7
>> +#define SNOC_INT_0 8
>> +#define SNOC_INT_1 9
>> +#define SNOC_INT_2 10
>> +#define SLAVE_KPSS_AHB 11
>> +#define SLAVE_WCSS 12
>> +#define SLAVE_SNOC_BIMC_1 13
>> +#define SLAVE_IMEM 14
>> +#define SLAVE_SNOC_PCNOC 15
>> +#define SLAVE_QDSS_STM 16
>> +#define SLAVE_CATS_0 17
>> +#define SLAVE_CATS_1 18
>> +#define SLAVE_LPASS 19
>> +
>> +#endif
On Thu, Jun 13, 2019 at 06:13:20PM +0300, Georgi Djakov wrote:
> Register a platform device to handle the communication of bus bandwidth
> requests with the remote processor. The interconnect proxy device is part
> of this remote processor (RPM) hardware. Let's create a icc-smd-rpm proxy
> child device to represent the bus throughput functionality that is provided
> by the RPM.
>
> Signed-off-by: Georgi Djakov <[email protected]>
Reviewed-by: Brian Masney <[email protected]>
Tested-by: Brian Masney <[email protected]> # msm8974
I think this patch may have fell through the cracks since I don't see
it in linux-next. The qcs404 patches in this series were merged.
Brian
> ---
>
> v4:
> - Return error if platform_device_register_data() fails
> - Remove platform_set_drvdata() on the child device.
>
> v3:
> - New patch.
>
> drivers/soc/qcom/smd-rpm.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
> index fa9dd12b5e39..34cdd638a6c1 100644
> --- a/drivers/soc/qcom/smd-rpm.c
> +++ b/drivers/soc/qcom/smd-rpm.c
> @@ -19,12 +19,14 @@
> /**
> * struct qcom_smd_rpm - state of the rpm device driver
> * @rpm_channel: reference to the smd channel
> + * @icc: interconnect proxy device
> * @ack: completion for acks
> * @lock: mutual exclusion around the send/complete pair
> * @ack_status: result of the rpm request
> */
> struct qcom_smd_rpm {
> struct rpmsg_endpoint *rpm_channel;
> + struct platform_device *icc;
> struct device *dev;
>
> struct completion ack;
> @@ -193,6 +195,7 @@ static int qcom_smd_rpm_callback(struct rpmsg_device *rpdev,
> static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev)
> {
> struct qcom_smd_rpm *rpm;
> + int ret;
>
> rpm = devm_kzalloc(&rpdev->dev, sizeof(*rpm), GFP_KERNEL);
> if (!rpm)
> @@ -205,11 +208,23 @@ static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev)
> rpm->rpm_channel = rpdev->ept;
> dev_set_drvdata(&rpdev->dev, rpm);
>
> - return of_platform_populate(rpdev->dev.of_node, NULL, NULL, &rpdev->dev);
> + rpm->icc = platform_device_register_data(&rpdev->dev, "icc_smd_rpm", -1,
> + NULL, 0);
> + if (IS_ERR(rpm->icc))
> + return PTR_ERR(rpm->icc);
> +
> + ret = of_platform_populate(rpdev->dev.of_node, NULL, NULL, &rpdev->dev);
> + if (ret)
> + platform_device_unregister(rpm->icc);
> +
> + return ret;
> }
>
> static void qcom_smd_rpm_remove(struct rpmsg_device *rpdev)
> {
> + struct qcom_smd_rpm *rpm = dev_get_drvdata(&rpdev->dev);
> +
> + platform_device_unregister(rpm->icc);
> of_platform_depopulate(&rpdev->dev);
> }
>
On Sun 06 Oct 19:01 PDT 2019, Brian Masney wrote:
> On Thu, Jun 13, 2019 at 06:13:20PM +0300, Georgi Djakov wrote:
> > Register a platform device to handle the communication of bus bandwidth
> > requests with the remote processor. The interconnect proxy device is part
> > of this remote processor (RPM) hardware. Let's create a icc-smd-rpm proxy
> > child device to represent the bus throughput functionality that is provided
> > by the RPM.
> >
> > Signed-off-by: Georgi Djakov <[email protected]>
>
> Reviewed-by: Brian Masney <[email protected]>
> Tested-by: Brian Masney <[email protected]> # msm8974
>
> I think this patch may have fell through the cracks since I don't see
> it in linux-next. The qcs404 patches in this series were merged.
>
Yes, I was expecting Georgi to pick the entire series through his tree,
but see now that I didn't actually ask Georgi to do so. Sorry about
that.
I picked the this and the dts patch last week, so if it's not in
linux-next yet it should show up in the next one.
Thanks,
Bjorn
> Brian
>
> > ---
> >
> > v4:
> > - Return error if platform_device_register_data() fails
> > - Remove platform_set_drvdata() on the child device.
> >
> > v3:
> > - New patch.
> >
> > drivers/soc/qcom/smd-rpm.c | 17 ++++++++++++++++-
> > 1 file changed, 16 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
> > index fa9dd12b5e39..34cdd638a6c1 100644
> > --- a/drivers/soc/qcom/smd-rpm.c
> > +++ b/drivers/soc/qcom/smd-rpm.c
> > @@ -19,12 +19,14 @@
> > /**
> > * struct qcom_smd_rpm - state of the rpm device driver
> > * @rpm_channel: reference to the smd channel
> > + * @icc: interconnect proxy device
> > * @ack: completion for acks
> > * @lock: mutual exclusion around the send/complete pair
> > * @ack_status: result of the rpm request
> > */
> > struct qcom_smd_rpm {
> > struct rpmsg_endpoint *rpm_channel;
> > + struct platform_device *icc;
> > struct device *dev;
> >
> > struct completion ack;
> > @@ -193,6 +195,7 @@ static int qcom_smd_rpm_callback(struct rpmsg_device *rpdev,
> > static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev)
> > {
> > struct qcom_smd_rpm *rpm;
> > + int ret;
> >
> > rpm = devm_kzalloc(&rpdev->dev, sizeof(*rpm), GFP_KERNEL);
> > if (!rpm)
> > @@ -205,11 +208,23 @@ static int qcom_smd_rpm_probe(struct rpmsg_device *rpdev)
> > rpm->rpm_channel = rpdev->ept;
> > dev_set_drvdata(&rpdev->dev, rpm);
> >
> > - return of_platform_populate(rpdev->dev.of_node, NULL, NULL, &rpdev->dev);
> > + rpm->icc = platform_device_register_data(&rpdev->dev, "icc_smd_rpm", -1,
> > + NULL, 0);
> > + if (IS_ERR(rpm->icc))
> > + return PTR_ERR(rpm->icc);
> > +
> > + ret = of_platform_populate(rpdev->dev.of_node, NULL, NULL, &rpdev->dev);
> > + if (ret)
> > + platform_device_unregister(rpm->icc);
> > +
> > + return ret;
> > }
> >
> > static void qcom_smd_rpm_remove(struct rpmsg_device *rpdev)
> > {
> > + struct qcom_smd_rpm *rpm = dev_get_drvdata(&rpdev->dev);
> > +
> > + platform_device_unregister(rpm->icc);
> > of_platform_depopulate(&rpdev->dev);
> > }
> >