Add the qDMA device tree nodes for LS1028A devices
Signed-off-by: Peng Ma <[email protected]>
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 20 ++++++++++++++++++++
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 2896bbc..8116fb3 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -336,6 +336,26 @@
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
};
+ qdma: dma-controller@8380000 {
+ compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
+ reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
+ <0x0 0x8390000 0x0 0x10000>, /* Status regs */
+ <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error", "qdma-queue0",
+ "qdma-queue1", "qdma-queue2", "qdma-queue3";
+ dma-channels = <8>;
+ block-number = <1>;
+ block-offset = <0x10000>;
+ fsl,dma-queues = <2>;
+ status-sizes = <64>;
+ queue-sizes = <64 64>;
+ };
+
pcie@1f0000000 { /* Integrated Endpoint Root Complex */
compatible = "pci-host-ecam-generic";
reg = <0x01 0xf0000000 0x0 0x100000>;
--
1.7.1
improve edma driver to support little endian.
Signed-off-by: Peng Ma <[email protected]>
---
drivers/dma/fsl-edma-common.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
index 680b2a0..6bf238e 100644
--- a/drivers/dma/fsl-edma-common.c
+++ b/drivers/dma/fsl-edma-common.c
@@ -83,9 +83,14 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
u32 ch = fsl_chan->vchan.chan.chan_id;
void __iomem *muxaddr;
unsigned int chans_per_mux, ch_off;
+ int endian_diff[4] = {3, 1, -1, -3};
chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR;
ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
+
+ if (!fsl_chan->edma->big_endian)
+ ch_off += endian_diff[ch_off % 4];
+
muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
slot = EDMAMUX_CHCFG_SOURCE(slot);
--
1.7.1
On 06-05-19, 09:03, Peng Ma wrote:
> improve edma driver to support little endian.
Can you explain a bit more how adding the below lines adds little endian
support...
>
> Signed-off-by: Peng Ma <[email protected]>
> ---
> drivers/dma/fsl-edma-common.c | 5 +++++
> 1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
> index 680b2a0..6bf238e 100644
> --- a/drivers/dma/fsl-edma-common.c
> +++ b/drivers/dma/fsl-edma-common.c
> @@ -83,9 +83,14 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
> u32 ch = fsl_chan->vchan.chan.chan_id;
> void __iomem *muxaddr;
> unsigned int chans_per_mux, ch_off;
> + int endian_diff[4] = {3, 1, -1, -3};
>
> chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR;
> ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
> +
> + if (!fsl_chan->edma->big_endian)
> + ch_off += endian_diff[ch_off % 4];
> +
> muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
> slot = EDMAMUX_CHCFG_SOURCE(slot);
>
> --
> 1.7.1
--
~Vinod
Hi Vinod,
Thank for you reply.
the registers (CHCFG0 - CHCFG15) on big endian socs as fallows:
CHCFG0 0x0
CHCFG1 0x1
CHCFG2 0x2
CHCFG3 0x3
......
CHCFG12 0xC
CHCFG13 0xD
CHCFG14 0xE
CHCFG15 0xF
On little endian socs as fallows:
CHCFG3 0x0
CHCFG2 0x1
CHCFG1 0x2
CHCFG0 0x3
......
CHCFG15 0xC
CHCFG14 0xD
CHCFG13 0xE
CHCFG12 0xF
To fit this map we should add this patch.
Best Regards,
Peng
>-----Original Message-----
>From: Vinod Koul <[email protected]>
>Sent: 2019??5??21?? 12:38
>To: Peng Ma <[email protected]>
>Cc: [email protected]; [email protected]; [email protected]; Leo
>Li <[email protected]>; [email protected];
>[email protected]; [email protected];
>[email protected]; [email protected]
>Subject: [EXT] Re: [PATCH 3/4] dmaengine: fsl-edma: support little endian for
>edma driver
>
>Caution: EXT Email
>
>On 06-05-19, 09:03, Peng Ma wrote:
>> improve edma driver to support little endian.
>
>Can you explain a bit more how adding the below lines adds little endian
>support...
>
>>
>> Signed-off-by: Peng Ma <[email protected]>
>> ---
>> drivers/dma/fsl-edma-common.c | 5 +++++
>> 1 files changed, 5 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/dma/fsl-edma-common.c
>> b/drivers/dma/fsl-edma-common.c index 680b2a0..6bf238e 100644
>> --- a/drivers/dma/fsl-edma-common.c
>> +++ b/drivers/dma/fsl-edma-common.c
>> @@ -83,9 +83,14 @@ void fsl_edma_chan_mux(struct fsl_edma_chan
>*fsl_chan,
>> u32 ch = fsl_chan->vchan.chan.chan_id;
>> void __iomem *muxaddr;
>> unsigned int chans_per_mux, ch_off;
>> + int endian_diff[4] = {3, 1, -1, -3};
>>
>> chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR;
>> ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
>> +
>> + if (!fsl_chan->edma->big_endian)
>> + ch_off += endian_diff[ch_off % 4];
>> +
>> muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
>> slot = EDMAMUX_CHCFG_SOURCE(slot);
>>
>> --
>> 1.7.1
>
>--
>~Vinod
On Mon, May 06, 2019 at 09:03:41AM +0000, Peng Ma wrote:
> Add the qDMA device tree nodes for LS1028A devices
>
> Signed-off-by: Peng Ma <[email protected]>
Applied, thanks.