From: Alexander Usyskin <[email protected]>
Store irq number in hw struct to by used by synchronize_irq().
This is to allow working with mei devices
embedded within another pci devices, via MFD framework,
where mei device is represented as a platform device.
Bump the copyright year to 2019 on hw-me.c and hw-me.h
Signed-off-by: Alexander Usyskin <[email protected]>
Signed-off-by: Tomas Winkler <[email protected]>
---
drivers/misc/mei/hw-me.c | 4 ++--
drivers/misc/mei/hw-me.h | 2 ++
drivers/misc/mei/pci-me.c | 1 +
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c
index 7d241c70e3e0..23606d0ddcd6 100644
--- a/drivers/misc/mei/hw-me.c
+++ b/drivers/misc/mei/hw-me.c
@@ -323,9 +323,9 @@ static void mei_me_intr_disable(struct mei_device *dev)
*/
static void mei_me_synchronize_irq(struct mei_device *dev)
{
- struct pci_dev *pdev = to_pci_dev(dev->dev);
+ struct mei_me_hw *hw = to_me_hw(dev);
- synchronize_irq(pdev->irq);
+ synchronize_irq(hw->irq);
}
/**
diff --git a/drivers/misc/mei/hw-me.h b/drivers/misc/mei/hw-me.h
index b39347faadf5..c45b32a7cc46 100644
--- a/drivers/misc/mei/hw-me.h
+++ b/drivers/misc/mei/hw-me.h
@@ -42,6 +42,7 @@ struct mei_cfg {
*
* @cfg: per device generation config and ops
* @mem_addr: io memory address
+ * @irq: irq number
* @pg_state: power gating state
* @d0i3_supported: di03 support
* @hbuf_depth: depth of hardware host/write buffer in slots
@@ -49,6 +50,7 @@ struct mei_cfg {
struct mei_me_hw {
const struct mei_cfg *cfg;
void __iomem *mem_addr;
+ int irq;
enum mei_pg_state pg_state;
bool d0i3_supported;
u8 hbuf_depth;
diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
index e382ecca96d7..6233b3ca1c1d 100644
--- a/drivers/misc/mei/pci-me.c
+++ b/drivers/misc/mei/pci-me.c
@@ -199,6 +199,7 @@ static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
}
hw = to_me_hw(dev);
hw->mem_addr = pcim_iomap_table(pdev)[0];
+ hw->irq = pdev->irq;
pci_enable_msi(pdev);
--
2.21.0