2019-11-11 06:52:38

by MarkLee

Subject: [PATCH net,v2 1/3] net: ethernet: mediatek: Integrate GDM/PSE setup operations

Integrate GDM/PSE setup operations into single function "mtk_gdm_config"

Signed-off-by: MarkLee <[email protected]>
--
v1->v2:
* Use the macro "MTK_MAC_COUNT" instead of a magic constant

---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 37 +++++++++++++--------
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 +
2 files changed, 24 insertions(+), 14 deletions(-)

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 703adb96429e..6e7a7fea2f52 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -2180,6 +2180,28 @@ static int mtk_start_dma(struct mtk_eth *eth)
return 0;
}

+static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
+{
+ int i;
+
+ for (i = 0; i < MTK_MAC_COUNT; i++) {
+ u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
+
+ /* default setup the forward port to send frame to PDMA */
+ val &= ~0xffff;
+
+ /* Enable RX checksum */
+ val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
+
+ val |= config;
+
+ mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
+ }
+ /*Reset and enable PSE*/
+ mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
+ mtk_w32(eth, 0, MTK_RST_GL);
+}
+
static int mtk_open(struct net_device *dev)
{
struct mtk_mac *mac = netdev_priv(dev);
@@ -2375,8 +2397,6 @@ static int mtk_hw_init(struct mtk_eth *eth)
mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
mtk_tx_irq_disable(eth, ~0);
mtk_rx_irq_disable(eth, ~0);
- mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
- mtk_w32(eth, 0, MTK_RST_GL);

/* FE int grouping */
mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
@@ -2385,18 +2405,7 @@ static int mtk_hw_init(struct mtk_eth *eth)
mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);

- for (i = 0; i < MTK_MAC_COUNT; i++) {
- u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
-
- /* setup the forward port to send frame to PDMA */
- val &= ~0xffff;
-
- /* Enable RX checksum */
- val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
-
- /* setup the mac dma */
- mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
- }
+ mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);

return 0;

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 76bd12cb8150..b16d8d9b196a 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -84,6 +84,7 @@
#define MTK_GDMA_ICS_EN BIT(22)
#define MTK_GDMA_TCS_EN BIT(21)
#define MTK_GDMA_UCS_EN BIT(20)
+#define MTK_GDMA_TO_PDMA 0x0

/* Unicast Filter MAC Address Register - Low */
#define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000))
--
2.17.1

2019-11-12 05:57:37

by David Miller

Subject: Re: [PATCH net,v2 1/3] net: ethernet: mediatek: Integrate GDM/PSE setup operations

From: MarkLee <[email protected]>
Date: Mon, 11 Nov 2019 14:51:27 +0800

> +static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
> +{
> + int i;
> +
> + for (i = 0; i < MTK_MAC_COUNT; i++) {
> + u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
> +
> + /* default setup the forward port to send frame to PDMA */
> + val &= ~0xffff;
> +
> + /* Enable RX checksum */
> + val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
> +
> + val |= config;
> +
> + mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
> + }
> + /*Reset and enable PSE*/

Please put spaces before and after the comment sentence, like:

/* Reset and enable PSE */

2019-11-12 07:13:25

by MarkLee

Subject: Re: [PATCH net,v2 1/3] net: ethernet: mediatek: Integrate GDM/PSE setup operations

On Mon, 2019-11-11 at 21:56 -0800, David Miller wrote:
> From: MarkLee <[email protected]>
> Date: Mon, 11 Nov 2019 14:51:27 +0800
>
> > +static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
> > +{
> > + int i;
> > +
> > + for (i = 0; i < MTK_MAC_COUNT; i++) {
> > + u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
> > +
> > + /* default setup the forward port to send frame to PDMA */
> > + val &= ~0xffff;
> > +
> > + /* Enable RX checksum */
> > + val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
> > +
> > + val |= config;
> > +
> > + mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
> > + }
> > + /*Reset and enable PSE*/
>
> Please put spaces before and after the comment sentence, like:
>
> /* Reset and enable PSE */
>
Thanks for the reminder, will correct it in the next patch.