Associate the UART nodes with the corresponding reset controller bits.
Signed-off-by: Andreas Färber <[email protected]>
---
v3: from RTD1295 reset v2
* Rebased onto r-bus
arch/arm/boot/dts/rtd1195.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index e0f133a1354f..4eec45244132 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -8,6 +8,7 @@
/memreserve/ 0x17fff000 0x00001000;
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/realtek,rtd1195.h>
/ {
compatible = "realtek,rtd1195";
@@ -134,6 +135,7 @@
reg = <0x7800 0x400>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&iso_reset RTD1195_ISO_RSTN_UR0>;
clock-frequency = <27000000>;
status = "disabled";
};
@@ -143,6 +145,7 @@
reg = <0x1b200 0x100>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&reset2 RTD1195_RSTN_UR1>;
clock-frequency = <27000000>;
status = "disabled";
};
--
2.16.4