Hello,
This series adds two IRQ muxes for the Realtek RTD1195, RTD1295 and RTD1395
SoC families.
The implementation is based on register offsets seen in the vendor DT,
split up into two separate nodes, as well as code from QNAP's rtk119x and
Synology's RTD1293/96 GPL code dumps.
v3 does various cleanups, renames variables, reworks unmask vs. enable/disable
and adds an isr/scpu_int_en map as well as full RTD1195 support.
More experimental patches at:
https://github.com/afaerber/linux/commits/rtd1295-next
Have a lot of fun!
Cheers,
Andreas
v3 -> v4:
* Drop no-op .irq_set_affinity callback (Thomas)
* Clear all interrupts (James)
* Updated SPDX-License-identifier
* Use tabular formatting (Thomas)
* Adopt different braces style (Thomas)
* Use raw_spinlock_t (Thomas)
* Shortened callback name (Thomas)
* Fixed of_iomap() error handling
* Don't mask unmapped NMIs
* Cache SCPU_INT_EN (Thomas)
* Renamed binding and source files
* Dropped UART1/UART2 TO interrupts
* Expanded commit messages
* Added RTD1395 patches
v2 -> v3:
* Rebased, adding nodes to rtd129x.dtsi instead of rtd1295.dtsi
* Adopted {readl,writel}_relaxed() (Marc)
* Adopted spin_lock_irqsave() (Marc)
* Implemented RTD1195
* Implemented mapping for non-linear bits such as i2c3
v1 -> v2:
* Rebased, avoiding dependency on reset series for DT nodes
* Don't forward set_affinity to GIC (Marc)
* Added more spinlocks (Marc)
* Code cleanups
* Investigated quirk
* Fixed spinlock initialization (Andrew)
Cc: Thomas Gleixner <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: [email protected]
Cc: Andrew Lunn <[email protected]>
Cc: Aleix Roca Nonell <[email protected]>
Cc: James Tai <[email protected]>
Andreas Färber (8):
dt-bindings: interrupt-controller: Add Realtek RTD1195/RTD1295 mux
irqchip: Add Realtek RTD1295 mux driver
arm64: dts: realtek: rtd129x: Add irq muxes and UART interrupts
irqchip: rtd1195-mux: Add RTD1195 definitions
ARM: dts: rtd1195: Add irq muxes and UART interrupts
dt-bindings: interrupt-controller: rtd1195-mux: Add RTD1395
irqchip: rtd1195-mux: Add RTD1395 definitions
arm64: dts: realtek: rtd139x: Add irq muxes and UART interrupts
.../interrupt-controller/realtek,rtd1195-mux.yaml | 55 +++
arch/arm/boot/dts/rtd1195.dtsi | 20 +
arch/arm64/boot/dts/realtek/rtd129x.dtsi | 22 +
arch/arm64/boot/dts/realtek/rtd139x.dtsi | 22 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-rtd1195-mux.c | 463 +++++++++++++++++++++
6 files changed, 583 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml
create mode 100644 drivers/irqchip/irq-rtd1195-mux.c
--
2.16.4
Add binding for Realtek RTD1295 and RTD1195 IRQ mux.
Acked-by: Rob Herring <[email protected]>
[AF: Converted to YAML schema]
Signed-off-by: Andreas Färber <[email protected]>
---
v3 -> v4:
* Squashed RTD1195
* Converted to YAML schema
* Renamed file from realtek,rtd119x-mux to realtek,rtd1195-mux
v2 -> v3:
* Renamed non-iso irq mux to "misc" for clarity
v1 -> v2:
* Dropped reference to common interrupt.txt bindings (Rob)
.../interrupt-controller/realtek,rtd1195-mux.yaml | 53 ++++++++++++++++++++++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml
new file mode 100644
index 000000000000..5cf3a28cedba
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/realtek,rtd1195-mux.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Realtek RTD1195/1295 IRQ Mux Controller
+
+maintainers:
+ - Andreas Färber <[email protected]>
+
+allOf:
+ - $ref: /schemas/interrupt-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - realtek,rtd1195-misc-irq-mux
+ - realtek,rtd1195-iso-irq-mux
+ - realtek,rtd1295-misc-irq-mux
+ - realtek,rtd1295-iso-irq-mux
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description: Specifies the interrupt line which is mux'ed.
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ interrupt-controller@98007000 {
+ compatible = "realtek,rtd1295-iso-irq-mux";
+ reg = <0x98007000 0x100>;
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+...
--
2.16.4
Add iso and misc IRQ mux DT nodes for the Realtek RTD1195 SoC.
Update the UART DT nodes with interrupts from those muxes,
so that UART0 can be used without earlycon.
Signed-off-by: Andreas Färber <[email protected]>
---
v4: New
arch/arm/boot/dts/rtd1195.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index db1171c5adfa..ee7761ae4ee0 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -118,6 +118,14 @@
#reset-cells = <1>;
};
+ iso_irq_mux: interrupt-controller@7000 {
+ compatible = "realtek,rtd1195-iso-irq-mux";
+ reg = <0x7000 0x100>;
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
iso_reset: reset-controller@7088 {
compatible = "snps,dw-low-reset";
reg = <0x7088 0x4>;
@@ -137,6 +145,8 @@
reg-io-width = <4>;
resets = <&iso_reset RTD1195_ISO_RSTN_UR0>;
clock-frequency = <27000000>;
+ interrupt-parent = <&iso_irq_mux>;
+ interrupts = <2>;
status = "disabled";
};
@@ -145,6 +155,14 @@
reg = <0x1a200 0x8>;
};
+ misc_irq_mux: interrupt-controller@1b000 {
+ compatible = "realtek,rtd1195-misc-irq-mux";
+ reg = <0x1b000 0x100>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
uart1: serial@1b200 {
compatible = "snps,dw-apb-uart";
reg = <0x1b200 0x100>;
@@ -152,6 +170,8 @@
reg-io-width = <4>;
resets = <&reset2 RTD1195_RSTN_UR1>;
clock-frequency = <27000000>;
+ interrupt-parent = <&misc_irq_mux>;
+ interrupts = <3>;
status = "disabled";
};
};
--
2.16.4
Add compatible strings for Realtek RTD1395 SoC.
Signed-off-by: Andreas Färber <[email protected]>
---
v4: New
.../devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml
index 5cf3a28cedba..7c2a31548d46 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml
@@ -19,6 +19,8 @@ properties:
- realtek,rtd1195-iso-irq-mux
- realtek,rtd1295-misc-irq-mux
- realtek,rtd1295-iso-irq-mux
+ - realtek,rtd1395-misc-irq-mux
+ - realtek,rtd1395-iso-irq-mux
reg:
maxItems: 1
--
2.16.4
Add iso and misc IRQ mux DT nodes to RTD129x SoC family.
Update the UART DT nodes with interrupts from these muxes,
so that UART0 can be used without earlycon.
Signed-off-by: Andreas Färber <[email protected]>
---
v3 -> v4:
* Rebased onto chip-info and r-bus
* Dropped schema-violating second interrupts for UART1 and UART2
v2 -> v3:
* Added nodes to rtd129x.dtsi instead of rtd1295.dtsi
* Adopted misc compatible string
* Renamed node label from irq_mux to misc_irq_mux for clarity
v1 -> v2:
* Rebased
arch/arm64/boot/dts/realtek/rtd129x.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
index 7d56c9f5d48a..188b4f256917 100644
--- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi
@@ -86,6 +86,14 @@
#reset-cells = <1>;
};
+ iso_irq_mux: interrupt-controller@7000 {
+ compatible = "realtek,rtd1295-iso-irq-mux";
+ reg = <0x7000 0x100>;
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
iso_reset: reset-controller@7088 {
compatible = "snps,dw-low-reset";
reg = <0x7088 0x4>;
@@ -105,6 +113,8 @@
reg-io-width = <4>;
clock-frequency = <27000000>;
resets = <&iso_reset RTD1295_ISO_RSTN_UR0>;
+ interrupt-parent = <&iso_irq_mux>;
+ interrupts = <2>;
status = "disabled";
};
@@ -115,6 +125,14 @@
<0x171d8 0x4>;
};
+ misc_irq_mux: interrupt-controller@1b000 {
+ compatible = "realtek,rtd1295-misc-irq-mux";
+ reg = <0x1b000 0x100>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
uart1: serial@1b200 {
compatible = "snps,dw-apb-uart";
reg = <0x1b200 0x100>;
@@ -122,6 +140,8 @@
reg-io-width = <4>;
clock-frequency = <432000000>;
resets = <&reset2 RTD1295_RSTN_UR1>;
+ interrupt-parent = <&misc_irq_mux>;
+ interrupts = <3>;
status = "disabled";
};
@@ -132,6 +152,8 @@
reg-io-width = <4>;
clock-frequency = <432000000>;
resets = <&reset2 RTD1295_RSTN_UR2>;
+ interrupt-parent = <&misc_irq_mux>;
+ interrupts = <8>;
status = "disabled";
};
};
--
2.16.4