2020-01-27 17:59:42

by Roger Pau Monne

[permalink] [raw]
Subject: [PATCH] x86/apic: simplify disconnect_bsp_APIC setup of LVT{0/1}

There's no need to read the current values of LVT{0/1} for the
purposes of the function, which seem to be to save the currently
selected vector: in the destination modes used (ExtINT and NMI) the
vector field is ignored and hence can be set to 0.

Note that clear_local_APIC as called by init_bsp_APIC would have
already wiped those registers by writing APIC_LVT_MASKED, and hence
there's nothing useful to preserve if that was the intent. Also note
that there are other places where LVT{0/1} is written to without doing
a read-modify-write (init_bsp_APIC and clear_local_APIC), so if
writing 0s to the reserved parts would cause issues they would be also
triggered by writes elsewhere.

Signed-off-by: Roger Pau Monné <[email protected]>
---
Cc: Thomas Gleixner <[email protected]>
Cc: Ingo Molnar <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: "H. Peter Anvin" <[email protected]>
Cc: [email protected]
Cc: Peter Zijlstra <[email protected]>
Cc: Tony Luck <[email protected]>
Cc: Jacob Pan <[email protected]>
Cc: Kefeng Wang <[email protected]>
Cc: Jan Beulich <[email protected]>
Cc: Sean Christopherson <[email protected]>
---
arch/x86/kernel/apic/apic.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 28446fa6bf18..ce0c65340b4c 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -2292,12 +2292,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
* For LVT0 make it edge triggered, active high,
* external and enabled
*/
- value = apic_read(APIC_LVT0);
- value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
- APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
- APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
- value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
- value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
+ value = APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING | APIC_DM_EXTINT;
apic_write(APIC_LVT0, value);
} else {
/* Disable LVT0 */
@@ -2308,12 +2303,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
* For LVT1 make it edge triggered, active high,
* nmi and enabled
*/
- value = apic_read(APIC_LVT1);
- value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
- APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
- APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
- value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
- value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_NMI);
+ value = APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING | APIC_DM_NMI;
apic_write(APIC_LVT1, value);
}

--
2.25.0


2020-02-19 12:38:31

by Roger Pau Monne

[permalink] [raw]
Subject: Re: [PATCH] x86/apic: simplify disconnect_bsp_APIC setup of LVT{0/1}

Ping?

On Mon, Jan 27, 2020 at 06:57:58PM +0100, Roger Pau Monne wrote:
> There's no need to read the current values of LVT{0/1} for the
> purposes of the function, which seem to be to save the currently
> selected vector: in the destination modes used (ExtINT and NMI) the
> vector field is ignored and hence can be set to 0.
>
> Note that clear_local_APIC as called by init_bsp_APIC would have
> already wiped those registers by writing APIC_LVT_MASKED, and hence
> there's nothing useful to preserve if that was the intent. Also note
> that there are other places where LVT{0/1} is written to without doing
> a read-modify-write (init_bsp_APIC and clear_local_APIC), so if
> writing 0s to the reserved parts would cause issues they would be also
> triggered by writes elsewhere.
>
> Signed-off-by: Roger Pau Monné <[email protected]>
> ---
> Cc: Thomas Gleixner <[email protected]>
> Cc: Ingo Molnar <[email protected]>
> Cc: Borislav Petkov <[email protected]>
> Cc: "H. Peter Anvin" <[email protected]>
> Cc: [email protected]
> Cc: Peter Zijlstra <[email protected]>
> Cc: Tony Luck <[email protected]>
> Cc: Jacob Pan <[email protected]>
> Cc: Kefeng Wang <[email protected]>
> Cc: Jan Beulich <[email protected]>
> Cc: Sean Christopherson <[email protected]>
> ---
> arch/x86/kernel/apic/apic.c | 14 ++------------
> 1 file changed, 2 insertions(+), 12 deletions(-)
>
> diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
> index 28446fa6bf18..ce0c65340b4c 100644
> --- a/arch/x86/kernel/apic/apic.c
> +++ b/arch/x86/kernel/apic/apic.c
> @@ -2292,12 +2292,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
> * For LVT0 make it edge triggered, active high,
> * external and enabled
> */
> - value = apic_read(APIC_LVT0);
> - value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
> - APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
> - APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
> - value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
> - value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
> + value = APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING | APIC_DM_EXTINT;
> apic_write(APIC_LVT0, value);
> } else {
> /* Disable LVT0 */
> @@ -2308,12 +2303,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
> * For LVT1 make it edge triggered, active high,
> * nmi and enabled
> */
> - value = apic_read(APIC_LVT1);
> - value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
> - APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
> - APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
> - value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
> - value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_NMI);
> + value = APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING | APIC_DM_NMI;
> apic_write(APIC_LVT1, value);
> }
>
> --
> 2.25.0
>

2020-03-19 18:28:11

by Roger Pau Monne

[permalink] [raw]
Subject: PING: [PATCH] x86/apic: simplify disconnect_bsp_APIC setup of LVT{0/1}

On Wed, Feb 19, 2020 at 01:36:54PM +0100, Roger Pau Monné wrote:
> Ping?

Ping x2.

Thanks.

> On Mon, Jan 27, 2020 at 06:57:58PM +0100, Roger Pau Monne wrote:
> > There's no need to read the current values of LVT{0/1} for the
> > purposes of the function, which seem to be to save the currently
> > selected vector: in the destination modes used (ExtINT and NMI) the
> > vector field is ignored and hence can be set to 0.
> >
> > Note that clear_local_APIC as called by init_bsp_APIC would have
> > already wiped those registers by writing APIC_LVT_MASKED, and hence
> > there's nothing useful to preserve if that was the intent. Also note
> > that there are other places where LVT{0/1} is written to without doing
> > a read-modify-write (init_bsp_APIC and clear_local_APIC), so if
> > writing 0s to the reserved parts would cause issues they would be also
> > triggered by writes elsewhere.
> >
> > Signed-off-by: Roger Pau Monné <[email protected]>
> > ---
> > Cc: Thomas Gleixner <[email protected]>
> > Cc: Ingo Molnar <[email protected]>
> > Cc: Borislav Petkov <[email protected]>
> > Cc: "H. Peter Anvin" <[email protected]>
> > Cc: [email protected]
> > Cc: Peter Zijlstra <[email protected]>
> > Cc: Tony Luck <[email protected]>
> > Cc: Jacob Pan <[email protected]>
> > Cc: Kefeng Wang <[email protected]>
> > Cc: Jan Beulich <[email protected]>
> > Cc: Sean Christopherson <[email protected]>
> > ---
> > arch/x86/kernel/apic/apic.c | 14 ++------------
> > 1 file changed, 2 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
> > index 28446fa6bf18..ce0c65340b4c 100644
> > --- a/arch/x86/kernel/apic/apic.c
> > +++ b/arch/x86/kernel/apic/apic.c
> > @@ -2292,12 +2292,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
> > * For LVT0 make it edge triggered, active high,
> > * external and enabled
> > */
> > - value = apic_read(APIC_LVT0);
> > - value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
> > - APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
> > - APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
> > - value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
> > - value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
> > + value = APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING | APIC_DM_EXTINT;
> > apic_write(APIC_LVT0, value);
> > } else {
> > /* Disable LVT0 */
> > @@ -2308,12 +2303,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
> > * For LVT1 make it edge triggered, active high,
> > * nmi and enabled
> > */
> > - value = apic_read(APIC_LVT1);
> > - value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
> > - APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
> > - APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
> > - value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
> > - value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_NMI);
> > + value = APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING | APIC_DM_NMI;
> > apic_write(APIC_LVT1, value);
> > }
> >
> > --
> > 2.25.0
> >