Hi all,
This series contains several fixes, cleanups, and other improvements for
the ARM TrustZone CryptoCell driver.
The first 3 patches have been sent before:
- [PATCH 0/2] Fix debugfs register access while suspended[1],
- [PATCH] [RFC] crypto: ccree - fix retry handling in
cc_send_sync_request()[2.
This is based on v5.6-rc1, with the following fixes from Gilad applied:
- [PATCH 0/4] crypto: ccree - fixes[3],
- [PATCH] crypto: ccree - dec auth tag size from cryptlen map[4].
This has been tested on R-Car H3 ES2.0.
To ease testing, I have pushed this series and its dependencies to the
topic/ccree-misc-v2 branch of my renesas-drivers repository at
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.
Thanks for your comments!
[1] https://lore.kernel.org/r/[email protected]/
[2] https://lore.kernel.org/r/[email protected]/
[3] https://lore.kernel.org/r/[email protected]/
[4] https://lore.kernel.org/r/[email protected]/
Geert Uytterhoeven (34):
debugfs: regset32: Add Runtime PM support
crypto: ccree - fix debugfs register access while suspended
crypto: ccree - fix retry handling in cc_send_sync_request()
crypto: ccree - remove unneeded casts
crypto: ccree - swap SHA384 and SHA512 larval hashes at build time
crypto: ccree - drop duplicated error message on SRAM exhaustion
crypto: ccree - remove empty cc_sram_mgr_fini()
crypto: ccree - clean up clock handling
crypto: ccree - make mlli_params.mlli_virt_addr void *
crypto: ccree - use existing helpers to split 64-bit addresses
crypto: ccree - defer larval_digest_addr init until needed
crypto: ccree - remove bogus paragraph about freeing SRAM
crypto: ccree - use u32 for SRAM addresses
crypto: ccree - simplify Runtime PM handling
crypto: ccree - use of_device_get_match_data()
crypto: ccree - remove cc_pm_is_dev_suspended() wrapper
crypto: ccree - make cc_pm_{suspend,resume}() static
crypto: ccree - remove struct cc_sram_ctx
crypto: ccree - remove struct cc_debugfs_ctx
crypto: ccree - remove struct buff_mgr_handle
crypto: ccree - remove struct cc_cipher_handle
crypto: ccree - extract cc_init_copy_sram()
crypto: ccree - remove bogus kerneldoc markers
crypto: ccree - improve kerneldoc in cc_hw_queue_defs.h
crypto: ccree - improve kerneldoc in cc_buffer_mgr.c
crypto: ccree - improve kerneldoc in cc_hash.[ch]
crypto: ccree - improve kerneldoc in cc_request_mgr.[ch]
crypto: ccree - improve kerneldoc in cc_sram_mgr.[ch]
crypto: ccree - spelling s/Crytpcell/Cryptocell/
crypto: ccree - grammar s/not room/no room/
crypto: ccree - use existing dev helper in init_cc_resources()
crypto: ccree - use devm_k[mz]alloc() for AEAD data
crypto: ccree - use devm_k[mz]alloc() for cipher data
crypto: ccree - use devm_kzalloc() for hash data
drivers/crypto/ccree/cc_aead.c | 61 +++---
drivers/crypto/ccree/cc_buffer_mgr.c | 66 +++---
drivers/crypto/ccree/cc_buffer_mgr.h | 4 +-
drivers/crypto/ccree/cc_cipher.c | 61 ++----
drivers/crypto/ccree/cc_debugfs.c | 29 +--
drivers/crypto/ccree/cc_driver.c | 127 +++++-------
drivers/crypto/ccree/cc_driver.h | 13 +-
drivers/crypto/ccree/cc_hash.c | 225 +++++++++------------
drivers/crypto/ccree/cc_hash.h | 31 ++-
drivers/crypto/ccree/cc_hw_queue_defs.h | 255 ++++++++++++------------
drivers/crypto/ccree/cc_pm.c | 60 +-----
drivers/crypto/ccree/cc_pm.h | 21 --
drivers/crypto/ccree/cc_request_mgr.c | 47 +++--
drivers/crypto/ccree/cc_request_mgr.h | 19 +-
drivers/crypto/ccree/cc_sram_mgr.c | 78 +++-----
drivers/crypto/ccree/cc_sram_mgr.h | 45 ++---
fs/debugfs/file.c | 8 +
include/linux/debugfs.h | 1 +
18 files changed, 456 insertions(+), 695 deletions(-)
--
2.17.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Miscellaneous improvements:
- Start comment blocks with "/**" to enable kerneldoc,
- Mark parameters using "@" instead of "\param",
- Fix typos in parameter names,
- Add missing function names to kerneldoc headers,
- Add missing parameter and return value descriptions.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_sram_mgr.c | 16 +++++++++++-----
drivers/crypto/ccree/cc_sram_mgr.h | 22 +++++++++++++---------
2 files changed, 24 insertions(+), 14 deletions(-)
diff --git a/drivers/crypto/ccree/cc_sram_mgr.c b/drivers/crypto/ccree/cc_sram_mgr.c
index 38f36cbc05b3cf6f..37a95856361fc52c 100644
--- a/drivers/crypto/ccree/cc_sram_mgr.c
+++ b/drivers/crypto/ccree/cc_sram_mgr.c
@@ -10,6 +10,9 @@
* Returns zero for success, negative value otherwise.
*
* @drvdata: Associated device driver context
+ *
+ * Return:
+ * 0 for success, negative error code for failure.
*/
int cc_sram_mgr_init(struct cc_drvdata *drvdata)
{
@@ -29,11 +32,14 @@ int cc_sram_mgr_init(struct cc_drvdata *drvdata)
return 0;
}
-/*!
- * Allocated buffer from SRAM pool.
+/**
+ * cc_sram_alloc() - Allocate buffer from SRAM pool.
+ *
+ * @drvdata: Associated device driver context
+ * @size: The requested numer of bytes to allocate
*
- * \param drvdata
- * \param size The requested bytes to allocate
+ * Return:
+ * Address offset in SRAM or NULL_SRAM_ADDR for failure.
*/
u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
{
@@ -64,7 +70,7 @@ u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
*
* @src: A pointer to array of words to set as consts.
* @dst: The target SRAM buffer to set into
- * @nelements: The number of words in "src" array
+ * @nelement: The number of words in "src" array
* @seq: A pointer to the given IN/OUT descriptor sequence
* @seq_len: A pointer to the given IN/OUT sequence length
*/
diff --git a/drivers/crypto/ccree/cc_sram_mgr.h b/drivers/crypto/ccree/cc_sram_mgr.h
index 04a857259d4148eb..1c965ef83002a631 100644
--- a/drivers/crypto/ccree/cc_sram_mgr.h
+++ b/drivers/crypto/ccree/cc_sram_mgr.h
@@ -12,22 +12,26 @@ struct cc_drvdata;
#define NULL_SRAM_ADDR ((u32)-1)
-/*!
- * Initializes SRAM pool.
+/**
+ * cc_sram_mgr_init() - Initializes SRAM pool.
* The first X bytes of SRAM are reserved for ROM usage, hence, pool
* starts right after X bytes.
*
- * \param drvdata
+ * @drvdata: Associated device driver context
*
- * \return int Zero for success, negative value otherwise.
+ * Return:
+ * Zero for success, negative value otherwise.
*/
int cc_sram_mgr_init(struct cc_drvdata *drvdata);
-/*!
- * Allocate buffer from SRAM pool.
+/**
+ * cc_sram_alloc() - Allocate buffer from SRAM pool.
+ *
+ * @drvdata: Associated device driver context
+ * @size: The requested bytes to allocate
*
- * \param drvdata
- * \param size The requested bytes to allocate
+ * Return:
+ * Address offset in SRAM or NULL_SRAM_ADDR for failure.
*/
u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size);
@@ -38,7 +42,7 @@ u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size);
*
* @src: A pointer to array of words to set as consts.
* @dst: The target SRAM buffer to set into
- * @nelements: The number of words in "src" array
+ * @nelement: The number of words in "src" array
* @seq: A pointer to the given IN/OUT descriptor sequence
* @seq_len: A pointer to the given IN/OUT sequence length
*/
--
2.17.1
The cc_cipher_handle structure contains only a single member, and only
one instance exists. Simplify the code and reduce memory consumption by
moving this member to struct cc_drvdata.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_cipher.c | 33 ++++++++------------------------
drivers/crypto/ccree/cc_driver.h | 2 +-
2 files changed, 9 insertions(+), 26 deletions(-)
diff --git a/drivers/crypto/ccree/cc_cipher.c b/drivers/crypto/ccree/cc_cipher.c
index 1c7ced65008bc311..a1430d669a584a85 100644
--- a/drivers/crypto/ccree/cc_cipher.c
+++ b/drivers/crypto/ccree/cc_cipher.c
@@ -20,10 +20,6 @@
#define template_skcipher template_u.skcipher
-struct cc_cipher_handle {
- struct list_head alg_list;
-};
-
struct cc_user_key_info {
u8 *key;
dma_addr_t key_dma_addr;
@@ -1669,36 +1665,24 @@ static struct cc_crypto_alg *cc_create_alg(const struct cc_alg_template *tmpl,
int cc_cipher_free(struct cc_drvdata *drvdata)
{
struct cc_crypto_alg *t_alg, *n;
- struct cc_cipher_handle *cipher_handle = drvdata->cipher_handle;
-
- if (cipher_handle) {
- /* Remove registered algs */
- list_for_each_entry_safe(t_alg, n, &cipher_handle->alg_list,
- entry) {
- crypto_unregister_skcipher(&t_alg->skcipher_alg);
- list_del(&t_alg->entry);
- kfree(t_alg);
- }
- kfree(cipher_handle);
- drvdata->cipher_handle = NULL;
+
+ /* Remove registered algs */
+ list_for_each_entry_safe(t_alg, n, &drvdata->alg_list, entry) {
+ crypto_unregister_skcipher(&t_alg->skcipher_alg);
+ list_del(&t_alg->entry);
+ kfree(t_alg);
}
return 0;
}
int cc_cipher_alloc(struct cc_drvdata *drvdata)
{
- struct cc_cipher_handle *cipher_handle;
struct cc_crypto_alg *t_alg;
struct device *dev = drvdata_to_dev(drvdata);
int rc = -ENOMEM;
int alg;
- cipher_handle = kmalloc(sizeof(*cipher_handle), GFP_KERNEL);
- if (!cipher_handle)
- return -ENOMEM;
-
- INIT_LIST_HEAD(&cipher_handle->alg_list);
- drvdata->cipher_handle = cipher_handle;
+ INIT_LIST_HEAD(&drvdata->alg_list);
/* Linux crypto */
dev_dbg(dev, "Number of algorithms = %zu\n",
@@ -1730,8 +1714,7 @@ int cc_cipher_alloc(struct cc_drvdata *drvdata)
kfree(t_alg);
goto fail0;
} else {
- list_add_tail(&t_alg->entry,
- &cipher_handle->alg_list);
+ list_add_tail(&t_alg->entry, &drvdata->alg_list);
dev_dbg(dev, "Registered %s\n",
t_alg->skcipher_alg.base.cra_driver_name);
}
diff --git a/drivers/crypto/ccree/cc_driver.h b/drivers/crypto/ccree/cc_driver.h
index 4895f124d2b83fb1..4790eb5cb8bdac3c 100644
--- a/drivers/crypto/ccree/cc_driver.h
+++ b/drivers/crypto/ccree/cc_driver.h
@@ -141,7 +141,7 @@ struct cc_drvdata {
struct platform_device *plat_dev;
u32 mlli_sram_addr;
struct dma_pool *mlli_buffs_pool;
- void *cipher_handle;
+ struct list_head alg_list;
void *hash_handle;
void *aead_handle;
void *request_mgr_handle;
--
2.17.1
Due to the way the hardware works, every double word in the SHA384 and
SHA512 larval hashes must be swapped. Currently this is done at run
time, during driver initialization.
However, this swapping can easily be done at build time. Treating each
double word as two words has the benefit of changing the larval hashes'
types from u64[] to u32[], like for all other hashes, and allows
dropping the casts and size doublings when calling cc_set_sram_desc().
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_driver.c | 1 -
drivers/crypto/ccree/cc_hash.c | 49 +++++++++++---------------------
drivers/crypto/ccree/cc_hash.h | 2 --
3 files changed, 17 insertions(+), 35 deletions(-)
diff --git a/drivers/crypto/ccree/cc_driver.c b/drivers/crypto/ccree/cc_driver.c
index 532bc95a83736f94..fc34d152f42090fc 100644
--- a/drivers/crypto/ccree/cc_driver.c
+++ b/drivers/crypto/ccree/cc_driver.c
@@ -653,7 +653,6 @@ static struct platform_driver ccree_driver = {
static int __init ccree_init(void)
{
- cc_hash_global_init();
cc_debugfs_global_init();
return platform_driver_register(&ccree_driver);
diff --git a/drivers/crypto/ccree/cc_hash.c b/drivers/crypto/ccree/cc_hash.c
index 36ce015716c317df..c3146f550268e7ab 100644
--- a/drivers/crypto/ccree/cc_hash.c
+++ b/drivers/crypto/ccree/cc_hash.c
@@ -39,12 +39,19 @@ static const u32 cc_sha256_init[] = {
SHA256_H3, SHA256_H2, SHA256_H1, SHA256_H0 };
static const u32 cc_digest_len_sha512_init[] = {
0x00000080, 0x00000000, 0x00000000, 0x00000000 };
-static u64 cc_sha384_init[] = {
- SHA384_H7, SHA384_H6, SHA384_H5, SHA384_H4,
- SHA384_H3, SHA384_H2, SHA384_H1, SHA384_H0 };
-static u64 cc_sha512_init[] = {
- SHA512_H7, SHA512_H6, SHA512_H5, SHA512_H4,
- SHA512_H3, SHA512_H2, SHA512_H1, SHA512_H0 };
+
+/*
+ * Due to the way the HW works, every double word in the SHA384 and SHA512
+ * larval hashes must be stored in hi/lo order
+ */
+#define hilo(x) upper_32_bits(x), lower_32_bits(x)
+static const u32 cc_sha384_init[] = {
+ hilo(SHA384_H7), hilo(SHA384_H6), hilo(SHA384_H5), hilo(SHA384_H4),
+ hilo(SHA384_H3), hilo(SHA384_H2), hilo(SHA384_H1), hilo(SHA384_H0) };
+static const u32 cc_sha512_init[] = {
+ hilo(SHA512_H7), hilo(SHA512_H6), hilo(SHA512_H5), hilo(SHA512_H4),
+ hilo(SHA512_H3), hilo(SHA512_H2), hilo(SHA512_H1), hilo(SHA512_H0) };
+
static const u32 cc_sm3_init[] = {
SM3_IVH, SM3_IVG, SM3_IVF, SM3_IVE,
SM3_IVD, SM3_IVC, SM3_IVB, SM3_IVA };
@@ -1942,8 +1949,8 @@ int cc_init_hash_sram(struct cc_drvdata *drvdata)
}
if (large_sha_supported) {
- cc_set_sram_desc((u32 *)cc_sha384_init, sram_buff_ofs,
- (ARRAY_SIZE(cc_sha384_init) * 2), larval_seq,
+ cc_set_sram_desc(cc_sha384_init, sram_buff_ofs,
+ ARRAY_SIZE(cc_sha384_init), larval_seq,
&larval_seq_len);
rc = send_request_init(drvdata, larval_seq, larval_seq_len);
if (rc)
@@ -1951,8 +1958,8 @@ int cc_init_hash_sram(struct cc_drvdata *drvdata)
sram_buff_ofs += sizeof(cc_sha384_init);
larval_seq_len = 0;
- cc_set_sram_desc((u32 *)cc_sha512_init, sram_buff_ofs,
- (ARRAY_SIZE(cc_sha512_init) * 2), larval_seq,
+ cc_set_sram_desc(cc_sha512_init, sram_buff_ofs,
+ ARRAY_SIZE(cc_sha512_init), larval_seq,
&larval_seq_len);
rc = send_request_init(drvdata, larval_seq, larval_seq_len);
if (rc)
@@ -1963,28 +1970,6 @@ int cc_init_hash_sram(struct cc_drvdata *drvdata)
return rc;
}
-static void __init cc_swap_dwords(u32 *buf, unsigned long size)
-{
- int i;
- u32 tmp;
-
- for (i = 0; i < size; i += 2) {
- tmp = buf[i];
- buf[i] = buf[i + 1];
- buf[i + 1] = tmp;
- }
-}
-
-/*
- * Due to the way the HW works we need to swap every
- * double word in the SHA384 and SHA512 larval hashes
- */
-void __init cc_hash_global_init(void)
-{
- cc_swap_dwords((u32 *)&cc_sha384_init, (ARRAY_SIZE(cc_sha384_init) * 2));
- cc_swap_dwords((u32 *)&cc_sha512_init, (ARRAY_SIZE(cc_sha512_init) * 2));
-}
-
int cc_hash_alloc(struct cc_drvdata *drvdata)
{
struct cc_hash_handle *hash_handle;
diff --git a/drivers/crypto/ccree/cc_hash.h b/drivers/crypto/ccree/cc_hash.h
index 0d6dc61484d79bc8..3dbd0abefea0546c 100644
--- a/drivers/crypto/ccree/cc_hash.h
+++ b/drivers/crypto/ccree/cc_hash.h
@@ -104,6 +104,4 @@ cc_digest_len_addr(void *drvdata, u32 mode);
*/
cc_sram_addr_t cc_larval_digest_addr(void *drvdata, u32 mode);
-void cc_hash_global_init(void);
-
#endif /*__CC_HASH_H__*/
--
2.17.1
The cc_sram_ctx structure contains only a single member, and only one
instance exists. Simplify the code and reduce memory consumption by
moving this member to struct cc_drvdata.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_driver.h | 2 +-
drivers/crypto/ccree/cc_sram_mgr.c | 27 +++++----------------------
2 files changed, 6 insertions(+), 23 deletions(-)
diff --git a/drivers/crypto/ccree/cc_driver.h b/drivers/crypto/ccree/cc_driver.h
index 9e94a29d84ae61f1..7e483c22858245f9 100644
--- a/drivers/crypto/ccree/cc_driver.h
+++ b/drivers/crypto/ccree/cc_driver.h
@@ -146,7 +146,7 @@ struct cc_drvdata {
void *aead_handle;
void *request_mgr_handle;
void *fips_handle;
- void *sram_mgr_handle;
+ u32 sram_free_offset; /* offset to non-allocated area in SRAM */
void *debugfs;
struct clk *clk;
bool coherent;
diff --git a/drivers/crypto/ccree/cc_sram_mgr.c b/drivers/crypto/ccree/cc_sram_mgr.c
index d46aad7c8140acaa..38f36cbc05b3cf6f 100644
--- a/drivers/crypto/ccree/cc_sram_mgr.c
+++ b/drivers/crypto/ccree/cc_sram_mgr.c
@@ -4,14 +4,6 @@
#include "cc_driver.h"
#include "cc_sram_mgr.h"
-/**
- * struct cc_sram_ctx -Internal RAM context manager
- * @sram_free_offset: the offset to the non-allocated area
- */
-struct cc_sram_ctx {
- u32 sram_free_offset;
-};
-
/**
* cc_sram_mgr_init() - Initializes SRAM pool.
* The pool starts right at the beginning of SRAM.
@@ -21,7 +13,6 @@ struct cc_sram_ctx {
*/
int cc_sram_mgr_init(struct cc_drvdata *drvdata)
{
- struct cc_sram_ctx *ctx;
u32 start = 0;
struct device *dev = drvdata_to_dev(drvdata);
@@ -34,14 +25,7 @@ int cc_sram_mgr_init(struct cc_drvdata *drvdata)
}
}
- /* Allocate "this" context */
- ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
- if (!ctx)
- return -ENOMEM;
-
- ctx->sram_free_offset = start;
- drvdata->sram_mgr_handle = ctx;
-
+ drvdata->sram_free_offset = start;
return 0;
}
@@ -53,7 +37,6 @@ int cc_sram_mgr_init(struct cc_drvdata *drvdata)
*/
u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
{
- struct cc_sram_ctx *smgr_ctx = drvdata->sram_mgr_handle;
struct device *dev = drvdata_to_dev(drvdata);
u32 p;
@@ -62,14 +45,14 @@ u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
size);
return NULL_SRAM_ADDR;
}
- if (size > (CC_CC_SRAM_SIZE - smgr_ctx->sram_free_offset)) {
+ if (size > (CC_CC_SRAM_SIZE - drvdata->sram_free_offset)) {
dev_err(dev, "Not enough space to allocate %u B (at offset %u)\n",
- size, smgr_ctx->sram_free_offset);
+ size, drvdata->sram_free_offset);
return NULL_SRAM_ADDR;
}
- p = smgr_ctx->sram_free_offset;
- smgr_ctx->sram_free_offset += size;
+ p = drvdata->sram_free_offset;
+ drvdata->sram_free_offset += size;
dev_dbg(dev, "Allocated %u B @ %u\n", size, p);
return p;
}
--
2.17.1
As the lifetime of the hash data matches the lifetime of the driver,
hash data can be allocated using the managed allocators.
While at it, simplify cc_hash_free() by removing an unneeded check
(hash_handle is always valid here).
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_hash.c | 24 ++++++++----------------
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/crypto/ccree/cc_hash.c b/drivers/crypto/ccree/cc_hash.c
index 2ca5532c07a2e2f4..0c32aa2e6801ed7f 100644
--- a/drivers/crypto/ccree/cc_hash.c
+++ b/drivers/crypto/ccree/cc_hash.c
@@ -1828,7 +1828,7 @@ static struct cc_hash_alg *cc_alloc_hash_alg(struct cc_hash_template *template,
struct crypto_alg *alg;
struct ahash_alg *halg;
- t_crypto_alg = kzalloc(sizeof(*t_crypto_alg), GFP_KERNEL);
+ t_crypto_alg = devm_kzalloc(dev, sizeof(*t_crypto_alg), GFP_KERNEL);
if (!t_crypto_alg)
return ERR_PTR(-ENOMEM);
@@ -1961,7 +1961,7 @@ int cc_hash_alloc(struct cc_drvdata *drvdata)
int rc = 0;
int alg;
- hash_handle = kzalloc(sizeof(*hash_handle), GFP_KERNEL);
+ hash_handle = devm_kzalloc(dev, sizeof(*hash_handle), GFP_KERNEL);
if (!hash_handle)
return -ENOMEM;
@@ -2022,7 +2022,6 @@ int cc_hash_alloc(struct cc_drvdata *drvdata)
if (rc) {
dev_err(dev, "%s alg registration failed\n",
driver_hash[alg].driver_name);
- kfree(t_alg);
goto fail;
}
@@ -2046,7 +2045,6 @@ int cc_hash_alloc(struct cc_drvdata *drvdata)
if (rc) {
dev_err(dev, "%s alg registration failed\n",
driver_hash[alg].driver_name);
- kfree(t_alg);
goto fail;
}
@@ -2056,8 +2054,7 @@ int cc_hash_alloc(struct cc_drvdata *drvdata)
return 0;
fail:
- kfree(drvdata->hash_handle);
- drvdata->hash_handle = NULL;
+ cc_hash_free(drvdata);
return rc;
}
@@ -2066,17 +2063,12 @@ int cc_hash_free(struct cc_drvdata *drvdata)
struct cc_hash_alg *t_hash_alg, *hash_n;
struct cc_hash_handle *hash_handle = drvdata->hash_handle;
- if (hash_handle) {
- list_for_each_entry_safe(t_hash_alg, hash_n,
- &hash_handle->hash_list, entry) {
- crypto_unregister_ahash(&t_hash_alg->ahash_alg);
- list_del(&t_hash_alg->entry);
- kfree(t_hash_alg);
- }
-
- kfree(hash_handle);
- drvdata->hash_handle = NULL;
+ list_for_each_entry_safe(t_hash_alg, hash_n, &hash_handle->hash_list,
+ entry) {
+ crypto_unregister_ahash(&t_hash_alg->ahash_alg);
+ list_del(&t_hash_alg->entry);
}
+
return 0;
}
--
2.17.1
Miscellaneous improvements:
- Start comment blocks with "/**" to enable kerneldoc,
- Mark parameters using "@" instead of "\param",
- Add missing function names to kerneldoc headers,
- Add missing parameter descriptions.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_hash.c | 11 ++++++-----
drivers/crypto/ccree/cc_hash.h | 24 ++++++++++++------------
2 files changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/crypto/ccree/cc_hash.c b/drivers/crypto/ccree/cc_hash.c
index f3adc1ab0e01abec..738f0debee98ebf1 100644
--- a/drivers/crypto/ccree/cc_hash.c
+++ b/drivers/crypto/ccree/cc_hash.c
@@ -2238,14 +2238,15 @@ static const void *cc_larval_digest(struct device *dev, u32 mode)
}
}
-/*!
- * Gets the address of the initial digest in SRAM
+/**
+ * cc_larval_digest_addr() - Get the address of the initial digest in SRAM
* according to the given hash mode
*
- * \param drvdata
- * \param mode The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256
+ * @drvdata: Associated device driver context
+ * @mode: The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256
*
- * \return u32 The address of the initial digest in SRAM
+ * Return:
+ * The address of the initial digest in SRAM
*/
u32 cc_larval_digest_addr(void *drvdata, u32 mode)
{
diff --git a/drivers/crypto/ccree/cc_hash.h b/drivers/crypto/ccree/cc_hash.h
index d76ecae996ca3fa0..3d0f2179e07ec1ce 100644
--- a/drivers/crypto/ccree/cc_hash.h
+++ b/drivers/crypto/ccree/cc_hash.h
@@ -80,26 +80,26 @@ int cc_hash_alloc(struct cc_drvdata *drvdata);
int cc_init_hash_sram(struct cc_drvdata *drvdata);
int cc_hash_free(struct cc_drvdata *drvdata);
-/*!
- * Gets the initial digest length
+/**
+ * cc_digest_len_addr() - Gets the initial digest length
*
- * \param drvdata
- * \param mode The Hash mode. Supported modes:
- * MD5/SHA1/SHA224/SHA256/SHA384/SHA512
+ * @drvdata: Associated device driver context
+ * @mode: The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256/SHA384/SHA512
*
- * \return u32 returns the address of the initial digest length in SRAM
+ * Return:
+ * Returns the address of the initial digest length in SRAM
*/
u32 cc_digest_len_addr(void *drvdata, u32 mode);
-/*!
- * Gets the address of the initial digest in SRAM
+/**
+ * cc_larval_digest_addr() - Gets the address of the initial digest in SRAM
* according to the given hash mode
*
- * \param drvdata
- * \param mode The Hash mode. Supported modes:
- * MD5/SHA1/SHA224/SHA256/SHA384/SHA512
+ * @drvdata: Associated device driver context
+ * @mode: The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256/SHA384/SHA512
*
- * \return u32 The address of the initial digest in SRAM
+ * Return:
+ * The address of the initial digest in SRAM
*/
u32 cc_larval_digest_addr(void *drvdata, u32 mode);
--
2.17.1
While the larval digest addresses are not always used in
cc_get_plain_hmac_key() and cc_hash_digest(), they are always
calculated.
Defer their calculations to the points where needed.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_aead.c | 4 +++-
drivers/crypto/ccree/cc_hash.c | 5 +++--
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/ccree/cc_aead.c b/drivers/crypto/ccree/cc_aead.c
index db89144ce6c5e974..d1e7e82b9a40f8ff 100644
--- a/drivers/crypto/ccree/cc_aead.c
+++ b/drivers/crypto/ccree/cc_aead.c
@@ -417,7 +417,7 @@ static int cc_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *authkey,
dma_addr_t key_dma_addr = 0;
struct cc_aead_ctx *ctx = crypto_aead_ctx(tfm);
struct device *dev = drvdata_to_dev(ctx->drvdata);
- u32 larval_addr = cc_larval_digest_addr(ctx->drvdata, ctx->auth_mode);
+ u32 larval_addr;
struct cc_crypto_req cc_req = {};
unsigned int blocksize;
unsigned int digestsize;
@@ -459,6 +459,8 @@ static int cc_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *authkey,
/* Load hash initial state */
hw_desc_init(&desc[idx]);
set_cipher_mode(&desc[idx], hashmode);
+ larval_addr = cc_larval_digest_addr(ctx->drvdata,
+ ctx->auth_mode);
set_din_sram(&desc[idx], larval_addr, digestsize);
set_flow_mode(&desc[idx], S_DIN_to_HASH);
set_setup_mode(&desc[idx], SETUP_LOAD_STATE0);
diff --git a/drivers/crypto/ccree/cc_hash.c b/drivers/crypto/ccree/cc_hash.c
index defeb35a16a626ff..cebbe2f08f606bf3 100644
--- a/drivers/crypto/ccree/cc_hash.c
+++ b/drivers/crypto/ccree/cc_hash.c
@@ -429,8 +429,7 @@ static int cc_hash_digest(struct ahash_request *req)
bool is_hmac = ctx->is_hmac;
struct cc_crypto_req cc_req = {};
struct cc_hw_desc desc[CC_MAX_HASH_SEQ_LEN];
- cc_sram_addr_t larval_digest_addr =
- cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode);
+ cc_sram_addr_t larval_digest_addr;
int idx = 0;
int rc = 0;
gfp_t flags = cc_gfp_flags(&req->base);
@@ -472,6 +471,8 @@ static int cc_hash_digest(struct ahash_request *req)
set_din_type(&desc[idx], DMA_DLLI, state->digest_buff_dma_addr,
ctx->inter_digestsize, NS_BIT);
} else {
+ larval_digest_addr = cc_larval_digest_addr(ctx->drvdata,
+ ctx->hash_mode);
set_din_sram(&desc[idx], larval_digest_addr,
ctx->inter_digestsize);
}
--
2.17.1
If the driver is probed, it means a match was found in
arm_ccree_dev_of_match[]. Hence we can just use the
of_device_get_match_data() helper.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_driver.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/crypto/ccree/cc_driver.c b/drivers/crypto/ccree/cc_driver.c
index c7e44f212d4b0ac5..e365ede32cc0e6a0 100644
--- a/drivers/crypto/ccree/cc_driver.c
+++ b/drivers/crypto/ccree/cc_driver.c
@@ -14,6 +14,7 @@
#include <linux/of.h>
#include <linux/clk.h>
#include <linux/of_address.h>
+#include <linux/of_device.h>
#include <linux/pm_runtime.h>
#include "cc_driver.h"
@@ -270,7 +271,6 @@ static int init_cc_resources(struct platform_device *plat_dev)
u32 val, hw_rev_pidr, sig_cidr;
u64 dma_mask;
const struct cc_hw_data *hw_rev;
- const struct of_device_id *dev_id;
struct clk *clk;
int irq;
int rc = 0;
@@ -279,11 +279,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
if (!new_drvdata)
return -ENOMEM;
- dev_id = of_match_node(arm_ccree_dev_of_match, np);
- if (!dev_id)
- return -ENODEV;
-
- hw_rev = (struct cc_hw_data *)dev_id->data;
+ hw_rev = of_device_get_match_data(dev);
new_drvdata->hw_rev_name = hw_rev->name;
new_drvdata->hw_rev = hw_rev->rev;
new_drvdata->std_bodies = hw_rev->std_bodies;
--
2.17.1
cc_sram_mgr_fini() doesn't do anything, so it can just be removed.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_driver.c | 7 ++-----
drivers/crypto/ccree/cc_sram_mgr.c | 10 ----------
drivers/crypto/ccree/cc_sram_mgr.h | 7 -------
3 files changed, 2 insertions(+), 22 deletions(-)
diff --git a/drivers/crypto/ccree/cc_driver.c b/drivers/crypto/ccree/cc_driver.c
index 599936a0b0a2cc63..f8aba89e48730e4d 100644
--- a/drivers/crypto/ccree/cc_driver.c
+++ b/drivers/crypto/ccree/cc_driver.c
@@ -478,13 +478,13 @@ static int init_cc_resources(struct platform_device *plat_dev)
cc_sram_alloc(new_drvdata, MAX_MLLI_BUFF_SIZE);
if (new_drvdata->mlli_sram_addr == NULL_SRAM_ADDR) {
rc = -ENOMEM;
- goto post_sram_mgr_err;
+ goto post_fips_init_err;
}
rc = cc_req_mgr_init(new_drvdata);
if (rc) {
dev_err(dev, "cc_req_mgr_init failed\n");
- goto post_sram_mgr_err;
+ goto post_fips_init_err;
}
rc = cc_buffer_mgr_init(new_drvdata);
@@ -538,8 +538,6 @@ static int init_cc_resources(struct platform_device *plat_dev)
cc_buffer_mgr_fini(new_drvdata);
post_req_mgr_err:
cc_req_mgr_fini(new_drvdata);
-post_sram_mgr_err:
- cc_sram_mgr_fini(new_drvdata);
post_fips_init_err:
cc_fips_fini(new_drvdata);
post_debugfs_err:
@@ -568,7 +566,6 @@ static void cleanup_cc_resources(struct platform_device *plat_dev)
cc_pm_fini(drvdata);
cc_buffer_mgr_fini(drvdata);
cc_req_mgr_fini(drvdata);
- cc_sram_mgr_fini(drvdata);
cc_fips_fini(drvdata);
cc_debugfs_fini(drvdata);
fini_cc_regs(drvdata);
diff --git a/drivers/crypto/ccree/cc_sram_mgr.c b/drivers/crypto/ccree/cc_sram_mgr.c
index 62c885e6e791cfe1..a3c13b37adce4641 100644
--- a/drivers/crypto/ccree/cc_sram_mgr.c
+++ b/drivers/crypto/ccree/cc_sram_mgr.c
@@ -12,16 +12,6 @@ struct cc_sram_ctx {
cc_sram_addr_t sram_free_offset;
};
-/**
- * cc_sram_mgr_fini() - Cleanup SRAM pool.
- *
- * @drvdata: Associated device driver context
- */
-void cc_sram_mgr_fini(struct cc_drvdata *drvdata)
-{
- /* Nothing needed */
-}
-
/**
* cc_sram_mgr_init() - Initializes SRAM pool.
* The pool starts right at the beginning of SRAM.
diff --git a/drivers/crypto/ccree/cc_sram_mgr.h b/drivers/crypto/ccree/cc_sram_mgr.h
index 1d14de9ee8c344ba..971029b0e2a16c36 100644
--- a/drivers/crypto/ccree/cc_sram_mgr.h
+++ b/drivers/crypto/ccree/cc_sram_mgr.h
@@ -29,13 +29,6 @@ typedef u64 cc_sram_addr_t;
*/
int cc_sram_mgr_init(struct cc_drvdata *drvdata);
-/*!
- * Uninits SRAM pool.
- *
- * \param drvdata
- */
-void cc_sram_mgr_fini(struct cc_drvdata *drvdata);
-
/*!
* Allocated buffer from SRAM pool.
* Note: Caller is responsible to free the LAST allocated buffer.
--
2.17.1
Use devm_clk_get_optional() instead of devm_clk_get() and explicit
optional clock handling.
As clk_prepare_enable() and clk_disable_unprepare() handle optional
clocks fine, the cc_clk_on() and cc_clk_off() wrappers can be removed.
While at it, use the new "%pe" format specifier to print error codes.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_driver.c | 55 ++++++--------------------------
drivers/crypto/ccree/cc_driver.h | 2 --
drivers/crypto/ccree/cc_pm.c | 4 +--
3 files changed, 11 insertions(+), 50 deletions(-)
diff --git a/drivers/crypto/ccree/cc_driver.c b/drivers/crypto/ccree/cc_driver.c
index f8aba89e48730e4d..a7b7f65939e2f620 100644
--- a/drivers/crypto/ccree/cc_driver.c
+++ b/drivers/crypto/ccree/cc_driver.c
@@ -302,22 +302,12 @@ static int init_cc_resources(struct platform_device *plat_dev)
platform_set_drvdata(plat_dev, new_drvdata);
new_drvdata->plat_dev = plat_dev;
- clk = devm_clk_get(dev, NULL);
- if (IS_ERR(clk))
- switch (PTR_ERR(clk)) {
- /* Clock is optional so this might be fine */
- case -ENOENT:
- break;
-
- /* Clock not available, let's try again soon */
- case -EPROBE_DEFER:
- return -EPROBE_DEFER;
-
- default:
- dev_err(dev, "Error getting clock: %ld\n",
- PTR_ERR(clk));
- return PTR_ERR(clk);
- }
+ clk = devm_clk_get_optional(dev, NULL);
+ if (IS_ERR(clk)) {
+ if (PTR_ERR(clk) != -EPROBE_DEFER)
+ dev_err(dev, "Error getting clock: %pe\n", clk);
+ return PTR_ERR(clk);
+ }
new_drvdata->clk = clk;
new_drvdata->coherent = of_dma_is_coherent(np);
@@ -362,7 +352,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
return rc;
}
- rc = cc_clk_on(new_drvdata);
+ rc = clk_prepare_enable(new_drvdata->clk);
if (rc) {
dev_err(dev, "Failed to enable clock");
return rc;
@@ -545,7 +535,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
post_regs_err:
fini_cc_regs(new_drvdata);
post_clk_err:
- cc_clk_off(new_drvdata);
+ clk_disable_unprepare(new_drvdata->clk);
return rc;
}
@@ -569,23 +559,7 @@ static void cleanup_cc_resources(struct platform_device *plat_dev)
cc_fips_fini(drvdata);
cc_debugfs_fini(drvdata);
fini_cc_regs(drvdata);
- cc_clk_off(drvdata);
-}
-
-int cc_clk_on(struct cc_drvdata *drvdata)
-{
- struct clk *clk = drvdata->clk;
- int rc;
-
- if (IS_ERR(clk))
- /* Not all devices have a clock associated with CCREE */
- return 0;
-
- rc = clk_prepare_enable(clk);
- if (rc)
- return rc;
-
- return 0;
+ clk_disable_unprepare(drvdata->clk);
}
unsigned int cc_get_default_hash_len(struct cc_drvdata *drvdata)
@@ -596,17 +570,6 @@ unsigned int cc_get_default_hash_len(struct cc_drvdata *drvdata)
return HASH_LEN_SIZE_630;
}
-void cc_clk_off(struct cc_drvdata *drvdata)
-{
- struct clk *clk = drvdata->clk;
-
- if (IS_ERR(clk))
- /* Not all devices have a clock associated with CCREE */
- return;
-
- clk_disable_unprepare(clk);
-}
-
static int ccree_probe(struct platform_device *plat_dev)
{
int rc;
diff --git a/drivers/crypto/ccree/cc_driver.h b/drivers/crypto/ccree/cc_driver.h
index c227718ba9923472..b983e721f2f758fe 100644
--- a/drivers/crypto/ccree/cc_driver.h
+++ b/drivers/crypto/ccree/cc_driver.h
@@ -212,8 +212,6 @@ static inline void dump_byte_array(const char *name, const u8 *the_array,
bool cc_wait_for_reset_completion(struct cc_drvdata *drvdata);
int init_cc_regs(struct cc_drvdata *drvdata, bool is_probe);
void fini_cc_regs(struct cc_drvdata *drvdata);
-int cc_clk_on(struct cc_drvdata *drvdata);
-void cc_clk_off(struct cc_drvdata *drvdata);
unsigned int cc_get_default_hash_len(struct cc_drvdata *drvdata);
static inline void cc_iowrite(struct cc_drvdata *drvdata, u32 reg, u32 val)
diff --git a/drivers/crypto/ccree/cc_pm.c b/drivers/crypto/ccree/cc_pm.c
index 24c368b866f6b5ea..81376173c3ecf48f 100644
--- a/drivers/crypto/ccree/cc_pm.c
+++ b/drivers/crypto/ccree/cc_pm.c
@@ -26,7 +26,7 @@ int cc_pm_suspend(struct device *dev)
dev_dbg(dev, "set HOST_POWER_DOWN_EN\n");
fini_cc_regs(drvdata);
cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_ENABLE);
- cc_clk_off(drvdata);
+ clk_disable_unprepare(drvdata->clk);
return 0;
}
@@ -37,7 +37,7 @@ int cc_pm_resume(struct device *dev)
dev_dbg(dev, "unset HOST_POWER_DOWN_EN\n");
/* Enables the device source clk */
- rc = cc_clk_on(drvdata);
+ rc = clk_prepare_enable(drvdata->clk);
if (rc) {
dev_err(dev, "failed getting clock back on. We're toast.\n");
return rc;
--
2.17.1
Normal comments should start with "/*".
"/**" is reserver for kerneldoc.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_aead.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/ccree/cc_aead.c b/drivers/crypto/ccree/cc_aead.c
index 78afa753b44f2dba..be26aaf75e1fe9ea 100644
--- a/drivers/crypto/ccree/cc_aead.c
+++ b/drivers/crypto/ccree/cc_aead.c
@@ -1223,7 +1223,7 @@ static void cc_hmac_authenc(struct aead_request *req, struct cc_hw_desc desc[],
req_ctx->is_single_pass);
if (req_ctx->is_single_pass) {
- /**
+ /*
* Single-pass flow
*/
cc_set_hmac_desc(req, desc, seq_size);
@@ -1235,7 +1235,7 @@ static void cc_hmac_authenc(struct aead_request *req, struct cc_hw_desc desc[],
return;
}
- /**
+ /*
* Double-pass flow
* Fallback for unsupported single-pass modes,
* i.e. using assoc. data of non-word-multiple
@@ -1276,7 +1276,7 @@ cc_xcbc_authenc(struct aead_request *req, struct cc_hw_desc desc[],
req_ctx->is_single_pass);
if (req_ctx->is_single_pass) {
- /**
+ /*
* Single-pass flow
*/
cc_set_xcbc_desc(req, desc, seq_size);
@@ -1287,7 +1287,7 @@ cc_xcbc_authenc(struct aead_request *req, struct cc_hw_desc desc[],
return;
}
- /**
+ /*
* Double-pass flow
* Fallback for unsupported single-pass modes,
* i.e. using assoc. data of non-word-multiple
--
2.17.1
Use the existing dev helper variable instead of plat_dev->dev.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_driver.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/ccree/cc_driver.c b/drivers/crypto/ccree/cc_driver.c
index bd9db53c68ab4381..2d50991b9a17756b 100644
--- a/drivers/crypto/ccree/cc_driver.c
+++ b/drivers/crypto/ccree/cc_driver.c
@@ -331,13 +331,13 @@ static int init_cc_resources(struct platform_device *plat_dev)
init_completion(&new_drvdata->hw_queue_avail);
- if (!plat_dev->dev.dma_mask)
- plat_dev->dev.dma_mask = &plat_dev->dev.coherent_dma_mask;
+ if (!dev->dma_mask)
+ dev->dma_mask = &dev->coherent_dma_mask;
dma_mask = DMA_BIT_MASK(DMA_BIT_MASK_LEN);
while (dma_mask > 0x7fffffffUL) {
- if (dma_supported(&plat_dev->dev, dma_mask)) {
- rc = dma_set_coherent_mask(&plat_dev->dev, dma_mask);
+ if (dma_supported(dev, dma_mask)) {
+ rc = dma_set_coherent_mask(dev, dma_mask);
if (!rc)
break;
}
--
2.17.1
Fix a typo in a comment.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_driver.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/ccree/cc_driver.c b/drivers/crypto/ccree/cc_driver.c
index 02442596310cd98d..bd9db53c68ab4381 100644
--- a/drivers/crypto/ccree/cc_driver.c
+++ b/drivers/crypto/ccree/cc_driver.c
@@ -367,7 +367,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
goto post_pm_err;
}
- /* wait for Crytpcell reset completion */
+ /* Wait for Cryptocell reset completion */
if (!cc_wait_for_reset_completion(new_drvdata)) {
dev_err(dev, "Cryptocell reset not completed");
}
--
2.17.1
Miscellaneous improvements:
- Add missing parameter and return value descriptions.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_buffer_mgr.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/ccree/cc_buffer_mgr.c b/drivers/crypto/ccree/cc_buffer_mgr.c
index f2e782d2be155ee4..1ea4812e93549d75 100644
--- a/drivers/crypto/ccree/cc_buffer_mgr.c
+++ b/drivers/crypto/ccree/cc_buffer_mgr.c
@@ -73,9 +73,13 @@ static void cc_copy_mac(struct device *dev, struct aead_request *req,
/**
* cc_get_sgl_nents() - Get scatterlist number of entries.
*
+ * @dev: Device object
* @sg_list: SG list
* @nbytes: [IN] Total SGL data bytes.
* @lbytes: [OUT] Returns the amount of bytes at the last entry
+ *
+ * Return:
+ * Number of entries in the scatterlist
*/
static unsigned int cc_get_sgl_nents(struct device *dev,
struct scatterlist *sg_list,
@@ -102,11 +106,13 @@ static unsigned int cc_get_sgl_nents(struct device *dev,
* cc_copy_sg_portion() - Copy scatter list data,
* from to_skip to end, to dest and vice versa
*
- * @dest:
- * @sg:
- * @to_skip:
- * @end:
- * @direct:
+ * @dev: Device object
+ * @dest: Buffer to copy to/from
+ * @sg: SG list
+ * @to_skip: Number of bytes to skip before copying
+ * @end: Offset of last byte to copy
+ * @direct: Transfer direction (true == from SG list to buffer, false == from
+ * buffer to SG list)
*/
void cc_copy_sg_portion(struct device *dev, u8 *dest, struct scatterlist *sg,
u32 to_skip, u32 end, enum cc_sg_cpy_direct direct)
--
2.17.1
Miscellaneous improvements:
- Start comment blocks with "/**" to enable kerneldoc,
- Mark parameters using "@" instead of "\param",
- Fix copied is_dout parameter of cc_send_request(),
- Add missing function names to kerneldoc headers,
- Add missing parameter descriptions.
Signed-off-by: Geert Uytterhoeven <[email protected]>
---
v2:
- New.
drivers/crypto/ccree/cc_request_mgr.c | 41 ++++++++++++++-------------
drivers/crypto/ccree/cc_request_mgr.h | 19 ++++++-------
2 files changed, 31 insertions(+), 29 deletions(-)
diff --git a/drivers/crypto/ccree/cc_request_mgr.c b/drivers/crypto/ccree/cc_request_mgr.c
index b2a18122f320b7b2..2b8a9f5a5bd3edee 100644
--- a/drivers/crypto/ccree/cc_request_mgr.c
+++ b/drivers/crypto/ccree/cc_request_mgr.c
@@ -206,12 +206,13 @@ static void enqueue_seq(struct cc_drvdata *drvdata, struct cc_hw_desc seq[],
}
}
-/*!
- * Completion will take place if and only if user requested completion
- * by cc_send_sync_request().
+/**
+ * request_mgr_complete() - Completion will take place if and only if user
+ * requested completion by cc_send_sync_request().
*
- * \param dev
- * \param dx_compl_h The completion event to signal
+ * @dev: Device pointer
+ * @dx_compl_h: The completion event to signal
+ * @dummy: unused error code
*/
static void request_mgr_complete(struct device *dev, void *dx_compl_h,
int dummy)
@@ -264,15 +265,15 @@ static int cc_queues_status(struct cc_drvdata *drvdata,
return -ENOSPC;
}
-/*!
- * Enqueue caller request to crypto hardware.
+/**
+ * cc_do_send_request() - Enqueue caller request to crypto hardware.
* Need to be called with HW lock held and PM running
*
- * \param drvdata
- * \param cc_req The request to enqueue
- * \param desc The crypto sequence
- * \param len The crypto sequence length
- * \param add_comp If "true": add an artificial dout DMA to mark completion
+ * @drvdata: Associated device driver context
+ * @cc_req: The request to enqueue
+ * @desc: The crypto sequence
+ * @len: The crypto sequence length
+ * @add_comp: If "true": add an artificial dout DMA to mark completion
*
*/
static void cc_do_send_request(struct cc_drvdata *drvdata,
@@ -486,16 +487,18 @@ int cc_send_sync_request(struct cc_drvdata *drvdata,
return 0;
}
-/*!
- * Enqueue caller request to crypto hardware during init process.
- * assume this function is not called in middle of a flow,
+/**
+ * send_request_init() - Enqueue caller request to crypto hardware during init
+ * process.
+ * Assume this function is not called in the middle of a flow,
* since we set QUEUE_LAST_IND flag in the last descriptor.
*
- * \param drvdata
- * \param desc The crypto sequence
- * \param len The crypto sequence length
+ * @drvdata: Associated device driver context
+ * @desc: The crypto sequence
+ * @len: The crypto sequence length
*
- * \return int Returns "0" upon success
+ * Return:
+ * Returns "0" upon success
*/
int send_request_init(struct cc_drvdata *drvdata, struct cc_hw_desc *desc,
unsigned int len)
diff --git a/drivers/crypto/ccree/cc_request_mgr.h b/drivers/crypto/ccree/cc_request_mgr.h
index ff7746aaaf355acd..ae25ca843dceabc9 100644
--- a/drivers/crypto/ccree/cc_request_mgr.h
+++ b/drivers/crypto/ccree/cc_request_mgr.h
@@ -12,18 +12,17 @@
int cc_req_mgr_init(struct cc_drvdata *drvdata);
-/*!
- * Enqueue caller request to crypto hardware.
+/**
+ * cc_send_request() - Enqueue caller request to crypto hardware.
*
- * \param drvdata
- * \param cc_req The request to enqueue
- * \param desc The crypto sequence
- * \param len The crypto sequence length
- * \param is_dout If "true": completion is handled by the caller
- * If "false": this function adds a dummy descriptor completion
- * and waits upon completion signal.
+ * @drvdata: Associated device driver context
+ * @cc_req: The request to enqueue
+ * @desc: The crypto sequence
+ * @len: The crypto sequence length
+ * @req: Asynchronous crypto request
*
- * \return int Returns -EINPROGRESS or error
+ * Return:
+ * Returns -EINPROGRESS or error
*/
int cc_send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req,
struct cc_hw_desc *desc, unsigned int len,
--
2.17.1
On Thu, Feb 13, 2020 at 9:47 AM Geert Uytterhoeven <[email protected]> wrote:
>
> Hi Gilad,
>
> On Thu, Feb 13, 2020 at 7:46 AM Gilad Ben-Yossef <[email protected]> wrote:
> > On Tuesday, February 11, 2020, Geert Uytterhoeven <[email protected]> wrote:
> >> This series contains several fixes, cleanups, and other improvements for
> >> the ARM TrustZone CryptoCell driver.
> >
> > Thank you so much for doing this Geert.
> >
> > The whole series looks wonderful. It does not only makes the driver better, it has made me a better programmer - I'm not ashamed to say I've learned some new things about the kernel API from this series...
> >
> > I am currently out of the office until mid next week and away from my testing lab.
> >
> > I'd like to delay formal ACK until I return and run a regression test suite using some of the newer revisions of the hardware which the driver also support, just in case, although I don't forsee any issues. I hope that is ok.
>
> Should be OK, we're only at rc1.
> I'm looking forward to the test results on newer hardware revision/
The smoke test on the most recent HW looks OK, I've submitted the
changes to a longer regression test suite on multiple HW and it is
running.
I hope to have a final result and an ACK by tomorrow.
Thanks,
Gilad
--
Gilad Ben-Yossef
Chief Coffee Drinker
values of β will give rise to dom!
On Tue, Feb 11, 2020 at 07:18:54PM +0100, Geert Uytterhoeven wrote:
> Hi all,
>
> This series contains several fixes, cleanups, and other improvements for
> the ARM TrustZone CryptoCell driver.
>
> The first 3 patches have been sent before:
> - [PATCH 0/2] Fix debugfs register access while suspended[1],
> - [PATCH] [RFC] crypto: ccree - fix retry handling in
> cc_send_sync_request()[2.
>
> This is based on v5.6-rc1, with the following fixes from Gilad applied:
> - [PATCH 0/4] crypto: ccree - fixes[3],
> - [PATCH] crypto: ccree - dec auth tag size from cryptlen map[4].
>
> This has been tested on R-Car H3 ES2.0.
> To ease testing, I have pushed this series and its dependencies to the
> topic/ccree-misc-v2 branch of my renesas-drivers repository at
> git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git.
>
> Thanks for your comments!
>
> [1] https://lore.kernel.org/r/[email protected]/
> [2] https://lore.kernel.org/r/[email protected]/
> [3] https://lore.kernel.org/r/[email protected]/
> [4] https://lore.kernel.org/r/[email protected]/
>
> Geert Uytterhoeven (34):
> debugfs: regset32: Add Runtime PM support
> crypto: ccree - fix debugfs register access while suspended
> crypto: ccree - fix retry handling in cc_send_sync_request()
> crypto: ccree - remove unneeded casts
> crypto: ccree - swap SHA384 and SHA512 larval hashes at build time
> crypto: ccree - drop duplicated error message on SRAM exhaustion
> crypto: ccree - remove empty cc_sram_mgr_fini()
> crypto: ccree - clean up clock handling
> crypto: ccree - make mlli_params.mlli_virt_addr void *
> crypto: ccree - use existing helpers to split 64-bit addresses
> crypto: ccree - defer larval_digest_addr init until needed
> crypto: ccree - remove bogus paragraph about freeing SRAM
> crypto: ccree - use u32 for SRAM addresses
> crypto: ccree - simplify Runtime PM handling
> crypto: ccree - use of_device_get_match_data()
> crypto: ccree - remove cc_pm_is_dev_suspended() wrapper
> crypto: ccree - make cc_pm_{suspend,resume}() static
> crypto: ccree - remove struct cc_sram_ctx
> crypto: ccree - remove struct cc_debugfs_ctx
> crypto: ccree - remove struct buff_mgr_handle
> crypto: ccree - remove struct cc_cipher_handle
> crypto: ccree - extract cc_init_copy_sram()
> crypto: ccree - remove bogus kerneldoc markers
> crypto: ccree - improve kerneldoc in cc_hw_queue_defs.h
> crypto: ccree - improve kerneldoc in cc_buffer_mgr.c
> crypto: ccree - improve kerneldoc in cc_hash.[ch]
> crypto: ccree - improve kerneldoc in cc_request_mgr.[ch]
> crypto: ccree - improve kerneldoc in cc_sram_mgr.[ch]
> crypto: ccree - spelling s/Crytpcell/Cryptocell/
> crypto: ccree - grammar s/not room/no room/
> crypto: ccree - use existing dev helper in init_cc_resources()
> crypto: ccree - use devm_k[mz]alloc() for AEAD data
> crypto: ccree - use devm_k[mz]alloc() for cipher data
> crypto: ccree - use devm_kzalloc() for hash data
>
> drivers/crypto/ccree/cc_aead.c | 61 +++---
> drivers/crypto/ccree/cc_buffer_mgr.c | 66 +++---
> drivers/crypto/ccree/cc_buffer_mgr.h | 4 +-
> drivers/crypto/ccree/cc_cipher.c | 61 ++----
> drivers/crypto/ccree/cc_debugfs.c | 29 +--
> drivers/crypto/ccree/cc_driver.c | 127 +++++-------
> drivers/crypto/ccree/cc_driver.h | 13 +-
> drivers/crypto/ccree/cc_hash.c | 225 +++++++++------------
> drivers/crypto/ccree/cc_hash.h | 31 ++-
> drivers/crypto/ccree/cc_hw_queue_defs.h | 255 ++++++++++++------------
> drivers/crypto/ccree/cc_pm.c | 60 +-----
> drivers/crypto/ccree/cc_pm.h | 21 --
> drivers/crypto/ccree/cc_request_mgr.c | 47 +++--
> drivers/crypto/ccree/cc_request_mgr.h | 19 +-
> drivers/crypto/ccree/cc_sram_mgr.c | 78 +++-----
> drivers/crypto/ccree/cc_sram_mgr.h | 45 ++---
> fs/debugfs/file.c | 8 +
> include/linux/debugfs.h | 1 +
> 18 files changed, 456 insertions(+), 695 deletions(-)
All applied. Thanks.
--
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt