Used "make defconfig savedefconfig" to regenerate defconfig file in the
right order to prepare for additional defconfig changes.
Signed-off-by: Li Yang <[email protected]>
---
arch/arm64/configs/defconfig | 15 ++++++---------
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 0f212889c931..618001ef5c81 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -471,9 +471,9 @@ CONFIG_DW_WATCHDOG=y
CONFIG_SUNXI_WATCHDOG=m
CONFIG_IMX2_WDT=y
CONFIG_IMX_SC_WDT=m
+CONFIG_QCOM_WDT=m
CONFIG_MESON_GXBB_WATCHDOG=m
CONFIG_MESON_WATCHDOG=m
-CONFIG_QCOM_WDT=m
CONFIG_RENESAS_WDT=y
CONFIG_UNIPHIER_WATCHDOG=y
CONFIG_BCM2835_WDT=y
@@ -594,8 +594,8 @@ CONFIG_SND_SOC_TAS571X=m
CONFIG_SND_SIMPLE_CARD=m
CONFIG_SND_AUDIO_GRAPH_CARD=m
CONFIG_I2C_HID=m
-CONFIG_USB=y
CONFIG_USB_CONN_GPIO=m
+CONFIG_USB=y
CONFIG_USB_OTG=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_TEGRA=y
@@ -617,7 +617,6 @@ CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_ISP1760=y
CONFIG_USB_HSIC_USB3503=y
CONFIG_NOP_USB_XCEIV=y
-CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_RENESAS_USBHS_UDC=m
CONFIG_USB_RENESAS_USB3=m
@@ -756,7 +755,6 @@ CONFIG_OWL_PM_DOMAINS=y
CONFIG_RASPBERRYPI_POWER=y
CONFIG_IMX_SCU_SOC=y
CONFIG_QCOM_AOSS_QMP=y
-CONFIG_QCOM_COMMAND_DB=y
CONFIG_QCOM_GENI_SE=y
CONFIG_QCOM_GLINK_SSR=m
CONFIG_QCOM_RMTFS_MEM=m
@@ -771,14 +769,12 @@ CONFIG_ARCH_R8A774A1=y
CONFIG_ARCH_R8A774B1=y
CONFIG_ARCH_R8A774C0=y
CONFIG_ARCH_R8A7795=y
-CONFIG_ARCH_R8A7796=y
CONFIG_ARCH_R8A77961=y
CONFIG_ARCH_R8A77965=y
CONFIG_ARCH_R8A77970=y
CONFIG_ARCH_R8A77980=y
CONFIG_ARCH_R8A77990=y
CONFIG_ARCH_R8A77995=y
-CONFIG_QCOM_PDC=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
CONFIG_ARCH_TEGRA_132_SOC=y
CONFIG_ARCH_TEGRA_210_SOC=y
@@ -809,6 +805,7 @@ CONFIG_PWM_ROCKCHIP=y
CONFIG_PWM_SAMSUNG=y
CONFIG_PWM_SUN4I=m
CONFIG_PWM_TEGRA=m
+CONFIG_QCOM_PDC=y
CONFIG_RESET_QCOM_AOSS=y
CONFIG_RESET_QCOM_PDC=m
CONFIG_RESET_TI_SCI=y
@@ -880,16 +877,16 @@ CONFIG_NLS_ISO8859_1=y
CONFIG_SECURITY=y
CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_ANSI_CPRNG=y
+CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_DEV_SUN8I_CE=m
CONFIG_CRYPTO_DEV_FSL_CAAM=m
-CONFIG_CRYPTO_DEV_HISI_ZIP=m
-CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_DEV_QCOM_RNG=m
+CONFIG_CRYPTO_DEV_HISI_ZIP=m
CONFIG_CMA_SIZE_MBYTES=32
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
--
2.17.1
This enables the following SoC device drivers for NXP/FSL QorIQ SoCs:
CONFIG_QORIQ_CPUFREQ=y
CONFIG_NET_SWITCHDEV=y
CONFIG_MSCC_OCELOT_SWITCH=y
CONFIG_CAN=m
CONFIG_CAN_FLEXCAN=m
CONFIG_FSL_MC_BUS=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_FSL_ENETC=y
CONFIG_FSL_ENETC_VF=y
CONFIG_SPI_FSL_LPSPI=y
CONFIG_SPI_FSL_QUADSPI=y
CONFIG_SPI_FSL_DSPI=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_ARM_SBSA_WATCHDOG=y
CONFIG_DRM_MALI_DISPLAY=m
CONFIG_FSL_MC_DPIO=y
CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m
CONFIG_FSL_DPAA=y
CONFIG_FSL_FMAN=y
CONFIG_FSL_DPAA_ETH=y
CONFIG_FSL_DPAA2_ETH=y
And the drivers for on-board devices for the upstreamed QorIQ reference
boards:
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_SST25L=y
CONFIG_EEPROM_AT24=m
CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_PCF85363=y
CONFIG_RTC_DRV_PCF2127=y
CONFIG_E1000=y
CONFIG_AQUANTIA_PHY=y
CONFIG_MICROSEMI_PHY=y
CONFIG_VITESSE_PHY=y
CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y
CONFIG_MUX_MMIO=y
The following two options are implied by new options and removed from
defconfig:
CONFIG_CLK_QORIQ=y
CONFIG_MEMORY=y
Signed-off-by: Li Yang <[email protected]>
---
arch/arm64/configs/defconfig | 42 ++++++++++++++++++++++++++++++++++--
1 file changed, 40 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 618001ef5c81..0732d5aaf2cb 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -90,6 +90,7 @@ CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y
CONFIG_ARM_QCOM_CPUFREQ_HW=y
CONFIG_ARM_RASPBERRYPI_CPUFREQ=m
CONFIG_ARM_TEGRA186_CPUFREQ=y
+CONFIG_QORIQ_CPUFREQ=y
CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_INTEL_STRATIX10_SERVICE=y
@@ -157,10 +158,13 @@ CONFIG_BRIDGE_VLAN_FILTERING=y
CONFIG_VLAN_8021Q=m
CONFIG_VLAN_8021Q_GVRP=y
CONFIG_VLAN_8021Q_MVRP=y
+CONFIG_NET_SWITCHDEV=y
CONFIG_QRTR=m
CONFIG_QRTR_SMD=m
CONFIG_QRTR_TUN=m
CONFIG_BPF_JIT=y
+CONFIG_CAN=m
+CONFIG_CAN_FLEXCAN=m
CONFIG_BT=m
CONFIG_BT_HIDP=m
# CONFIG_BT_HS is not set
@@ -207,11 +211,22 @@ CONFIG_FW_LOADER_USER_HELPER=y
CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
CONFIG_HISILICON_LPC=y
CONFIG_SIMPLE_PM_BUS=y
+CONFIG_FSL_MC_BUS=y
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_SST25L=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_DENALI_DT=y
CONFIG_MTD_NAND_MARVELL=y
+CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_NAND_QCOM=y
CONFIG_MTD_SPI_NOR=y
CONFIG_SPI_CADENCE_QUADSPI=y
@@ -220,6 +235,7 @@ CONFIG_BLK_DEV_NBD=m
CONFIG_VIRTIO_BLK=y
CONFIG_BLK_DEV_NVME=m
CONFIG_SRAM=y
+CONFIG_EEPROM_AT24=m
CONFIG_EEPROM_AT25=m
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
@@ -261,12 +277,18 @@ CONFIG_BNX2X=m
CONFIG_MACB=y
CONFIG_THUNDER_NIC_PF=y
CONFIG_FEC=y
+CONFIG_FSL_FMAN=y
+CONFIG_FSL_DPAA_ETH=y
+CONFIG_FSL_DPAA2_ETH=y
+CONFIG_FSL_ENETC=y
+CONFIG_FSL_ENETC_VF=y
CONFIG_HIX5HD2_GMAC=y
CONFIG_HNS_DSAF=y
CONFIG_HNS_ENET=y
CONFIG_HNS3=y
CONFIG_HNS3_HCLGE=y
CONFIG_HNS3_ENET=y
+CONFIG_E1000=y
CONFIG_E1000E=y
CONFIG_IGB=y
CONFIG_IGBVF=y
@@ -276,6 +298,7 @@ CONFIG_SKY2=y
CONFIG_MLX4_EN=m
CONFIG_MLX5_CORE=m
CONFIG_MLX5_CORE_EN=y
+CONFIG_MSCC_OCELOT_SWITCH=y
CONFIG_QCOM_EMAC=m
CONFIG_RAVB=y
CONFIG_SMC91X=y
@@ -284,13 +307,17 @@ CONFIG_SNI_AVE=y
CONFIG_SNI_NETSEC=y
CONFIG_STMMAC_ETH=m
CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y
+CONFIG_AQUANTIA_PHY=y
CONFIG_MARVELL_PHY=m
CONFIG_MARVELL_10G_PHY=m
CONFIG_MESON_GXL_PHY=m
CONFIG_MICREL_PHY=y
+CONFIG_MICROSEMI_PHY=y
CONFIG_AT803X_PHY=y
CONFIG_REALTEK_PHY=m
CONFIG_ROCKCHIP_PHY=y
+CONFIG_VITESSE_PHY=y
CONFIG_USB_PEGASUS=m
CONFIG_USB_RTL8150=m
CONFIG_USB_RTL8152=m
@@ -388,8 +415,11 @@ CONFIG_SPI=y
CONFIG_SPI_ARMADA_3700=y
CONFIG_SPI_BCM2835=m
CONFIG_SPI_BCM2835AUX=m
+CONFIG_SPI_FSL_LPSPI=y
+CONFIG_SPI_FSL_QUADSPI=y
CONFIG_SPI_NXP_FLEXSPI=y
CONFIG_SPI_IMX=m
+CONFIG_SPI_FSL_DSPI=y
CONFIG_SPI_MESON_SPICC=m
CONFIG_SPI_MESON_SPIFC=m
CONFIG_SPI_ORION=y
@@ -424,6 +454,7 @@ CONFIG_PINCTRL_SM8150=y
CONFIG_GPIO_ALTERA=m
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_MB86S7X=y
+CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_PL061=y
CONFIG_GPIO_RCAR=y
CONFIG_GPIO_UNIPHIER=y
@@ -466,6 +497,7 @@ CONFIG_QCOM_SPMI_TEMP_ALARM=m
CONFIG_UNIPHIER_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_ARM_SP805_WATCHDOG=y
+CONFIG_ARM_SBSA_WATCHDOG=y
CONFIG_S3C2410_WATCHDOG=y
CONFIG_DW_WATCHDOG=y
CONFIG_SUNXI_WATCHDOG=m
@@ -531,6 +563,7 @@ CONFIG_VIDEO_RENESAS_FCP=m
CONFIG_VIDEO_RENESAS_VSP1=m
CONFIG_DRM=m
CONFIG_DRM_I2C_NXP_TDA998X=m
+CONFIG_DRM_MALI_DISPLAY=m
CONFIG_DRM_NOUVEAU=m
CONFIG_DRM_EXYNOS=m
CONFIG_DRM_EXYNOS5433_DECON=y
@@ -664,11 +697,14 @@ CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_EDAC=y
CONFIG_EDAC_GHES=y
CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_MAX77686=y
CONFIG_RTC_DRV_RK808=m
+CONFIG_RTC_DRV_PCF85363=y
CONFIG_RTC_DRV_RX8581=m
CONFIG_RTC_DRV_S5M=y
CONFIG_RTC_DRV_DS3232=y
+CONFIG_RTC_DRV_PCF2127=y
CONFIG_RTC_DRV_EFI=y
CONFIG_RTC_DRV_CROS_EC=y
CONFIG_RTC_DRV_S3C=y
@@ -709,7 +745,6 @@ CONFIG_COMMON_CLK_RK808=y
CONFIG_COMMON_CLK_SCPI=y
CONFIG_COMMON_CLK_CS2000_CP=y
CONFIG_COMMON_CLK_S2MPS11=y
-CONFIG_CLK_QORIQ=y
CONFIG_COMMON_CLK_PWM=y
CONFIG_CLK_RASPBERRYPI=m
CONFIG_CLK_IMX8MM=y
@@ -753,6 +788,8 @@ CONFIG_RPMSG_QCOM_GLINK_SMEM=m
CONFIG_RPMSG_QCOM_SMD=y
CONFIG_OWL_PM_DOMAINS=y
CONFIG_RASPBERRYPI_POWER=y
+CONFIG_FSL_DPAA=y
+CONFIG_FSL_MC_DPIO=y
CONFIG_IMX_SCU_SOC=y
CONFIG_QCOM_AOSS_QMP=y
CONFIG_QCOM_GENI_SE=y
@@ -785,7 +822,6 @@ CONFIG_ARCH_K3_J721E_SOC=y
CONFIG_TI_SCI_PM_DOMAINS=y
CONFIG_EXTCON_USB_GPIO=y
CONFIG_EXTCON_USBC_CROS_EC=y
-CONFIG_MEMORY=y
CONFIG_IIO=y
CONFIG_EXYNOS_ADC=y
CONFIG_QCOM_SPMI_ADC5=m
@@ -849,6 +885,7 @@ CONFIG_FPGA_REGION=m
CONFIG_OF_FPGA_REGION=m
CONFIG_TEE=y
CONFIG_OPTEE=y
+CONFIG_MUX_MMIO=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
@@ -880,6 +917,7 @@ CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_DEV_SUN8I_CE=m
CONFIG_CRYPTO_DEV_FSL_CAAM=m
+CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m
CONFIG_CRYPTO_DEV_QCOM_RNG=m
CONFIG_CRYPTO_DEV_HISI_ZIP=m
CONFIG_CMA_SIZE_MBYTES=32
--
2.17.1
On Mon, Feb 10, 2020 at 06:55:58PM -0600, Li Yang wrote:
> Used "make defconfig savedefconfig" to regenerate defconfig file in the
> right order to prepare for additional defconfig changes.
>
> Signed-off-by: Li Yang <[email protected]>
Arnd, Olof,
How do we handle arm64 defconfig savedefconfig changes? I think it will
likely cause conflicts with changes from other platform maintainers.
Shawn
> ---
> arch/arm64/configs/defconfig | 15 ++++++---------
> 1 file changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 0f212889c931..618001ef5c81 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -471,9 +471,9 @@ CONFIG_DW_WATCHDOG=y
> CONFIG_SUNXI_WATCHDOG=m
> CONFIG_IMX2_WDT=y
> CONFIG_IMX_SC_WDT=m
> +CONFIG_QCOM_WDT=m
> CONFIG_MESON_GXBB_WATCHDOG=m
> CONFIG_MESON_WATCHDOG=m
> -CONFIG_QCOM_WDT=m
> CONFIG_RENESAS_WDT=y
> CONFIG_UNIPHIER_WATCHDOG=y
> CONFIG_BCM2835_WDT=y
> @@ -594,8 +594,8 @@ CONFIG_SND_SOC_TAS571X=m
> CONFIG_SND_SIMPLE_CARD=m
> CONFIG_SND_AUDIO_GRAPH_CARD=m
> CONFIG_I2C_HID=m
> -CONFIG_USB=y
> CONFIG_USB_CONN_GPIO=m
> +CONFIG_USB=y
> CONFIG_USB_OTG=y
> CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_TEGRA=y
> @@ -617,7 +617,6 @@ CONFIG_USB_CHIPIDEA_HOST=y
> CONFIG_USB_ISP1760=y
> CONFIG_USB_HSIC_USB3503=y
> CONFIG_NOP_USB_XCEIV=y
> -CONFIG_USB_ULPI=y
> CONFIG_USB_GADGET=y
> CONFIG_USB_RENESAS_USBHS_UDC=m
> CONFIG_USB_RENESAS_USB3=m
> @@ -756,7 +755,6 @@ CONFIG_OWL_PM_DOMAINS=y
> CONFIG_RASPBERRYPI_POWER=y
> CONFIG_IMX_SCU_SOC=y
> CONFIG_QCOM_AOSS_QMP=y
> -CONFIG_QCOM_COMMAND_DB=y
> CONFIG_QCOM_GENI_SE=y
> CONFIG_QCOM_GLINK_SSR=m
> CONFIG_QCOM_RMTFS_MEM=m
> @@ -771,14 +769,12 @@ CONFIG_ARCH_R8A774A1=y
> CONFIG_ARCH_R8A774B1=y
> CONFIG_ARCH_R8A774C0=y
> CONFIG_ARCH_R8A7795=y
> -CONFIG_ARCH_R8A7796=y
> CONFIG_ARCH_R8A77961=y
> CONFIG_ARCH_R8A77965=y
> CONFIG_ARCH_R8A77970=y
> CONFIG_ARCH_R8A77980=y
> CONFIG_ARCH_R8A77990=y
> CONFIG_ARCH_R8A77995=y
> -CONFIG_QCOM_PDC=y
> CONFIG_ROCKCHIP_PM_DOMAINS=y
> CONFIG_ARCH_TEGRA_132_SOC=y
> CONFIG_ARCH_TEGRA_210_SOC=y
> @@ -809,6 +805,7 @@ CONFIG_PWM_ROCKCHIP=y
> CONFIG_PWM_SAMSUNG=y
> CONFIG_PWM_SUN4I=m
> CONFIG_PWM_TEGRA=m
> +CONFIG_QCOM_PDC=y
> CONFIG_RESET_QCOM_AOSS=y
> CONFIG_RESET_QCOM_PDC=m
> CONFIG_RESET_TI_SCI=y
> @@ -880,16 +877,16 @@ CONFIG_NLS_ISO8859_1=y
> CONFIG_SECURITY=y
> CONFIG_CRYPTO_ECHAINIV=y
> CONFIG_CRYPTO_ANSI_CPRNG=y
> +CONFIG_CRYPTO_USER_API_RNG=m
> CONFIG_CRYPTO_DEV_SUN8I_CE=m
> CONFIG_CRYPTO_DEV_FSL_CAAM=m
> -CONFIG_CRYPTO_DEV_HISI_ZIP=m
> -CONFIG_CRYPTO_USER_API_RNG=m
> CONFIG_CRYPTO_DEV_QCOM_RNG=m
> +CONFIG_CRYPTO_DEV_HISI_ZIP=m
> CONFIG_CMA_SIZE_MBYTES=32
> CONFIG_PRINTK_TIME=y
> CONFIG_DEBUG_INFO=y
> -CONFIG_DEBUG_FS=y
> CONFIG_MAGIC_SYSRQ=y
> +CONFIG_DEBUG_FS=y
> CONFIG_DEBUG_KERNEL=y
> # CONFIG_SCHED_DEBUG is not set
> # CONFIG_DEBUG_PREEMPT is not set
> --
> 2.17.1
>
On Mon, Feb 10, 2020 at 06:55:59PM -0600, Li Yang wrote:
> This enables the following SoC device drivers for NXP/FSL QorIQ SoCs:
> CONFIG_QORIQ_CPUFREQ=y
> CONFIG_NET_SWITCHDEV=y
> CONFIG_MSCC_OCELOT_SWITCH=y
> CONFIG_CAN=m
> CONFIG_CAN_FLEXCAN=m
> CONFIG_FSL_MC_BUS=y
> CONFIG_MTD_NAND_FSL_IFC=y
> CONFIG_FSL_ENETC=y
> CONFIG_FSL_ENETC_VF=y
> CONFIG_SPI_FSL_LPSPI=y
> CONFIG_SPI_FSL_QUADSPI=y
> CONFIG_SPI_FSL_DSPI=y
> CONFIG_GPIO_MPC8XXX=y
> CONFIG_ARM_SBSA_WATCHDOG=y
> CONFIG_DRM_MALI_DISPLAY=m
> CONFIG_FSL_MC_DPIO=y
> CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m
> CONFIG_FSL_DPAA=y
> CONFIG_FSL_FMAN=y
> CONFIG_FSL_DPAA_ETH=y
> CONFIG_FSL_DPAA2_ETH=y
>
> And the drivers for on-board devices for the upstreamed QorIQ reference
> boards:
> CONFIG_MTD_CFI=y
> CONFIG_MTD_CFI_ADV_OPTIONS=y
> CONFIG_MTD_CFI_INTELEXT=y
> CONFIG_MTD_CFI_AMDSTD=y
> CONFIG_MTD_CFI_STAA=y
> CONFIG_MTD_PHYSMAP=y
> CONFIG_MTD_PHYSMAP_OF=y
> CONFIG_MTD_DATAFLASH=y
> CONFIG_MTD_SST25L=y
> CONFIG_EEPROM_AT24=m
> CONFIG_RTC_DRV_DS1307=y
> CONFIG_RTC_DRV_PCF85363=y
> CONFIG_RTC_DRV_PCF2127=y
> CONFIG_E1000=y
> CONFIG_AQUANTIA_PHY=y
> CONFIG_MICROSEMI_PHY=y
> CONFIG_VITESSE_PHY=y
> CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y
> CONFIG_MUX_MMIO=y
>
> The following two options are implied by new options and removed from
> defconfig:
> CONFIG_CLK_QORIQ=y
> CONFIG_MEMORY=y
>
> Signed-off-by: Li Yang <[email protected]>
This is too much change in a single patch. It should be split properly
to make review and merge easier, considering arm-soc folks are cautious
to those 'y' options.
Shawn
> ---
> arch/arm64/configs/defconfig | 42 ++++++++++++++++++++++++++++++++++--
> 1 file changed, 40 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 618001ef5c81..0732d5aaf2cb 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -90,6 +90,7 @@ CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y
> CONFIG_ARM_QCOM_CPUFREQ_HW=y
> CONFIG_ARM_RASPBERRYPI_CPUFREQ=m
> CONFIG_ARM_TEGRA186_CPUFREQ=y
> +CONFIG_QORIQ_CPUFREQ=y
> CONFIG_ARM_SCPI_PROTOCOL=y
> CONFIG_RASPBERRYPI_FIRMWARE=y
> CONFIG_INTEL_STRATIX10_SERVICE=y
> @@ -157,10 +158,13 @@ CONFIG_BRIDGE_VLAN_FILTERING=y
> CONFIG_VLAN_8021Q=m
> CONFIG_VLAN_8021Q_GVRP=y
> CONFIG_VLAN_8021Q_MVRP=y
> +CONFIG_NET_SWITCHDEV=y
> CONFIG_QRTR=m
> CONFIG_QRTR_SMD=m
> CONFIG_QRTR_TUN=m
> CONFIG_BPF_JIT=y
> +CONFIG_CAN=m
> +CONFIG_CAN_FLEXCAN=m
> CONFIG_BT=m
> CONFIG_BT_HIDP=m
> # CONFIG_BT_HS is not set
> @@ -207,11 +211,22 @@ CONFIG_FW_LOADER_USER_HELPER=y
> CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
> CONFIG_HISILICON_LPC=y
> CONFIG_SIMPLE_PM_BUS=y
> +CONFIG_FSL_MC_BUS=y
> CONFIG_MTD=y
> CONFIG_MTD_BLOCK=y
> +CONFIG_MTD_CFI=y
> +CONFIG_MTD_CFI_ADV_OPTIONS=y
> +CONFIG_MTD_CFI_INTELEXT=y
> +CONFIG_MTD_CFI_AMDSTD=y
> +CONFIG_MTD_CFI_STAA=y
> +CONFIG_MTD_PHYSMAP=y
> +CONFIG_MTD_PHYSMAP_OF=y
> +CONFIG_MTD_DATAFLASH=y
> +CONFIG_MTD_SST25L=y
> CONFIG_MTD_RAW_NAND=y
> CONFIG_MTD_NAND_DENALI_DT=y
> CONFIG_MTD_NAND_MARVELL=y
> +CONFIG_MTD_NAND_FSL_IFC=y
> CONFIG_MTD_NAND_QCOM=y
> CONFIG_MTD_SPI_NOR=y
> CONFIG_SPI_CADENCE_QUADSPI=y
> @@ -220,6 +235,7 @@ CONFIG_BLK_DEV_NBD=m
> CONFIG_VIRTIO_BLK=y
> CONFIG_BLK_DEV_NVME=m
> CONFIG_SRAM=y
> +CONFIG_EEPROM_AT24=m
> CONFIG_EEPROM_AT25=m
> # CONFIG_SCSI_PROC_FS is not set
> CONFIG_BLK_DEV_SD=y
> @@ -261,12 +277,18 @@ CONFIG_BNX2X=m
> CONFIG_MACB=y
> CONFIG_THUNDER_NIC_PF=y
> CONFIG_FEC=y
> +CONFIG_FSL_FMAN=y
> +CONFIG_FSL_DPAA_ETH=y
> +CONFIG_FSL_DPAA2_ETH=y
> +CONFIG_FSL_ENETC=y
> +CONFIG_FSL_ENETC_VF=y
> CONFIG_HIX5HD2_GMAC=y
> CONFIG_HNS_DSAF=y
> CONFIG_HNS_ENET=y
> CONFIG_HNS3=y
> CONFIG_HNS3_HCLGE=y
> CONFIG_HNS3_ENET=y
> +CONFIG_E1000=y
> CONFIG_E1000E=y
> CONFIG_IGB=y
> CONFIG_IGBVF=y
> @@ -276,6 +298,7 @@ CONFIG_SKY2=y
> CONFIG_MLX4_EN=m
> CONFIG_MLX5_CORE=m
> CONFIG_MLX5_CORE_EN=y
> +CONFIG_MSCC_OCELOT_SWITCH=y
> CONFIG_QCOM_EMAC=m
> CONFIG_RAVB=y
> CONFIG_SMC91X=y
> @@ -284,13 +307,17 @@ CONFIG_SNI_AVE=y
> CONFIG_SNI_NETSEC=y
> CONFIG_STMMAC_ETH=m
> CONFIG_MDIO_BUS_MUX_MMIOREG=y
> +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y
> +CONFIG_AQUANTIA_PHY=y
> CONFIG_MARVELL_PHY=m
> CONFIG_MARVELL_10G_PHY=m
> CONFIG_MESON_GXL_PHY=m
> CONFIG_MICREL_PHY=y
> +CONFIG_MICROSEMI_PHY=y
> CONFIG_AT803X_PHY=y
> CONFIG_REALTEK_PHY=m
> CONFIG_ROCKCHIP_PHY=y
> +CONFIG_VITESSE_PHY=y
> CONFIG_USB_PEGASUS=m
> CONFIG_USB_RTL8150=m
> CONFIG_USB_RTL8152=m
> @@ -388,8 +415,11 @@ CONFIG_SPI=y
> CONFIG_SPI_ARMADA_3700=y
> CONFIG_SPI_BCM2835=m
> CONFIG_SPI_BCM2835AUX=m
> +CONFIG_SPI_FSL_LPSPI=y
> +CONFIG_SPI_FSL_QUADSPI=y
> CONFIG_SPI_NXP_FLEXSPI=y
> CONFIG_SPI_IMX=m
> +CONFIG_SPI_FSL_DSPI=y
> CONFIG_SPI_MESON_SPICC=m
> CONFIG_SPI_MESON_SPIFC=m
> CONFIG_SPI_ORION=y
> @@ -424,6 +454,7 @@ CONFIG_PINCTRL_SM8150=y
> CONFIG_GPIO_ALTERA=m
> CONFIG_GPIO_DWAPB=y
> CONFIG_GPIO_MB86S7X=y
> +CONFIG_GPIO_MPC8XXX=y
> CONFIG_GPIO_PL061=y
> CONFIG_GPIO_RCAR=y
> CONFIG_GPIO_UNIPHIER=y
> @@ -466,6 +497,7 @@ CONFIG_QCOM_SPMI_TEMP_ALARM=m
> CONFIG_UNIPHIER_THERMAL=y
> CONFIG_WATCHDOG=y
> CONFIG_ARM_SP805_WATCHDOG=y
> +CONFIG_ARM_SBSA_WATCHDOG=y
> CONFIG_S3C2410_WATCHDOG=y
> CONFIG_DW_WATCHDOG=y
> CONFIG_SUNXI_WATCHDOG=m
> @@ -531,6 +563,7 @@ CONFIG_VIDEO_RENESAS_FCP=m
> CONFIG_VIDEO_RENESAS_VSP1=m
> CONFIG_DRM=m
> CONFIG_DRM_I2C_NXP_TDA998X=m
> +CONFIG_DRM_MALI_DISPLAY=m
> CONFIG_DRM_NOUVEAU=m
> CONFIG_DRM_EXYNOS=m
> CONFIG_DRM_EXYNOS5433_DECON=y
> @@ -664,11 +697,14 @@ CONFIG_LEDS_TRIGGER_PANIC=y
> CONFIG_EDAC=y
> CONFIG_EDAC_GHES=y
> CONFIG_RTC_CLASS=y
> +CONFIG_RTC_DRV_DS1307=y
> CONFIG_RTC_DRV_MAX77686=y
> CONFIG_RTC_DRV_RK808=m
> +CONFIG_RTC_DRV_PCF85363=y
> CONFIG_RTC_DRV_RX8581=m
> CONFIG_RTC_DRV_S5M=y
> CONFIG_RTC_DRV_DS3232=y
> +CONFIG_RTC_DRV_PCF2127=y
> CONFIG_RTC_DRV_EFI=y
> CONFIG_RTC_DRV_CROS_EC=y
> CONFIG_RTC_DRV_S3C=y
> @@ -709,7 +745,6 @@ CONFIG_COMMON_CLK_RK808=y
> CONFIG_COMMON_CLK_SCPI=y
> CONFIG_COMMON_CLK_CS2000_CP=y
> CONFIG_COMMON_CLK_S2MPS11=y
> -CONFIG_CLK_QORIQ=y
> CONFIG_COMMON_CLK_PWM=y
> CONFIG_CLK_RASPBERRYPI=m
> CONFIG_CLK_IMX8MM=y
> @@ -753,6 +788,8 @@ CONFIG_RPMSG_QCOM_GLINK_SMEM=m
> CONFIG_RPMSG_QCOM_SMD=y
> CONFIG_OWL_PM_DOMAINS=y
> CONFIG_RASPBERRYPI_POWER=y
> +CONFIG_FSL_DPAA=y
> +CONFIG_FSL_MC_DPIO=y
> CONFIG_IMX_SCU_SOC=y
> CONFIG_QCOM_AOSS_QMP=y
> CONFIG_QCOM_GENI_SE=y
> @@ -785,7 +822,6 @@ CONFIG_ARCH_K3_J721E_SOC=y
> CONFIG_TI_SCI_PM_DOMAINS=y
> CONFIG_EXTCON_USB_GPIO=y
> CONFIG_EXTCON_USBC_CROS_EC=y
> -CONFIG_MEMORY=y
> CONFIG_IIO=y
> CONFIG_EXYNOS_ADC=y
> CONFIG_QCOM_SPMI_ADC5=m
> @@ -849,6 +885,7 @@ CONFIG_FPGA_REGION=m
> CONFIG_OF_FPGA_REGION=m
> CONFIG_TEE=y
> CONFIG_OPTEE=y
> +CONFIG_MUX_MMIO=y
> CONFIG_EXT2_FS=y
> CONFIG_EXT3_FS=y
> CONFIG_EXT4_FS_POSIX_ACL=y
> @@ -880,6 +917,7 @@ CONFIG_CRYPTO_ANSI_CPRNG=y
> CONFIG_CRYPTO_USER_API_RNG=m
> CONFIG_CRYPTO_DEV_SUN8I_CE=m
> CONFIG_CRYPTO_DEV_FSL_CAAM=m
> +CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m
> CONFIG_CRYPTO_DEV_QCOM_RNG=m
> CONFIG_CRYPTO_DEV_HISI_ZIP=m
> CONFIG_CMA_SIZE_MBYTES=32
> --
> 2.17.1
>
> -----Original Message-----
> From: Shawn Guo <[email protected]>
> Sent: Sunday, February 16, 2020 11:38 PM
> To: Leo Li <[email protected]>
> Cc: [email protected]; [email protected]
> Subject: Re: [PATCH 2/2] arm64: defconfig: enable additional drivers needed
> by NXP QorIQ boards
>
> On Mon, Feb 10, 2020 at 06:55:59PM -0600, Li Yang wrote:
> > This enables the following SoC device drivers for NXP/FSL QorIQ SoCs:
> > CONFIG_QORIQ_CPUFREQ=y
> > CONFIG_NET_SWITCHDEV=y
> > CONFIG_MSCC_OCELOT_SWITCH=y
> > CONFIG_CAN=m
> > CONFIG_CAN_FLEXCAN=m
> > CONFIG_FSL_MC_BUS=y
> > CONFIG_MTD_NAND_FSL_IFC=y
> > CONFIG_FSL_ENETC=y
> > CONFIG_FSL_ENETC_VF=y
> > CONFIG_SPI_FSL_LPSPI=y
> > CONFIG_SPI_FSL_QUADSPI=y
> > CONFIG_SPI_FSL_DSPI=y
> > CONFIG_GPIO_MPC8XXX=y
> > CONFIG_ARM_SBSA_WATCHDOG=y
> > CONFIG_DRM_MALI_DISPLAY=m
> > CONFIG_FSL_MC_DPIO=y
> > CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m
> > CONFIG_FSL_DPAA=y
> > CONFIG_FSL_FMAN=y
> > CONFIG_FSL_DPAA_ETH=y
> > CONFIG_FSL_DPAA2_ETH=y
> >
> > And the drivers for on-board devices for the upstreamed QorIQ
> > reference
> > boards:
> > CONFIG_MTD_CFI=y
> > CONFIG_MTD_CFI_ADV_OPTIONS=y
> > CONFIG_MTD_CFI_INTELEXT=y
> > CONFIG_MTD_CFI_AMDSTD=y
> > CONFIG_MTD_CFI_STAA=y
> > CONFIG_MTD_PHYSMAP=y
> > CONFIG_MTD_PHYSMAP_OF=y
> > CONFIG_MTD_DATAFLASH=y
> > CONFIG_MTD_SST25L=y
> > CONFIG_EEPROM_AT24=m
> > CONFIG_RTC_DRV_DS1307=y
> > CONFIG_RTC_DRV_PCF85363=y
> > CONFIG_RTC_DRV_PCF2127=y
> > CONFIG_E1000=y
> > CONFIG_AQUANTIA_PHY=y
> > CONFIG_MICROSEMI_PHY=y
> > CONFIG_VITESSE_PHY=y
> > CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y
> > CONFIG_MUX_MMIO=y
> >
> > The following two options are implied by new options and removed from
> > defconfig:
> > CONFIG_CLK_QORIQ=y
> > CONFIG_MEMORY=y
> >
> > Signed-off-by: Li Yang <[email protected]>
>
> This is too much change in a single patch. It should be split properly to make
> review and merge easier, considering arm-soc folks are cautious to those 'y'
> options.
Ok. So probably separating them based on different subsystems will be good? It would be too many patches if I separate for each individual config option.
Regards,
Leo
> -----Original Message-----
> From: Shawn Guo <[email protected]>
> Sent: Sunday, February 16, 2020 11:34 PM
> To: Leo Li <[email protected]>; Arnd Bergmann <[email protected]>; Olof
> Johansson <[email protected]>
> Cc: [email protected]; [email protected]
> Subject: Re: [PATCH 1/2] arm64: defconfig: run through savedefconfig for
> ordering
>
> On Mon, Feb 10, 2020 at 06:55:58PM -0600, Li Yang wrote:
> > Used "make defconfig savedefconfig" to regenerate defconfig file in the
> > right order to prepare for additional defconfig changes.
> >
> > Signed-off-by: Li Yang <[email protected]>
>
> Arnd, Olof,
>
> How do we handle arm64 defconfig savedefconfig changes? I think it will
> likely cause conflicts with changes from other platform maintainers.
Actually I think it helps a lot for managing off-tree defconfig patches when we keep it sorted with savedefconfig because changes to the same option will always be at the same location and shown as proper conflicts when merging.
Regards,
Leo
>
> Shawn
>
> > ---
> > arch/arm64/configs/defconfig | 15 ++++++---------
> > 1 file changed, 6 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> > index 0f212889c931..618001ef5c81 100644
> > --- a/arch/arm64/configs/defconfig
> > +++ b/arch/arm64/configs/defconfig
> > @@ -471,9 +471,9 @@ CONFIG_DW_WATCHDOG=y
> > CONFIG_SUNXI_WATCHDOG=m
> > CONFIG_IMX2_WDT=y
> > CONFIG_IMX_SC_WDT=m
> > +CONFIG_QCOM_WDT=m
> > CONFIG_MESON_GXBB_WATCHDOG=m
> > CONFIG_MESON_WATCHDOG=m
> > -CONFIG_QCOM_WDT=m
> > CONFIG_RENESAS_WDT=y
> > CONFIG_UNIPHIER_WATCHDOG=y
> > CONFIG_BCM2835_WDT=y
> > @@ -594,8 +594,8 @@ CONFIG_SND_SOC_TAS571X=m
> > CONFIG_SND_SIMPLE_CARD=m
> > CONFIG_SND_AUDIO_GRAPH_CARD=m
> > CONFIG_I2C_HID=m
> > -CONFIG_USB=y
> > CONFIG_USB_CONN_GPIO=m
> > +CONFIG_USB=y
> > CONFIG_USB_OTG=y
> > CONFIG_USB_XHCI_HCD=y
> > CONFIG_USB_XHCI_TEGRA=y
> > @@ -617,7 +617,6 @@ CONFIG_USB_CHIPIDEA_HOST=y
> > CONFIG_USB_ISP1760=y
> > CONFIG_USB_HSIC_USB3503=y
> > CONFIG_NOP_USB_XCEIV=y
> > -CONFIG_USB_ULPI=y
> > CONFIG_USB_GADGET=y
> > CONFIG_USB_RENESAS_USBHS_UDC=m
> > CONFIG_USB_RENESAS_USB3=m
> > @@ -756,7 +755,6 @@ CONFIG_OWL_PM_DOMAINS=y
> > CONFIG_RASPBERRYPI_POWER=y
> > CONFIG_IMX_SCU_SOC=y
> > CONFIG_QCOM_AOSS_QMP=y
> > -CONFIG_QCOM_COMMAND_DB=y
> > CONFIG_QCOM_GENI_SE=y
> > CONFIG_QCOM_GLINK_SSR=m
> > CONFIG_QCOM_RMTFS_MEM=m
> > @@ -771,14 +769,12 @@ CONFIG_ARCH_R8A774A1=y
> > CONFIG_ARCH_R8A774B1=y
> > CONFIG_ARCH_R8A774C0=y
> > CONFIG_ARCH_R8A7795=y
> > -CONFIG_ARCH_R8A7796=y
> > CONFIG_ARCH_R8A77961=y
> > CONFIG_ARCH_R8A77965=y
> > CONFIG_ARCH_R8A77970=y
> > CONFIG_ARCH_R8A77980=y
> > CONFIG_ARCH_R8A77990=y
> > CONFIG_ARCH_R8A77995=y
> > -CONFIG_QCOM_PDC=y
> > CONFIG_ROCKCHIP_PM_DOMAINS=y
> > CONFIG_ARCH_TEGRA_132_SOC=y
> > CONFIG_ARCH_TEGRA_210_SOC=y
> > @@ -809,6 +805,7 @@ CONFIG_PWM_ROCKCHIP=y
> > CONFIG_PWM_SAMSUNG=y
> > CONFIG_PWM_SUN4I=m
> > CONFIG_PWM_TEGRA=m
> > +CONFIG_QCOM_PDC=y
> > CONFIG_RESET_QCOM_AOSS=y
> > CONFIG_RESET_QCOM_PDC=m
> > CONFIG_RESET_TI_SCI=y
> > @@ -880,16 +877,16 @@ CONFIG_NLS_ISO8859_1=y
> > CONFIG_SECURITY=y
> > CONFIG_CRYPTO_ECHAINIV=y
> > CONFIG_CRYPTO_ANSI_CPRNG=y
> > +CONFIG_CRYPTO_USER_API_RNG=m
> > CONFIG_CRYPTO_DEV_SUN8I_CE=m
> > CONFIG_CRYPTO_DEV_FSL_CAAM=m
> > -CONFIG_CRYPTO_DEV_HISI_ZIP=m
> > -CONFIG_CRYPTO_USER_API_RNG=m
> > CONFIG_CRYPTO_DEV_QCOM_RNG=m
> > +CONFIG_CRYPTO_DEV_HISI_ZIP=m
> > CONFIG_CMA_SIZE_MBYTES=32
> > CONFIG_PRINTK_TIME=y
> > CONFIG_DEBUG_INFO=y
> > -CONFIG_DEBUG_FS=y
> > CONFIG_MAGIC_SYSRQ=y
> > +CONFIG_DEBUG_FS=y
> > CONFIG_DEBUG_KERNEL=y
> > # CONFIG_SCHED_DEBUG is not set
> > # CONFIG_DEBUG_PREEMPT is not set
> > --
> > 2.17.1
> >
On Tue, Feb 18, 2020 at 04:44:09PM +0000, Leo Li wrote:
>
>
> > -----Original Message-----
> > From: Shawn Guo <[email protected]>
> > Sent: Sunday, February 16, 2020 11:38 PM
> > To: Leo Li <[email protected]>
> > Cc: [email protected]; [email protected]
> > Subject: Re: [PATCH 2/2] arm64: defconfig: enable additional drivers needed
> > by NXP QorIQ boards
> >
> > On Mon, Feb 10, 2020 at 06:55:59PM -0600, Li Yang wrote:
> > > This enables the following SoC device drivers for NXP/FSL QorIQ SoCs:
> > > CONFIG_QORIQ_CPUFREQ=y
> > > CONFIG_NET_SWITCHDEV=y
> > > CONFIG_MSCC_OCELOT_SWITCH=y
> > > CONFIG_CAN=m
> > > CONFIG_CAN_FLEXCAN=m
> > > CONFIG_FSL_MC_BUS=y
> > > CONFIG_MTD_NAND_FSL_IFC=y
> > > CONFIG_FSL_ENETC=y
> > > CONFIG_FSL_ENETC_VF=y
> > > CONFIG_SPI_FSL_LPSPI=y
> > > CONFIG_SPI_FSL_QUADSPI=y
> > > CONFIG_SPI_FSL_DSPI=y
> > > CONFIG_GPIO_MPC8XXX=y
> > > CONFIG_ARM_SBSA_WATCHDOG=y
> > > CONFIG_DRM_MALI_DISPLAY=m
> > > CONFIG_FSL_MC_DPIO=y
> > > CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m
> > > CONFIG_FSL_DPAA=y
> > > CONFIG_FSL_FMAN=y
> > > CONFIG_FSL_DPAA_ETH=y
> > > CONFIG_FSL_DPAA2_ETH=y
> > >
> > > And the drivers for on-board devices for the upstreamed QorIQ
> > > reference
> > > boards:
> > > CONFIG_MTD_CFI=y
> > > CONFIG_MTD_CFI_ADV_OPTIONS=y
> > > CONFIG_MTD_CFI_INTELEXT=y
> > > CONFIG_MTD_CFI_AMDSTD=y
> > > CONFIG_MTD_CFI_STAA=y
> > > CONFIG_MTD_PHYSMAP=y
> > > CONFIG_MTD_PHYSMAP_OF=y
> > > CONFIG_MTD_DATAFLASH=y
> > > CONFIG_MTD_SST25L=y
> > > CONFIG_EEPROM_AT24=m
> > > CONFIG_RTC_DRV_DS1307=y
> > > CONFIG_RTC_DRV_PCF85363=y
> > > CONFIG_RTC_DRV_PCF2127=y
> > > CONFIG_E1000=y
> > > CONFIG_AQUANTIA_PHY=y
> > > CONFIG_MICROSEMI_PHY=y
> > > CONFIG_VITESSE_PHY=y
> > > CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y
> > > CONFIG_MUX_MMIO=y
> > >
> > > The following two options are implied by new options and removed from
> > > defconfig:
> > > CONFIG_CLK_QORIQ=y
> > > CONFIG_MEMORY=y
> > >
> > > Signed-off-by: Li Yang <[email protected]>
> >
> > This is too much change in a single patch. It should be split properly to make
> > review and merge easier, considering arm-soc folks are cautious to those 'y'
> > options.
>
> Ok. So probably separating them based on different subsystems will be good? It would be too many patches if I separate for each individual config option.
Yep, subsystem should be good. And for those 'y' options, please state
why they need necessarily to be 'y'.
Shawn