2020-02-26 05:33:30

by Jitao Shi

Subject: [PATCH v9 1/5] dt-bindings: media: add pclk-sample dual edge property

Some chips's sample mode are rising, falling and dual edge (both
falling and rising edge).
Extern the pclk-sample property to support dual edge.

Reviewed-by: CK Hu <[email protected]>
Signed-off-by: Jitao Shi <[email protected]>
---
Documentation/devicetree/bindings/media/video-interfaces.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt b/Documentation/devicetree/bindings/media/video-interfaces.txt
index f884ada0bffc..da9ad24935db 100644
--- a/Documentation/devicetree/bindings/media/video-interfaces.txt
+++ b/Documentation/devicetree/bindings/media/video-interfaces.txt
@@ -118,8 +118,8 @@ Optional endpoint properties
- data-enable-active: similar to HSYNC and VSYNC, specifies the data enable
signal polarity.
- field-even-active: field signal level during the even field data transmission.
-- pclk-sample: sample data on rising (1) or falling (0) edge of the pixel clock
- signal.
+- pclk-sample: sample data on rising (1), falling (0) or both rising and
+ falling (2) edge of the pixel clock signal.
- sync-on-green-active: active state of Sync-on-green (SoG) signal, 0/1 for
LOW/HIGH respectively.
- data-lanes: an array of physical data lane indexes. Position of an entry
--
2.21.0

2020-02-27 17:16:21

by Rob Herring (Arm)

Subject: Re: [PATCH v9 1/5] dt-bindings: media: add pclk-sample dual edge property

On Wed, 26 Feb 2020 13:32:34 +0800, Jitao Shi wrote:
> Some chips's sample mode are rising, falling and dual edge (both
> falling and rising edge).
> Extern the pclk-sample property to support dual edge.
>
> Reviewed-by: CK Hu <[email protected]>
> Signed-off-by: Jitao Shi <[email protected]>
> ---
> Documentation/devicetree/bindings/media/video-interfaces.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>

Acked-by: Rob Herring <[email protected]>