Hi,
This patch series adds support for SMCCCv1.2 ARCH_SOC_ID.
This doesn't add other changes added in SMCCC v1.2 yet. They will
follow these soon along with its first user SPCI/PSA-FF.
This is tested using upstream TF-A + the patch[1] fixing the original
implementation there.
v1[0]->v2:
- Incorporated comments from Steven Price in patch 5/5
- Fixed build for CONFIG_PSCI_FW=n on some arm32 platforms
- Added Steven Price's review tags
Regards,
Sudeep
[0] https://lore.kernel.org/r/[email protected]/
[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4001
Sudeep Holla (5):
arm/arm64: smccc: Update link to latest SMCCC specification
arm/arm64: smccc: Add the definition for SMCCCv1.2 version/error codes
arm/arm64: smccc: Drop smccc_version enum and use ARM_SMCCC_VERSION_1_x instead
firmware: psci: Add function to fetch SMCCC version
arm/arm64: smccc: Add ARCH_SOC_ID support
arch/arm64/kernel/paravirt.c | 2 +-
drivers/firmware/psci/Kconfig | 9 ++
drivers/firmware/psci/Makefile | 1 +
drivers/firmware/psci/psci.c | 13 ++-
drivers/firmware/psci/soc_id.c | 165 +++++++++++++++++++++++++++++++++
include/linux/arm-smccc.h | 23 ++++-
include/linux/psci.h | 7 +-
7 files changed, 207 insertions(+), 13 deletions(-)
create mode 100644 drivers/firmware/psci/soc_id.c
--
2.17.1
The current link gets redirected to the revision B published in November
2016 though it actually points to the original revision A published in
June 2013.
Let us update the link to point to the latest version, so that it
doesn't get stale anytime soon. Currently it points to v1.2 published in
March 2020.
Reviewed-by: Steven Price <[email protected]>
Signed-off-by: Sudeep Holla <[email protected]>
---
include/linux/arm-smccc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index 59494df0f55b..6c1d1eda3be4 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -10,7 +10,7 @@
/*
* This file provides common defines for ARM SMC Calling Convention as
* specified in
- * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
+ * https://developer.arm.com/docs/den0028/latest
*/
#define ARM_SMCCC_STD_CALL _AC(0,U)
--
2.17.1
For backward compatibility reasons, PSCI maintains SMCCC version as
SMCCC didn't provide ARM_SMCCC_VERSION_FUNC_ID until v1.1
Let us provide accessors to fetch the SMCCC version in PSCI so that
other SMCCC v1.1+ features can use it.
Signed-off-by: Sudeep Holla <[email protected]>
---
drivers/firmware/psci/psci.c | 5 +++++
include/linux/arm-smccc.h | 9 +++++++++
2 files changed, 14 insertions(+)
diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c
index 6a56d7196697..04426e16fee6 100644
--- a/drivers/firmware/psci/psci.c
+++ b/drivers/firmware/psci/psci.c
@@ -65,6 +65,11 @@ enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void)
return psci_ops.conduit;
}
+u32 arm_smccc_get_version(void)
+{
+ return psci_ops.smccc_version;
+}
+
typedef unsigned long (psci_fn)(unsigned long, unsigned long,
unsigned long, unsigned long);
static psci_fn *invoke_psci_fn;
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index 9d9a2e42e919..d6b0f4acc707 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -98,6 +98,15 @@ enum arm_smccc_conduit {
*/
enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
+/**
+ * arm_smccc_get_version()
+ *
+ * Returns the version to be used for SMCCCv1.1 or later.
+ *
+ * When SMCCCv1.1 or above is not present, assumes and returns SMCCCv1.0.
+ */
+u32 arm_smccc_get_version(void);
+
/**
* struct arm_smccc_res - Result from SMC/HVC call
* @a0-a3 result values from registers 0 to 3
--
2.17.1
SMCCC v1.2 adds a new optional function SMCCC_ARCH_SOC_ID to obtain a
SiP defined SoC identification value. Add support for the same.
Also using the SoC bus infrastructure, let us expose the platform
specific SoC atrributes under sysfs. We also provide custom sysfs for
the vendor ID as JEP-106 bank and identification code.
Signed-off-by: Sudeep Holla <[email protected]>
---
drivers/firmware/psci/Kconfig | 9 ++
drivers/firmware/psci/Makefile | 1 +
drivers/firmware/psci/soc_id.c | 165 +++++++++++++++++++++++++++++++++
include/linux/arm-smccc.h | 5 +
4 files changed, 180 insertions(+)
create mode 100644 drivers/firmware/psci/soc_id.c
diff --git a/drivers/firmware/psci/Kconfig b/drivers/firmware/psci/Kconfig
index 97944168b5e6..831399338289 100644
--- a/drivers/firmware/psci/Kconfig
+++ b/drivers/firmware/psci/Kconfig
@@ -12,3 +12,12 @@ config ARM_PSCI_CHECKER
The torture tests may interfere with the PSCI checker by turning CPUs
on and off through hotplug, so for now torture tests and PSCI checker
are mutually exclusive.
+
+config ARM_SMCCC_SOC_ID
+ bool "SoC bus device for the ARM SMCCC SOC_ID"
+ depends on ARM_PSCI_FW
+ default y if ARM_PSCI_FW
+ select SOC_BUS
+ help
+ Include support for the SoC bus on the ARM SMCCC firmware based
+ platforms providing some sysfs information about the SoC variant.
diff --git a/drivers/firmware/psci/Makefile b/drivers/firmware/psci/Makefile
index 1956b882470f..55596698d1ad 100644
--- a/drivers/firmware/psci/Makefile
+++ b/drivers/firmware/psci/Makefile
@@ -2,3 +2,4 @@
#
obj-$(CONFIG_ARM_PSCI_FW) += psci.o
obj-$(CONFIG_ARM_PSCI_CHECKER) += psci_checker.o
+obj-$(CONFIG_ARM_SMCCC_SOC_ID) += soc_id.o
diff --git a/drivers/firmware/psci/soc_id.c b/drivers/firmware/psci/soc_id.c
new file mode 100644
index 000000000000..b45f2d78e12e
--- /dev/null
+++ b/drivers/firmware/psci/soc_id.c
@@ -0,0 +1,165 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2020 Arm Limited
+ */
+
+#include <linux/arm-smccc.h>
+#include <linux/bitfield.h>
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+
+#define SMCCC_SOC_ID_JEP106_BANK_IDX_MASK GENMASK(30, 24)
+/*
+ * As per the spec bits[23:16] are JEP-106 identification code with parity bit
+ * for the SiP. We can drop the parity bit.
+ */
+#define SMCCC_SOC_ID_JEP106_ID_CODE_MASK GENMASK(22, 16)
+#define SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK GENMASK(15, 0)
+
+/* The bank index is equal to the for continuation code bank number - 1 */
+#define JEP106_BANK_CONT_CODE(x) \
+ (u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_BANK_IDX_MASK, (x)) + 1)
+#define JEP106_ID_CODE(x) \
+ (u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_ID_CODE_MASK, (x)))
+#define IMP_DEF_SOC_ID(x) \
+ (u16)(FIELD_GET(SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK, (x)))
+
+static int soc_id_version;
+static struct soc_device *soc_dev;
+static struct soc_device_attribute *soc_dev_attr;
+
+static int smccc_map_error_codes(unsigned long a0)
+{
+ if (a0 >= SMCCC_RET_SUCCESS)
+ return 0;
+ else if (a0 == SMCCC_RET_INVALID_PARAMETER)
+ return -EINVAL;
+ else if (a0 == SMCCC_RET_NOT_SUPPORTED)
+ return -EOPNOTSUPP;
+ return -EINVAL;
+}
+
+static int smccc_soc_id_support_check(void)
+{
+ struct arm_smccc_res res;
+
+ if (arm_smccc_1_1_get_conduit() == SMCCC_CONDUIT_NONE) {
+ pr_err("%s: invalid SMCCC conduit\n", __func__);
+ return -EOPNOTSUPP;
+ }
+
+ arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
+ ARM_SMCCC_ARCH_SOC_ID, &res);
+
+ return smccc_map_error_codes(res.a0);
+}
+
+static ssize_t
+jep106_cont_bank_code_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ return sprintf(buf, "%02x\n", JEP106_BANK_CONT_CODE(soc_id_version));
+}
+
+static DEVICE_ATTR_RO(jep106_cont_bank_code);
+
+static ssize_t
+jep106_identification_code_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return sprintf(buf, "%02x\n", JEP106_ID_CODE(soc_id_version));
+}
+
+static DEVICE_ATTR_RO(jep106_identification_code);
+
+static struct attribute *jep106_id_attrs[] = {
+ &dev_attr_jep106_cont_bank_code.attr,
+ &dev_attr_jep106_identification_code.attr,
+ NULL
+};
+
+ATTRIBUTE_GROUPS(jep106_id);
+
+static int __init smccc_soc_init(void)
+{
+ struct device *dev;
+ int ret, soc_id_rev;
+ struct arm_smccc_res res;
+ static char soc_id_str[8], soc_id_rev_str[12];
+
+ if (arm_smccc_get_version() < ARM_SMCCC_VERSION_1_2)
+ return 0;
+
+ ret = smccc_soc_id_support_check();
+ if (ret) {
+ pr_info("SMCCC SOC_ID not implemented, skipping ....\n");
+ return 0;
+ }
+
+ arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 0, &res);
+
+ ret = smccc_map_error_codes(res.a0);
+ if (ret) {
+ pr_info("SMCCC SOC_ID: failed to version, Err = %d\n", ret);
+ return ret;
+ }
+
+ soc_id_version = res.a0;
+
+ arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 1, &res);
+
+ ret = smccc_map_error_codes(res.a0);
+ if (ret) {
+ pr_info("SMCCC SOC_ID: failed to revision, Err = %d\n", ret);
+ return ret;
+ }
+
+ soc_id_rev = res.a0;
+
+ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+ if (!soc_dev_attr)
+ return -ENOMEM;
+
+ sprintf(soc_id_str, "0x%04x", IMP_DEF_SOC_ID(soc_id_version));
+ sprintf(soc_id_rev_str, "0x%08x", soc_id_rev);
+
+ soc_dev_attr->soc_id = soc_id_str;
+ soc_dev_attr->revision = soc_id_rev_str;
+
+ soc_dev = soc_device_register(soc_dev_attr);
+ if (IS_ERR(soc_dev)) {
+ ret = PTR_ERR(soc_dev);
+ goto free_soc;
+ }
+
+ dev = soc_device_to_device(soc_dev);
+
+ ret = devm_device_add_groups(dev, jep106_id_groups);
+ if (ret) {
+ dev_err(dev, "sysfs create failed: %d\n", ret);
+ goto unregister_soc;
+ }
+
+ pr_info("SMCCC SoC ID: %s Revision %s\n", soc_dev_attr->soc_id,
+ soc_dev_attr->revision);
+
+ return 0;
+
+unregister_soc:
+ soc_device_unregister(soc_dev);
+free_soc:
+ kfree(soc_dev_attr);
+ return ret;
+}
+module_init(smccc_soc_init);
+
+static void __exit smccc_soc_exit(void)
+{
+ if (soc_dev)
+ soc_device_unregister(soc_dev);
+ kfree(soc_dev_attr);
+}
+module_exit(smccc_soc_exit);
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index d6b0f4acc707..04414fc2000f 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -68,6 +68,11 @@
ARM_SMCCC_SMC_32, \
0, 1)
+#define ARM_SMCCC_ARCH_SOC_ID \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ 0, 2)
+
#define ARM_SMCCC_ARCH_WORKAROUND_1 \
ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
ARM_SMCCC_SMC_32, \
--
2.17.1
Instead of maintaining 2 sets of enums/macros for tracking SMCCC version,
let us drop smccc_version enum and use ARM_SMCCC_VERSION_1_x directly
instead.
Reviewed-by: Steven Price <[email protected]>
Signed-off-by: Sudeep Holla <[email protected]>
---
arch/arm64/kernel/paravirt.c | 2 +-
drivers/firmware/psci/psci.c | 8 ++++----
include/linux/psci.h | 7 +------
3 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/kernel/paravirt.c b/arch/arm64/kernel/paravirt.c
index 1ef702b0be2d..295d66490584 100644
--- a/arch/arm64/kernel/paravirt.c
+++ b/arch/arm64/kernel/paravirt.c
@@ -120,7 +120,7 @@ static bool has_pv_steal_clock(void)
struct arm_smccc_res res;
/* To detect the presence of PV time support we require SMCCC 1.1+ */
- if (psci_ops.smccc_version < SMCCC_VERSION_1_1)
+ if (arm_smccc_1_1_get_conduit() == SMCCC_CONDUIT_NONE)
return false;
arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c
index 2937d44b5df4..6a56d7196697 100644
--- a/drivers/firmware/psci/psci.c
+++ b/drivers/firmware/psci/psci.c
@@ -54,12 +54,12 @@ bool psci_tos_resident_on(int cpu)
struct psci_operations psci_ops = {
.conduit = SMCCC_CONDUIT_NONE,
- .smccc_version = SMCCC_VERSION_1_0,
+ .smccc_version = ARM_SMCCC_VERSION_1_0,
};
enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void)
{
- if (psci_ops.smccc_version < SMCCC_VERSION_1_1)
+ if (psci_ops.smccc_version < ARM_SMCCC_VERSION_1_1)
return SMCCC_CONDUIT_NONE;
return psci_ops.conduit;
@@ -411,8 +411,8 @@ static void __init psci_init_smccc(void)
if (feature != PSCI_RET_NOT_SUPPORTED) {
u32 ret;
ret = invoke_psci_fn(ARM_SMCCC_VERSION_FUNC_ID, 0, 0, 0);
- if (ret == ARM_SMCCC_VERSION_1_1) {
- psci_ops.smccc_version = SMCCC_VERSION_1_1;
+ if (ret >= ARM_SMCCC_VERSION_1_1) {
+ psci_ops.smccc_version = ret;
ver = ret;
}
}
diff --git a/include/linux/psci.h b/include/linux/psci.h
index a67712b73b6c..29bd0671e5bb 100644
--- a/include/linux/psci.h
+++ b/include/linux/psci.h
@@ -21,11 +21,6 @@ bool psci_power_state_is_valid(u32 state);
int psci_set_osi_mode(void);
bool psci_has_osi_support(void);
-enum smccc_version {
- SMCCC_VERSION_1_0,
- SMCCC_VERSION_1_1,
-};
-
struct psci_operations {
u32 (*get_version)(void);
int (*cpu_suspend)(u32 state, unsigned long entry_point);
@@ -36,7 +31,7 @@ struct psci_operations {
unsigned long lowest_affinity_level);
int (*migrate_info_type)(void);
enum arm_smccc_conduit conduit;
- enum smccc_version smccc_version;
+ u32 smccc_version;
};
extern struct psci_operations psci_ops;
--
2.17.1
Add the definition for SMCCC v1.2 version and new error code added.
While at it, also add a note that ARM DEN 0070A is deprecated and is
now merged into the main SMCCC specification(ARM DEN 0028C).
Reviewed-by: Steven Price <[email protected]>
Signed-off-by: Sudeep Holla <[email protected]>
---
include/linux/arm-smccc.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index 6c1d1eda3be4..9d9a2e42e919 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -56,6 +56,7 @@
#define ARM_SMCCC_VERSION_1_0 0x10000
#define ARM_SMCCC_VERSION_1_1 0x10001
+#define ARM_SMCCC_VERSION_1_2 0x10002
#define ARM_SMCCC_VERSION_FUNC_ID \
ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
@@ -314,10 +315,14 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
*/
#define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
-/* Return codes defined in ARM DEN 0070A */
+/*
+ * Return codes defined in ARM DEN 0070A
+ * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028C
+ */
#define SMCCC_RET_SUCCESS 0
#define SMCCC_RET_NOT_SUPPORTED -1
#define SMCCC_RET_NOT_REQUIRED -2
+#define SMCCC_RET_INVALID_PARAMETER -3
/*
* Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED.
--
2.17.1
On 04/05/2020 10:29, Sudeep Holla wrote:
> SMCCC v1.2 adds a new optional function SMCCC_ARCH_SOC_ID to obtain a
> SiP defined SoC identification value. Add support for the same.
>
> Also using the SoC bus infrastructure, let us expose the platform
> specific SoC atrributes under sysfs. We also provide custom sysfs for
> the vendor ID as JEP-106 bank and identification code.
>
> Signed-off-by: Sudeep Holla <[email protected]>
Some minor things below, but with those fixed:
Reviewed-by: Steven Price <[email protected]>
> ---
> drivers/firmware/psci/Kconfig | 9 ++
> drivers/firmware/psci/Makefile | 1 +
> drivers/firmware/psci/soc_id.c | 165 +++++++++++++++++++++++++++++++++
> include/linux/arm-smccc.h | 5 +
> 4 files changed, 180 insertions(+)
> create mode 100644 drivers/firmware/psci/soc_id.c
>
> diff --git a/drivers/firmware/psci/Kconfig b/drivers/firmware/psci/Kconfig
> index 97944168b5e6..831399338289 100644
> --- a/drivers/firmware/psci/Kconfig
> +++ b/drivers/firmware/psci/Kconfig
> @@ -12,3 +12,12 @@ config ARM_PSCI_CHECKER
> The torture tests may interfere with the PSCI checker by turning CPUs
> on and off through hotplug, so for now torture tests and PSCI checker
> are mutually exclusive.
> +
> +config ARM_SMCCC_SOC_ID
> + bool "SoC bus device for the ARM SMCCC SOC_ID"
> + depends on ARM_PSCI_FW
> + default y if ARM_PSCI_FW
Since it depends on ARM_PSCI_FW this "if" part is not needed.
> + select SOC_BUS
> + help
> + Include support for the SoC bus on the ARM SMCCC firmware based
> + platforms providing some sysfs information about the SoC variant.
> diff --git a/drivers/firmware/psci/Makefile b/drivers/firmware/psci/Makefile
> index 1956b882470f..55596698d1ad 100644
> --- a/drivers/firmware/psci/Makefile
> +++ b/drivers/firmware/psci/Makefile
> @@ -2,3 +2,4 @@
> #
> obj-$(CONFIG_ARM_PSCI_FW) += psci.o
> obj-$(CONFIG_ARM_PSCI_CHECKER) += psci_checker.o
> +obj-$(CONFIG_ARM_SMCCC_SOC_ID) += soc_id.o
> diff --git a/drivers/firmware/psci/soc_id.c b/drivers/firmware/psci/soc_id.c
> new file mode 100644
> index 000000000000..b45f2d78e12e
> --- /dev/null
> +++ b/drivers/firmware/psci/soc_id.c
> @@ -0,0 +1,165 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2020 Arm Limited
> + */
> +
> +#include <linux/arm-smccc.h>
> +#include <linux/bitfield.h>
> +#include <linux/device.h>
> +#include <linux/module.h>
> +#include <linux/kernel.h>
> +#include <linux/slab.h>
> +#include <linux/sys_soc.h>
> +
> +#define SMCCC_SOC_ID_JEP106_BANK_IDX_MASK GENMASK(30, 24)
> +/*
> + * As per the spec bits[23:16] are JEP-106 identification code with parity bit
> + * for the SiP. We can drop the parity bit.
> + */
> +#define SMCCC_SOC_ID_JEP106_ID_CODE_MASK GENMASK(22, 16)
> +#define SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK GENMASK(15, 0)
> +
> +/* The bank index is equal to the for continuation code bank number - 1 */
> +#define JEP106_BANK_CONT_CODE(x) \
> + (u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_BANK_IDX_MASK, (x)) + 1)
> +#define JEP106_ID_CODE(x) \
> + (u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_ID_CODE_MASK, (x)))
> +#define IMP_DEF_SOC_ID(x) \
> + (u16)(FIELD_GET(SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK, (x)))
> +
> +static int soc_id_version;
> +static struct soc_device *soc_dev;
> +static struct soc_device_attribute *soc_dev_attr;
> +
> +static int smccc_map_error_codes(unsigned long a0)
> +{
> + if (a0 >= SMCCC_RET_SUCCESS)
> + return 0;
> + else if (a0 == SMCCC_RET_INVALID_PARAMETER)
> + return -EINVAL;
> + else if (a0 == SMCCC_RET_NOT_SUPPORTED)
> + return -EOPNOTSUPP;
> + return -EINVAL;
> +}
> +
> +static int smccc_soc_id_support_check(void)
> +{
> + struct arm_smccc_res res;
> +
> + if (arm_smccc_1_1_get_conduit() == SMCCC_CONDUIT_NONE) {
> + pr_err("%s: invalid SMCCC conduit\n", __func__);
> + return -EOPNOTSUPP;
> + }
> +
> + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
> + ARM_SMCCC_ARCH_SOC_ID, &res);
> +
> + return smccc_map_error_codes(res.a0);
> +}
> +
> +static ssize_t
> +jep106_cont_bank_code_show(struct device *dev, struct device_attribute *attr,
> + char *buf)
> +{
> + return sprintf(buf, "%02x\n", JEP106_BANK_CONT_CODE(soc_id_version));
> +}
> +
> +static DEVICE_ATTR_RO(jep106_cont_bank_code);
> +
> +static ssize_t
> +jep106_identification_code_show(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + return sprintf(buf, "%02x\n", JEP106_ID_CODE(soc_id_version));
> +}
> +
> +static DEVICE_ATTR_RO(jep106_identification_code);
> +
> +static struct attribute *jep106_id_attrs[] = {
> + &dev_attr_jep106_cont_bank_code.attr,
> + &dev_attr_jep106_identification_code.attr,
> + NULL
> +};
> +
> +ATTRIBUTE_GROUPS(jep106_id);
> +
> +static int __init smccc_soc_init(void)
> +{
> + struct device *dev;
> + int ret, soc_id_rev;
> + struct arm_smccc_res res;
> + static char soc_id_str[8], soc_id_rev_str[12];
> +
> + if (arm_smccc_get_version() < ARM_SMCCC_VERSION_1_2)
> + return 0;
> +
> + ret = smccc_soc_id_support_check();
> + if (ret) {
> + pr_info("SMCCC SOC_ID not implemented, skipping ....\n");
> + return 0;
> + }
> +
> + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 0, &res);
> +
> + ret = smccc_map_error_codes(res.a0);
> + if (ret) {
> + pr_info("SMCCC SOC_ID: failed to version, Err = %d\n", ret);
^ get/fetch
> + return ret;
> + }
> +
> + soc_id_version = res.a0;
> +
> + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 1, &res);
> +
> + ret = smccc_map_error_codes(res.a0);
> + if (ret) {
> + pr_info("SMCCC SOC_ID: failed to revision, Err = %d\n", ret);
^ get/fetch
> + return ret;
> + }
> +
> + soc_id_rev = res.a0;
> +
> + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
> + if (!soc_dev_attr)
> + return -ENOMEM;
> +
> + sprintf(soc_id_str, "0x%04x", IMP_DEF_SOC_ID(soc_id_version));
> + sprintf(soc_id_rev_str, "0x%08x", soc_id_rev);
> +
> + soc_dev_attr->soc_id = soc_id_str;
> + soc_dev_attr->revision = soc_id_rev_str;
> +
> + soc_dev = soc_device_register(soc_dev_attr);
> + if (IS_ERR(soc_dev)) {
> + ret = PTR_ERR(soc_dev);
> + goto free_soc;
> + }
> +
> + dev = soc_device_to_device(soc_dev);
> +
> + ret = devm_device_add_groups(dev, jep106_id_groups);
> + if (ret) {
> + dev_err(dev, "sysfs create failed: %d\n", ret);
> + goto unregister_soc;
> + }
> +
> + pr_info("SMCCC SoC ID: %s Revision %s\n", soc_dev_attr->soc_id,
> + soc_dev_attr->revision);
All these pr_info()s have (almost) the same initial string, it might be
worth defining pr_fmt() and dropping it from the individual calls.
Steve
> +
> + return 0;
> +
> +unregister_soc:
> + soc_device_unregister(soc_dev);
> +free_soc:
> + kfree(soc_dev_attr);
> + return ret;
> +}
> +module_init(smccc_soc_init);
> +
> +static void __exit smccc_soc_exit(void)
> +{
> + if (soc_dev)
> + soc_device_unregister(soc_dev);
> + kfree(soc_dev_attr);
> +}
> +module_exit(smccc_soc_exit);
> diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
> index d6b0f4acc707..04414fc2000f 100644
> --- a/include/linux/arm-smccc.h
> +++ b/include/linux/arm-smccc.h
> @@ -68,6 +68,11 @@
> ARM_SMCCC_SMC_32, \
> 0, 1)
>
> +#define ARM_SMCCC_ARCH_SOC_ID \
> + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
> + ARM_SMCCC_SMC_32, \
> + 0, 2)
> +
> #define ARM_SMCCC_ARCH_WORKAROUND_1 \
> ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
> ARM_SMCCC_SMC_32, \
>
On 04/05/2020 10:29, Sudeep Holla wrote:
> For backward compatibility reasons, PSCI maintains SMCCC version as
> SMCCC didn't provide ARM_SMCCC_VERSION_FUNC_ID until v1.1
>
> Let us provide accessors to fetch the SMCCC version in PSCI so that
> other SMCCC v1.1+ features can use it.
Since it seems there is a good reason for this patch... ;)
Reviewed-by: Steven Price <[email protected]>
Steve
> Signed-off-by: Sudeep Holla <[email protected]>
> ---
> drivers/firmware/psci/psci.c | 5 +++++
> include/linux/arm-smccc.h | 9 +++++++++
> 2 files changed, 14 insertions(+)
>
> diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c
> index 6a56d7196697..04426e16fee6 100644
> --- a/drivers/firmware/psci/psci.c
> +++ b/drivers/firmware/psci/psci.c
> @@ -65,6 +65,11 @@ enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void)
> return psci_ops.conduit;
> }
>
> +u32 arm_smccc_get_version(void)
> +{
> + return psci_ops.smccc_version;
> +}
> +
> typedef unsigned long (psci_fn)(unsigned long, unsigned long,
> unsigned long, unsigned long);
> static psci_fn *invoke_psci_fn;
> diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
> index 9d9a2e42e919..d6b0f4acc707 100644
> --- a/include/linux/arm-smccc.h
> +++ b/include/linux/arm-smccc.h
> @@ -98,6 +98,15 @@ enum arm_smccc_conduit {
> */
> enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
>
> +/**
> + * arm_smccc_get_version()
> + *
> + * Returns the version to be used for SMCCCv1.1 or later.
> + *
> + * When SMCCCv1.1 or above is not present, assumes and returns SMCCCv1.0.
> + */
> +u32 arm_smccc_get_version(void);
> +
> /**
> * struct arm_smccc_res - Result from SMC/HVC call
> * @a0-a3 result values from registers 0 to 3
>
On Mon, May 04, 2020 at 03:10:23PM +0100, Steven Price wrote:
> On 04/05/2020 10:29, Sudeep Holla wrote:
> > SMCCC v1.2 adds a new optional function SMCCC_ARCH_SOC_ID to obtain a
> > SiP defined SoC identification value. Add support for the same.
> >
> > Also using the SoC bus infrastructure, let us expose the platform
> > specific SoC atrributes under sysfs. We also provide custom sysfs for
> > the vendor ID as JEP-106 bank and identification code.
> >
> > Signed-off-by: Sudeep Holla <[email protected]>
>
> Some minor things below, but with those fixed:
>
> Reviewed-by: Steven Price <[email protected]>
>
> > ---
> > drivers/firmware/psci/Kconfig | 9 ++
> > drivers/firmware/psci/Makefile | 1 +
> > drivers/firmware/psci/soc_id.c | 165 +++++++++++++++++++++++++++++++++
> > include/linux/arm-smccc.h | 5 +
> > 4 files changed, 180 insertions(+)
> > create mode 100644 drivers/firmware/psci/soc_id.c
> >
> > diff --git a/drivers/firmware/psci/Kconfig b/drivers/firmware/psci/Kconfig
> > index 97944168b5e6..831399338289 100644
> > --- a/drivers/firmware/psci/Kconfig
> > +++ b/drivers/firmware/psci/Kconfig
> > @@ -12,3 +12,12 @@ config ARM_PSCI_CHECKER
> > The torture tests may interfere with the PSCI checker by turning CPUs
> > on and off through hotplug, so for now torture tests and PSCI checker
> > are mutually exclusive.
> > +
> > +config ARM_SMCCC_SOC_ID
> > + bool "SoC bus device for the ARM SMCCC SOC_ID"
> > + depends on ARM_PSCI_FW
> > + default y if ARM_PSCI_FW
>
> Since it depends on ARM_PSCI_FW this "if" part is not needed.
>
Indeed, I was experimenting something and forgot to remove it.
> > + select SOC_BUS
> > + help
> > + Include support for the SoC bus on the ARM SMCCC firmware based
> > + platforms providing some sysfs information about the SoC variant.
> > diff --git a/drivers/firmware/psci/Makefile b/drivers/firmware/psci/Makefile
> > index 1956b882470f..55596698d1ad 100644
> > --- a/drivers/firmware/psci/Makefile
> > +++ b/drivers/firmware/psci/Makefile
> > @@ -2,3 +2,4 @@
> > #
> > obj-$(CONFIG_ARM_PSCI_FW) += psci.o
> > obj-$(CONFIG_ARM_PSCI_CHECKER) += psci_checker.o
> > +obj-$(CONFIG_ARM_SMCCC_SOC_ID) += soc_id.o
> > diff --git a/drivers/firmware/psci/soc_id.c b/drivers/firmware/psci/soc_id.c
> > new file mode 100644
> > index 000000000000..b45f2d78e12e
> > --- /dev/null
> > +++ b/drivers/firmware/psci/soc_id.c
> > @@ -0,0 +1,165 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright 2020 Arm Limited
> > + */
> > +
> > +#include <linux/arm-smccc.h>
> > +#include <linux/bitfield.h>
> > +#include <linux/device.h>
> > +#include <linux/module.h>
> > +#include <linux/kernel.h>
> > +#include <linux/slab.h>
> > +#include <linux/sys_soc.h>
> > +
> > +#define SMCCC_SOC_ID_JEP106_BANK_IDX_MASK GENMASK(30, 24)
> > +/*
> > + * As per the spec bits[23:16] are JEP-106 identification code with parity bit
> > + * for the SiP. We can drop the parity bit.
> > + */
> > +#define SMCCC_SOC_ID_JEP106_ID_CODE_MASK GENMASK(22, 16)
> > +#define SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK GENMASK(15, 0)
> > +
> > +/* The bank index is equal to the for continuation code bank number - 1 */
> > +#define JEP106_BANK_CONT_CODE(x) \
> > + (u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_BANK_IDX_MASK, (x)) + 1)
> > +#define JEP106_ID_CODE(x) \
> > + (u8)(FIELD_GET(SMCCC_SOC_ID_JEP106_ID_CODE_MASK, (x)))
> > +#define IMP_DEF_SOC_ID(x) \
> > + (u16)(FIELD_GET(SMCCC_SOC_ID_IMP_DEF_SOC_ID_MASK, (x)))
> > +
> > +static int soc_id_version;
> > +static struct soc_device *soc_dev;
> > +static struct soc_device_attribute *soc_dev_attr;
> > +
> > +static int smccc_map_error_codes(unsigned long a0)
> > +{
> > + if (a0 >= SMCCC_RET_SUCCESS)
> > + return 0;
> > + else if (a0 == SMCCC_RET_INVALID_PARAMETER)
> > + return -EINVAL;
> > + else if (a0 == SMCCC_RET_NOT_SUPPORTED)
> > + return -EOPNOTSUPP;
> > + return -EINVAL;
> > +}
> > +
> > +static int smccc_soc_id_support_check(void)
> > +{
> > + struct arm_smccc_res res;
> > +
> > + if (arm_smccc_1_1_get_conduit() == SMCCC_CONDUIT_NONE) {
> > + pr_err("%s: invalid SMCCC conduit\n", __func__);
> > + return -EOPNOTSUPP;
> > + }
> > +
> > + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
> > + ARM_SMCCC_ARCH_SOC_ID, &res);
> > +
> > + return smccc_map_error_codes(res.a0);
> > +}
> > +
> > +static ssize_t
> > +jep106_cont_bank_code_show(struct device *dev, struct device_attribute *attr,
> > + char *buf)
> > +{
> > + return sprintf(buf, "%02x\n", JEP106_BANK_CONT_CODE(soc_id_version));
> > +}
> > +
> > +static DEVICE_ATTR_RO(jep106_cont_bank_code);
> > +
> > +static ssize_t
> > +jep106_identification_code_show(struct device *dev,
> > + struct device_attribute *attr, char *buf)
> > +{
> > + return sprintf(buf, "%02x\n", JEP106_ID_CODE(soc_id_version));
> > +}
> > +
> > +static DEVICE_ATTR_RO(jep106_identification_code);
> > +
> > +static struct attribute *jep106_id_attrs[] = {
> > + &dev_attr_jep106_cont_bank_code.attr,
> > + &dev_attr_jep106_identification_code.attr,
> > + NULL
> > +};
> > +
> > +ATTRIBUTE_GROUPS(jep106_id);
> > +
> > +static int __init smccc_soc_init(void)
> > +{
> > + struct device *dev;
> > + int ret, soc_id_rev;
> > + struct arm_smccc_res res;
> > + static char soc_id_str[8], soc_id_rev_str[12];
> > +
> > + if (arm_smccc_get_version() < ARM_SMCCC_VERSION_1_2)
> > + return 0;
> > +
> > + ret = smccc_soc_id_support_check();
> > + if (ret) {
> > + pr_info("SMCCC SOC_ID not implemented, skipping ....\n");
> > + return 0;
> > + }
> > +
> > + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 0, &res);
> > +
> > + ret = smccc_map_error_codes(res.a0);
> > + if (ret) {
> > + pr_info("SMCCC SOC_ID: failed to version, Err = %d\n", ret);
> ^ get/fetch
> > + return ret;
> > + }
> > +
> > + soc_id_version = res.a0;
> > +
> > + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 1, &res);
> > +
> > + ret = smccc_map_error_codes(res.a0);
> > + if (ret) {
> > + pr_info("SMCCC SOC_ID: failed to revision, Err = %d\n", ret);
> ^ get/fetch
Will fix it.
> > + return ret;
> > + }
> > +
> > + soc_id_rev = res.a0;
> > +
> > + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
> > + if (!soc_dev_attr)
> > + return -ENOMEM;
> > +
> > + sprintf(soc_id_str, "0x%04x", IMP_DEF_SOC_ID(soc_id_version));
> > + sprintf(soc_id_rev_str, "0x%08x", soc_id_rev);
> > +
> > + soc_dev_attr->soc_id = soc_id_str;
> > + soc_dev_attr->revision = soc_id_rev_str;
> > +
> > + soc_dev = soc_device_register(soc_dev_attr);
> > + if (IS_ERR(soc_dev)) {
> > + ret = PTR_ERR(soc_dev);
> > + goto free_soc;
> > + }
> > +
> > + dev = soc_device_to_device(soc_dev);
> > +
> > + ret = devm_device_add_groups(dev, jep106_id_groups);
> > + if (ret) {
> > + dev_err(dev, "sysfs create failed: %d\n", ret);
> > + goto unregister_soc;
> > + }
> > +
> > + pr_info("SMCCC SoC ID: %s Revision %s\n", soc_dev_attr->soc_id,
> > + soc_dev_attr->revision);
>
> All these pr_info()s have (almost) the same initial string, it might be
> worth defining pr_fmt() and dropping it from the individual calls.
>
Makes sense, will do that. Thanks again for the review.
--
Regards,
Sudeep
On Mon, May 04, 2020 at 10:29:05AM +0100, Sudeep Holla wrote:
> diff --git a/drivers/firmware/psci/soc_id.c b/drivers/firmware/psci/soc_id.c
> new file mode 100644
> index 000000000000..b45f2d78e12e
> --- /dev/null
> +++ b/drivers/firmware/psci/soc_id.c
> @@ -0,0 +1,165 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2020 Arm Limited
> + */
> +
> +#include <linux/arm-smccc.h>
> +#include <linux/bitfield.h>
> +#include <linux/device.h>
> +#include <linux/module.h>
> +#include <linux/kernel.h>
> +#include <linux/slab.h>
> +#include <linux/sys_soc.h>
> +
> +#define SMCCC_SOC_ID_JEP106_BANK_IDX_MASK GENMASK(30, 24)
> +/*
> + * As per the spec bits[23:16] are JEP-106 identification code with parity bit
> + * for the SiP. We can drop the parity bit.
> + */
Which spec? Could you link to the doc and section here, please?
Will
On Tue, May 05, 2020 at 05:20:50PM +0100, Will Deacon wrote:
> On Mon, May 04, 2020 at 10:29:05AM +0100, Sudeep Holla wrote:
> > diff --git a/drivers/firmware/psci/soc_id.c b/drivers/firmware/psci/soc_id.c
> > new file mode 100644
> > index 000000000000..b45f2d78e12e
> > --- /dev/null
> > +++ b/drivers/firmware/psci/soc_id.c
> > @@ -0,0 +1,165 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright 2020 Arm Limited
> > + */
> > +
> > +#include <linux/arm-smccc.h>
> > +#include <linux/bitfield.h>
> > +#include <linux/device.h>
> > +#include <linux/module.h>
> > +#include <linux/kernel.h>
> > +#include <linux/slab.h>
> > +#include <linux/sys_soc.h>
> > +
> > +#define SMCCC_SOC_ID_JEP106_BANK_IDX_MASK GENMASK(30, 24)
> > +/*
> > + * As per the spec bits[23:16] are JEP-106 identification code with parity bit
> > + * for the SiP. We can drop the parity bit.
> > + */
>
> Which spec? Could you link to the doc and section here, please?
>
Sure, sorry since I updated the link in 1/5, I forgot all of it and just
started referring it here.
--
Regards,
Sudeep