2020-06-12 15:26:02

by Christophe Kerello

Subject: [PATCH v5 2/6] dt-bindings: mtd: update STM32 FMC2 NAND controller documentation

These bindings can be used on SOCs where the FMC2 NAND controller is
in standalone. In case that the FMC2 embeds 2 controllers (an external
bus controller and a raw NAND controller), the register base address,
the clock and the reset will be defined in the parent node.

Signed-off-by: Christophe Kerello <[email protected]>
---
Changes in v4:
- add new NFC compatible string to handle reg number of entries.

.../bindings/mtd/st,stm32-fmc2-nand.yaml | 83 +++++++++++++++-------
1 file changed, 57 insertions(+), 26 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml
index b059267..6ae7de1 100644
--- a/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml
+++ b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml
@@ -9,32 +9,19 @@ title: STMicroelectronics Flexible Memory Controller 2 (FMC2) Bindings
maintainers:
- Christophe Kerello <[email protected]>

-allOf:
- - $ref: "nand-controller.yaml#"
-
properties:
compatible:
- const: st,stm32mp15-fmc2
+ enum:
+ - st,stm32mp15-fmc2
+ - st,stm32mp1-fmc2-nfc

reg:
- items:
- - description: Registers
- - description: Chip select 0 data
- - description: Chip select 0 command
- - description: Chip select 0 address space
- - description: Chip select 1 data
- - description: Chip select 1 command
- - description: Chip select 1 address space
+ minItems: 6
+ maxItems: 7

interrupts:
maxItems: 1

- clocks:
- maxItems: 1
-
- resets:
- maxItems: 1
-
dmas:
items:
- description: tx DMA channel
@@ -57,11 +44,55 @@ patternProperties:
nand-ecc-strength:
enum: [1, 4 ,8 ]

+allOf:
+ - $ref: "nand-controller.yaml#"
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32mp15-fmc2
+ then:
+ properties:
+ reg:
+ items:
+ - description: Registers
+ - description: Chip select 0 data
+ - description: Chip select 0 command
+ - description: Chip select 0 address space
+ - description: Chip select 1 data
+ - description: Chip select 1 command
+ - description: Chip select 1 address space
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ required:
+ - clocks
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32mp1-fmc2-nfc
+ then:
+ properties:
+ reg:
+ items:
+ - description: Chip select 0 data
+ - description: Chip select 0 command
+ - description: Chip select 0 address space
+ - description: Chip select 1 data
+ - description: Chip select 1 command
+ - description: Chip select 1 address space
+
required:
- compatible
- reg
- interrupts
- - clocks

examples:
- |
@@ -77,13 +108,13 @@ examples:
<0x81000000 0x1000>,
<0x89010000 0x1000>,
<0x89020000 0x1000>;
- interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&mdma1 20 0x10 0x12000a02 0x0 0x0>,
- <&mdma1 20 0x10 0x12000a08 0x0 0x0>,
- <&mdma1 21 0x10 0x12000a0a 0x0 0x0>;
- dma-names = "tx", "rx", "ecc";
- clocks = <&rcc FMC_K>;
- resets = <&rcc FMC_R>;
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
+ <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
+ <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
+ dma-names = "tx", "rx", "ecc";
+ clocks = <&rcc FMC_K>;
+ resets = <&rcc FMC_R>;
#address-cells = <1>;
#size-cells = <0>;

--
1.9.1

2020-07-07 19:01:20

by Miquel Raynal

Subject: Re: [PATCH v5 2/6] dt-bindings: mtd: update STM32 FMC2 NAND controller documentation

On Fri, 2020-06-12 at 15:22:38 UTC, Christophe Kerello wrote:
> These bindings can be used on SOCs where the FMC2 NAND controller is
> in standalone. In case that the FMC2 embeds 2 controllers (an external
> bus controller and a raw NAND controller), the register base address,
> the clock and the reset will be defined in the parent node.
>
> Signed-off-by: Christophe Kerello <[email protected]>

Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/next, thanks.

Miquel