From: Alexandru Tachici <[email protected]>
Add PMBus probing driver for the adm1266 Cascadable
Super Sequencer with Margin Control and Fault Recording.
Driver is using the pmbus_core, creating sysfs files
under hwmon for inputs: vh1->vh4 and vp1->vp13.
1. Add PMBus probing driver for inputs vh1->vh4
and vp1->vp13.
2. Add Block Write-Read Process Call command.
A PMBus specific implementation was required because
block write with I2C_SMBUS_PROC_CALL flag allows a
maximum of 32 bytes to be received.
3. This makes adm1266 driver expose GPIOs
to user-space. Currently are read only. Future
developments on the firmware will allow
them to be writable.
4. Allow the current sate of the sequencer to be read
through debugfs.
5. Blackboxes are 64 bytes of chip state related data
that is generated on faults. Use the nvmem kernel api
to expose the blackbox chip functionality to userspace.
6. Add group command support. This will allow the driver
to stop/program all cascaded adm1266 devices at once.
7. Writing the firmware hex file with offset 0
to the nvmem of the master adm1266 will trigger
the firmware programming of all cascaded devices.
The master adm1266 of each device is specified in
the devicetree.
8. Writing the configuration hex file to 0x30000
byte address of the nvmem file will trigger the
programming of that device in particular.
9. DT bindings for ADM1266.
Alexandru Tachici (9):
hwmon: pmbus: adm1266: add support
hwmon: pmbus: adm1266: Add Block process call
hwmon: pmbus: adm1266: Add support for GPIOs
hwmon: pmbus: adm1266: add debugfs for states
hwmon: pmbus: adm1266: read blackbox
hwmon: pmbus: adm1266: Add group command support
hwmon: pmbus: adm1266: program firmware
hwmon: pmbus: adm1266: program configuration
dt-bindings: hwmon: Add bindings for ADM1266
Changelog: v5 -> v6:
- added adm1266 to index.rst
- changed max lines length from 80 to 100
- replaced i2c_get_dma_safe_msg_buf with the use of kzalloc and ____cacheline_aligned
- removed #ifdef CONFIG_GPIOLIB
- removed ioctl commands, the state of the device can be read through debugfs
- use the device managed version of nvmem_register
- on power-up, set the UNIX time to adm1266 (this value is reset
to 0 on each power-cycle).
- removed patch adm1266: debugfs for blackbox info, rtc in blackbox is enough
to help identify the current index
- added two new nvmem cells for firmware and configuration
Changelog: v6 -> v7:
- fixed compilation warning: removed unused variable ,entry, in
adm1266_init_debugfs
.../bindings/hwmon/adi,adm1266.yaml | 56 +
Documentation/hwmon/adm1266.rst | 37 +
Documentation/hwmon/index.rst | 1 +
drivers/hwmon/pmbus/Kconfig | 10 +
drivers/hwmon/pmbus/Makefile | 1 +
drivers/hwmon/pmbus/adm1266.c | 1272 +++++++++++++++++
6 files changed, 1377 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml
create mode 100644 Documentation/hwmon/adm1266.rst
create mode 100644 drivers/hwmon/pmbus/adm1266.c
--
2.20.1
From: Alexandru Tachici <[email protected]>
Writing the configuration Intel hex file to the nvmem,
of an adm1266, with offset 0x30000, will now
trigger the configuration programming.
During this process the adm1266 sequencer will be
stopped and at the end will be issued a seq reset
(see AN-1453 Programming the configuration).
Signed-off-by: Alexandru Tachici <[email protected]>
---
drivers/hwmon/pmbus/adm1266.c | 179 +++++++++++++++++++++++++++++++++-
1 file changed, 178 insertions(+), 1 deletion(-)
diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
index f851c6617870..50386c98d714 100644
--- a/drivers/hwmon/pmbus/adm1266.c
+++ b/drivers/hwmon/pmbus/adm1266.c
@@ -40,7 +40,10 @@
#define ADM1266_BLACKBOX_INFO 0xE6
#define ADM1266_PDIO_STATUS 0xE9
#define ADM1266_GPIO_STATUS 0xEA
+#define ADM1266_STATUS_MFR_2 0xED
+#define ADM1266_REFRESH_FLASH 0xF5
#define ADM1266_MEMORY_CONFIG 0xF8
+#define ADM1266_MEMORY_CRC 0xF9
#define ADM1266_SWITCH_MEMORY 0xFA
#define ADM1266_UPDATE_FW 0xFC
#define ADM1266_FW_PASSWORD 0xFD
@@ -66,6 +69,11 @@
/* ADM1266 STATUS_MFR defines */
#define ADM1266_STATUS_PART_LOCKED(x) FIELD_GET(BIT(2), x)
+#define ADM1266_RUNNING_REFRESH(x) FIELD_GET(BIT(3), x)
+#define ADM1266_ALL_CRC_FAULT(x) FIELD_GET(BIT(5), x)
+
+/* ADM1266 STATUS_MFR_2 defines */
+#define ADM1266_MAIN_CONFIG_FAULT(x) FIELD_GET(GENMASK(9, 8), x)
/* ADM1266 GO_COMMAND defines */
#define ADM1266_GO_COMMAND_STOP BIT(0)
@@ -74,6 +82,8 @@
#define ADM1266_FIRMWARE_OFFSET 0x00000
#define ADM1266_FIRMWARE_SIZE 131072
+#define ADM1266_CONFIG_OFFSET 0x30000
+#define ADM1266_CONFIG_SIZE 131072
#define ADM1266_BLACKBOX_OFFSET 0x7F700
#define ADM1266_BLACKBOX_SIZE 64
@@ -117,6 +127,11 @@ static const struct nvmem_cell_info adm1266_nvmem_cells[] = {
.offset = ADM1266_FIRMWARE_OFFSET,
.bytes = ADM1266_FIRMWARE_SIZE,
},
+ {
+ .name = "configuration",
+ .offset = ADM1266_CONFIG_OFFSET,
+ .bytes = ADM1266_CONFIG_SIZE,
+ },
};
DECLARE_CRC8_TABLE(pmbus_crc_table);
@@ -520,6 +535,9 @@ static int adm1266_read_mem_cell(struct adm1266_data *data, const struct nvmem_c
case ADM1266_FIRMWARE_OFFSET:
/* firmware is write-only */
return 0;
+ case ADM1266_CONFIG_OFFSET:
+ /* configuration is write-only */
+ return 0;
default:
return -EINVAL;
}
@@ -676,6 +694,7 @@ static int adm1266_write_hex(struct adm1266_data *data,
u8 first_writes[7];
u8 byte_count;
u8 reg_address;
+ bool to_slaves = false;
int ret;
int i;
@@ -706,7 +725,10 @@ static int adm1266_write_hex(struct adm1266_data *data,
if (ret < 0)
return ret;
- ret = adm1266_group_cmd(data, reg_address, write_buf, byte_count, true);
+ if (offset == ADM1266_FIRMWARE_OFFSET)
+ to_slaves = true;
+
+ ret = adm1266_group_cmd(data, reg_address, write_buf, byte_count, to_slaves);
if (ret < 0) {
dev_err(&data->client->dev, "Firmware write error: %d.", ret);
return ret;
@@ -731,6 +753,87 @@ static int adm1266_write_hex(struct adm1266_data *data,
return 0;
}
+static int adm1266_verify_memory(struct adm1266_data *data)
+{
+ char cmd[2];
+ int ret;
+ int reg;
+
+ cmd[0] = 0x1;
+ cmd[1] = 0x0;
+ ret = adm1266_group_cmd(data, ADM1266_MEMORY_CRC, cmd,
+ sizeof(cmd), true);
+ if (ret < 0)
+ return ret;
+
+ /* after issuing a memory recalculate crc command, wait 1000 ms */
+ msleep(1000);
+
+ reg = pmbus_read_word_data(data->client, 0, 0xFF, ADM1266_STATUS_MFR_2);
+ if (reg < 0)
+ return reg;
+
+ if (ADM1266_MAIN_CONFIG_FAULT(reg)) {
+ dev_err(&data->client->dev, "Main memory corrupted.");
+ return -EFAULT;
+ }
+
+ return 0;
+}
+
+static int adm1266_refresh_memory(struct adm1266_data *data)
+{
+ unsigned int timeout = 9000;
+ int ret;
+ u8 cmd[2];
+
+ cmd[0] = 0x2;
+ ret = adm1266_group_cmd(data, ADM1266_REFRESH_FLASH, cmd, 1, true);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Could not refresh flash.");
+ return ret;
+ }
+
+ /* after issuing a refresh flash command, wait 9000 ms */
+ msleep(9000);
+
+ do {
+ msleep(1000);
+ timeout -= 1000;
+
+ ret = pmbus_read_byte_data(data->client, 0, ADM1266_STATUS_MFR);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Could not read status.");
+ return ret;
+ }
+
+ } while (ADM1266_RUNNING_REFRESH(ret) && timeout > 0);
+
+ if (timeout == 0)
+ return -ETIMEDOUT;
+
+ cmd[0] = 0x1;
+ cmd[1] = 0x0;
+ ret = adm1266_group_cmd(data, ADM1266_MEMORY_CRC, cmd,
+ sizeof(cmd), true);
+ if (ret < 0)
+ return ret;
+
+ /* after issuing a memory recalculate crc command, wait 1000 ms */
+ msleep(1000);
+
+ ret = pmbus_read_byte_data(data->client, 0, ADM1266_STATUS_MFR);
+ if (ret < 0)
+ return ret;
+
+ if (ADM1266_ALL_CRC_FAULT(ret)) {
+ dev_err(&data->client->dev, "CRC checks failed.");
+ return ret;
+ }
+
+ return 0;
+}
+
static int adm1266_program_firmware(struct adm1266_data *data)
{
u8 write_data[3];
@@ -783,6 +886,77 @@ static int adm1266_program_firmware(struct adm1266_data *data)
return ret;
}
+static int adm1266_program_config(struct adm1266_data *data)
+{
+ u8 cmd[2];
+ u8 value;
+ int ret;
+
+ value = ADM1266_GO_COMMAND_STOP | ADM1266_GO_COMMAND_SEQ_RES;
+ ret = pmbus_write_word_data(data->client, 0, ADM1266_GO_COMMAND, value);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Could not stop sequence.");
+ return ret;
+ }
+
+ /* after issuing a stop command, wait 100 ms */
+ msleep(100);
+
+ ret = adm1266_unlock_all_dev(data);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Could not unlock dev.");
+ goto lock_all_devices;
+ }
+
+ value = 0;
+ ret = i2c_smbus_write_block_data(data->client, ADM1266_SWITCH_MEMORY, 1, &value);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Could not switch to main mem.");
+ goto lock_all_devices;
+ }
+
+ /* after issuing a SWITCH_MEMORY command, wait 1000 ms */
+ msleep(1000);
+
+ ret = adm1266_write_hex(data, ADM1266_CONFIG_OFFSET, ADM1266_CONFIG_SIZE);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Could not write configuration.");
+ goto lock_all_devices;
+ }
+
+ ret = pmbus_write_byte(data->client, 0, ADM1266_STORE_USER_ALL);
+ if (ret < 0)
+ return ret;
+
+ /* after issuing a STORE_USER_ALL command, wait 300 ms */
+ msleep(300);
+
+ if (!data->master_dev)
+ goto lock_all_devices;
+
+ ret = adm1266_verify_memory(data);
+ if (ret < 0)
+ goto lock_all_devices;
+
+ cmd[0] = 0;
+ cmd[1] = 0;
+ ret = adm1266_group_cmd(data, ADM1266_GO_COMMAND, cmd, sizeof(cmd), true);
+ if (ret < 0) {
+ dev_err(&data->client->dev, "Could not restart sequence.");
+ goto lock_all_devices;
+ }
+
+ /* after issuing a restart sequence command, wait 350 ms */
+ msleep(350);
+
+ ret = adm1266_refresh_memory(data);
+
+lock_all_devices:
+ adm1266_lock_all_dev(data);
+
+ return ret;
+}
+
/* check if firmware/config write has ended */
static bool adm1266_check_ending(struct adm1266_data *data, unsigned int offset,
unsigned int size)
@@ -824,6 +998,9 @@ static int adm1266_write_mem_cell(struct adm1266_data *data,
program_func = &adm1266_program_firmware;
break;
+ case ADM1266_CONFIG_OFFSET:
+ program_func = &adm1266_program_config;
+ break;
default:
return -EINVAL;
}
--
2.20.1
From: Alexandru Tachici <[email protected]>
Add a debugfs entry which prints the current state
of the adm1266 sequencer.
Signed-off-by: Alexandru Tachici <[email protected]>
---
drivers/hwmon/pmbus/adm1266.c | 41 ++++++++++++++++++++++++++++++++++-
1 file changed, 40 insertions(+), 1 deletion(-)
diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
index be911de02cf6..0ea016b7e113 100644
--- a/drivers/hwmon/pmbus/adm1266.c
+++ b/drivers/hwmon/pmbus/adm1266.c
@@ -19,6 +19,7 @@
#include <linux/slab.h>
#define ADM1266_PDIO_CONFIG 0xD4
+#define ADM1266_READ_STATE 0xD9
#define ADM1266_GPIO_CONFIG 0xE1
#define ADM1266_PDIO_STATUS 0xE9
#define ADM1266_GPIO_STATUS 0xEA
@@ -43,6 +44,7 @@ struct adm1266_data {
struct gpio_chip gc;
const char *gpio_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR];
struct i2c_client *client;
+ struct dentry *debugfs_dir;
struct mutex buf_mutex;
u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
@@ -287,6 +289,37 @@ static int adm1266_config_gpio(struct adm1266_data *data)
return ret;
}
+static int adm1266_state_read(struct seq_file *s, void *pdata)
+{
+ struct device *dev = s->private;
+ struct i2c_client *client = to_i2c_client(dev);
+ int ret;
+
+ ret = i2c_smbus_read_word_data(client, ADM1266_READ_STATE);
+ if (ret < 0)
+ return ret;
+
+ seq_printf(s, "%d\n", ret);
+
+ return 0;
+}
+
+static void adm1266_init_debugfs(struct adm1266_data *data)
+{
+ struct dentry *root;
+
+ root = pmbus_get_debugfs_dir(data->client);
+ if (!root)
+ return;
+
+ data->debugfs_dir = debugfs_create_dir(data->client->name, root);
+ if (!data->debugfs_dir)
+ return;
+
+ debugfs_create_devm_seqfile(&data->client->dev, "sequencer_state", data->debugfs_dir,
+ adm1266_state_read);
+}
+
static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct adm1266_data *data;
@@ -310,7 +343,13 @@ static int adm1266_probe(struct i2c_client *client, const struct i2c_device_id *
if (ret < 0)
return ret;
- return pmbus_do_probe(client, id, &data->info);
+ ret = pmbus_do_probe(client, id, &data->info);
+ if (ret)
+ return ret;
+
+ adm1266_init_debugfs(data);
+
+ return 0;
}
static const struct of_device_id adm1266_of_match[] = {
--
2.20.1
On Mon, Jul 27, 2020 at 07:19:27PM +0300, [email protected] wrote:
> From: Alexandru Tachici <[email protected]>
>
> Writing the configuration Intel hex file to the nvmem,
> of an adm1266, with offset 0x30000, will now
> trigger the configuration programming.
>
> During this process the adm1266 sequencer will be
> stopped and at the end will be issued a seq reset
> (see AN-1453 Programming the configuration).
>
Same as writing the firmware: This should be done from userspace,
using i2c-dev, in a controlled environment (eg manufacturing).
It can easily brick the hardware, and should not be done in the driver.
Thanks,
Guenter
> Signed-off-by: Alexandru Tachici <[email protected]>
> ---
> drivers/hwmon/pmbus/adm1266.c | 179 +++++++++++++++++++++++++++++++++-
> 1 file changed, 178 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c
> index f851c6617870..50386c98d714 100644
> --- a/drivers/hwmon/pmbus/adm1266.c
> +++ b/drivers/hwmon/pmbus/adm1266.c
> @@ -40,7 +40,10 @@
> #define ADM1266_BLACKBOX_INFO 0xE6
> #define ADM1266_PDIO_STATUS 0xE9
> #define ADM1266_GPIO_STATUS 0xEA
> +#define ADM1266_STATUS_MFR_2 0xED
> +#define ADM1266_REFRESH_FLASH 0xF5
> #define ADM1266_MEMORY_CONFIG 0xF8
> +#define ADM1266_MEMORY_CRC 0xF9
> #define ADM1266_SWITCH_MEMORY 0xFA
> #define ADM1266_UPDATE_FW 0xFC
> #define ADM1266_FW_PASSWORD 0xFD
> @@ -66,6 +69,11 @@
>
> /* ADM1266 STATUS_MFR defines */
> #define ADM1266_STATUS_PART_LOCKED(x) FIELD_GET(BIT(2), x)
> +#define ADM1266_RUNNING_REFRESH(x) FIELD_GET(BIT(3), x)
> +#define ADM1266_ALL_CRC_FAULT(x) FIELD_GET(BIT(5), x)
> +
> +/* ADM1266 STATUS_MFR_2 defines */
> +#define ADM1266_MAIN_CONFIG_FAULT(x) FIELD_GET(GENMASK(9, 8), x)
>
> /* ADM1266 GO_COMMAND defines */
> #define ADM1266_GO_COMMAND_STOP BIT(0)
> @@ -74,6 +82,8 @@
>
> #define ADM1266_FIRMWARE_OFFSET 0x00000
> #define ADM1266_FIRMWARE_SIZE 131072
> +#define ADM1266_CONFIG_OFFSET 0x30000
> +#define ADM1266_CONFIG_SIZE 131072
> #define ADM1266_BLACKBOX_OFFSET 0x7F700
> #define ADM1266_BLACKBOX_SIZE 64
>
> @@ -117,6 +127,11 @@ static const struct nvmem_cell_info adm1266_nvmem_cells[] = {
> .offset = ADM1266_FIRMWARE_OFFSET,
> .bytes = ADM1266_FIRMWARE_SIZE,
> },
> + {
> + .name = "configuration",
> + .offset = ADM1266_CONFIG_OFFSET,
> + .bytes = ADM1266_CONFIG_SIZE,
> + },
> };
>
> DECLARE_CRC8_TABLE(pmbus_crc_table);
> @@ -520,6 +535,9 @@ static int adm1266_read_mem_cell(struct adm1266_data *data, const struct nvmem_c
> case ADM1266_FIRMWARE_OFFSET:
> /* firmware is write-only */
> return 0;
> + case ADM1266_CONFIG_OFFSET:
> + /* configuration is write-only */
> + return 0;
> default:
> return -EINVAL;
> }
> @@ -676,6 +694,7 @@ static int adm1266_write_hex(struct adm1266_data *data,
> u8 first_writes[7];
> u8 byte_count;
> u8 reg_address;
> + bool to_slaves = false;
> int ret;
> int i;
>
> @@ -706,7 +725,10 @@ static int adm1266_write_hex(struct adm1266_data *data,
> if (ret < 0)
> return ret;
>
> - ret = adm1266_group_cmd(data, reg_address, write_buf, byte_count, true);
> + if (offset == ADM1266_FIRMWARE_OFFSET)
> + to_slaves = true;
> +
> + ret = adm1266_group_cmd(data, reg_address, write_buf, byte_count, to_slaves);
> if (ret < 0) {
> dev_err(&data->client->dev, "Firmware write error: %d.", ret);
> return ret;
> @@ -731,6 +753,87 @@ static int adm1266_write_hex(struct adm1266_data *data,
> return 0;
> }
>
> +static int adm1266_verify_memory(struct adm1266_data *data)
> +{
> + char cmd[2];
> + int ret;
> + int reg;
> +
> + cmd[0] = 0x1;
> + cmd[1] = 0x0;
> + ret = adm1266_group_cmd(data, ADM1266_MEMORY_CRC, cmd,
> + sizeof(cmd), true);
> + if (ret < 0)
> + return ret;
> +
> + /* after issuing a memory recalculate crc command, wait 1000 ms */
> + msleep(1000);
> +
> + reg = pmbus_read_word_data(data->client, 0, 0xFF, ADM1266_STATUS_MFR_2);
> + if (reg < 0)
> + return reg;
> +
> + if (ADM1266_MAIN_CONFIG_FAULT(reg)) {
> + dev_err(&data->client->dev, "Main memory corrupted.");
> + return -EFAULT;
> + }
> +
> + return 0;
> +}
> +
> +static int adm1266_refresh_memory(struct adm1266_data *data)
> +{
> + unsigned int timeout = 9000;
> + int ret;
> + u8 cmd[2];
> +
> + cmd[0] = 0x2;
> + ret = adm1266_group_cmd(data, ADM1266_REFRESH_FLASH, cmd, 1, true);
> + if (ret < 0) {
> + dev_err(&data->client->dev, "Could not refresh flash.");
> + return ret;
> + }
> +
> + /* after issuing a refresh flash command, wait 9000 ms */
> + msleep(9000);
> +
> + do {
> + msleep(1000);
> + timeout -= 1000;
> +
> + ret = pmbus_read_byte_data(data->client, 0, ADM1266_STATUS_MFR);
> + if (ret < 0) {
> + dev_err(&data->client->dev, "Could not read status.");
> + return ret;
> + }
> +
> + } while (ADM1266_RUNNING_REFRESH(ret) && timeout > 0);
> +
> + if (timeout == 0)
> + return -ETIMEDOUT;
> +
> + cmd[0] = 0x1;
> + cmd[1] = 0x0;
> + ret = adm1266_group_cmd(data, ADM1266_MEMORY_CRC, cmd,
> + sizeof(cmd), true);
> + if (ret < 0)
> + return ret;
> +
> + /* after issuing a memory recalculate crc command, wait 1000 ms */
> + msleep(1000);
> +
> + ret = pmbus_read_byte_data(data->client, 0, ADM1266_STATUS_MFR);
> + if (ret < 0)
> + return ret;
> +
> + if (ADM1266_ALL_CRC_FAULT(ret)) {
> + dev_err(&data->client->dev, "CRC checks failed.");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> static int adm1266_program_firmware(struct adm1266_data *data)
> {
> u8 write_data[3];
> @@ -783,6 +886,77 @@ static int adm1266_program_firmware(struct adm1266_data *data)
> return ret;
> }
>
> +static int adm1266_program_config(struct adm1266_data *data)
> +{
> + u8 cmd[2];
> + u8 value;
> + int ret;
> +
> + value = ADM1266_GO_COMMAND_STOP | ADM1266_GO_COMMAND_SEQ_RES;
> + ret = pmbus_write_word_data(data->client, 0, ADM1266_GO_COMMAND, value);
> + if (ret < 0) {
> + dev_err(&data->client->dev, "Could not stop sequence.");
> + return ret;
> + }
> +
> + /* after issuing a stop command, wait 100 ms */
> + msleep(100);
> +
> + ret = adm1266_unlock_all_dev(data);
> + if (ret < 0) {
> + dev_err(&data->client->dev, "Could not unlock dev.");
> + goto lock_all_devices;
> + }
> +
> + value = 0;
> + ret = i2c_smbus_write_block_data(data->client, ADM1266_SWITCH_MEMORY, 1, &value);
> + if (ret < 0) {
> + dev_err(&data->client->dev, "Could not switch to main mem.");
> + goto lock_all_devices;
> + }
> +
> + /* after issuing a SWITCH_MEMORY command, wait 1000 ms */
> + msleep(1000);
> +
> + ret = adm1266_write_hex(data, ADM1266_CONFIG_OFFSET, ADM1266_CONFIG_SIZE);
> + if (ret < 0) {
> + dev_err(&data->client->dev, "Could not write configuration.");
> + goto lock_all_devices;
> + }
> +
> + ret = pmbus_write_byte(data->client, 0, ADM1266_STORE_USER_ALL);
> + if (ret < 0)
> + return ret;
> +
> + /* after issuing a STORE_USER_ALL command, wait 300 ms */
> + msleep(300);
> +
> + if (!data->master_dev)
> + goto lock_all_devices;
> +
> + ret = adm1266_verify_memory(data);
> + if (ret < 0)
> + goto lock_all_devices;
> +
> + cmd[0] = 0;
> + cmd[1] = 0;
> + ret = adm1266_group_cmd(data, ADM1266_GO_COMMAND, cmd, sizeof(cmd), true);
> + if (ret < 0) {
> + dev_err(&data->client->dev, "Could not restart sequence.");
> + goto lock_all_devices;
> + }
> +
> + /* after issuing a restart sequence command, wait 350 ms */
> + msleep(350);
> +
> + ret = adm1266_refresh_memory(data);
> +
> +lock_all_devices:
> + adm1266_lock_all_dev(data);
> +
> + return ret;
> +}
> +
> /* check if firmware/config write has ended */
> static bool adm1266_check_ending(struct adm1266_data *data, unsigned int offset,
> unsigned int size)
> @@ -824,6 +998,9 @@ static int adm1266_write_mem_cell(struct adm1266_data *data,
>
> program_func = &adm1266_program_firmware;
> break;
> + case ADM1266_CONFIG_OFFSET:
> + program_func = &adm1266_program_config;
> + break;
> default:
> return -EINVAL;
> }