Add QSPI controller support for Intel LGM SoC.
Note from Vignesh(mtd subsystem maintainer):
This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add
support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX
<[email protected]> that intended to move
cadence-quadspi driver to spi-mem framework
Those patches were trying to accomplish too many things in a single set
of patches and need to split into smaller patches. This is reduced
version of above series.
Changes that are intended to make migration easy are split into separate
patches. Patches 1 to 3 drop features that cannot be supported under
spi-mem at the moment (backward compatibility is maintained).
Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to
spi-mem and patch 7 moves the driver to drivers/spi folder.
I have tested both INDAC mode (used by non TI platforms like Altera
SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs.
Patches to move move bindings over to
"Documentation/devicetree/bindings/spi/" directory and also conversion
of bindig doc to YAML will be posted separately. Support for Intel
platform would follow that.
Reference:
https://lkml.org/lkml/2020/6/1/50
---
v8:
- As Mark suggested to add the dt-bindings documentation patches
end of the series , so dropped.
v7:
- Rob's review comments address and fixed dt-schema warning
- Pratyush review comments address and update
- DAC bit reset to 0 and 1 (enable/disable)
- tested QSI-NOR flash mx25l12805d on LGM soc, it's working after disable DAC
- Linus suggested to use 'num-cs' prperty instead of 'num-chipselect'
v6:
- Rob's review comments update
- add compatible string in properly aligned
- remove cadence-qspi extra comaptible string in example
v5:
- Rob's review comments update
- const with single compatible string kept
v4:
- Rob's review comments update
- remove '|' no formatting to preserve
- child node attributes follows under 'properties' under '@[0-9a-f]+$'.
v3:
- Pratyush review comments update
- CQSPI_SUPPORTS_MULTI_CHIPSELECT macro used instead of cqspi->use_direct_mode
- disable DAC support placed in end of controller_init
v2:
- Rob's review comments update for dt-bindings
- add 'oneOf' for compatible selection
- drop un-neccessary descriptions
- add the cdns,is-decoded-cs and cdns,rclk-en properties as schema
- remove 'allOf' in not required place
- add AdditionalProperties false
- add minItems/maxItems for qspi reset attributes
resend-v1:
- As per Mark's suggestion , reorder the patch series 1-3 driver
support patches, series 4-6 dt-bindings patches.
v1:
- initial version
Ramuthevar Vadivel Murugan (6):
spi: cadence-quadspi: Add QSPI support for Intel LGM SoC
spi: cadence-quadspi: Disable the DAC for Intel LGM SoC
spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi
dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml
dt-bindings: spi: Add compatible for Intel LGM SoC
.../devicetree/bindings/mtd/cadence-quadspi.txt | 67 ----------
.../devicetree/bindings/spi/cdns,qspi-nor.yaml | 148 +++++++++++++++++++++
drivers/spi/Kconfig | 2 +-
drivers/spi/spi-cadence-quadspi.c | 33 ++++-
4 files changed, 178 insertions(+), 72 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/cadence-quadspi.txt
create mode 100644 Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
--
2.11.0
On 11/19/20 11:25 AM, Ramuthevar,Vadivel MuruganX wrote:
> Add QSPI controller support for Intel LGM SoC.
>
> Note from Vignesh(mtd subsystem maintainer):
> This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add
> support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX
> <[email protected]> that intended to move
> cadence-quadspi driver to spi-mem framework
>
> Those patches were trying to accomplish too many things in a single set
> of patches and need to split into smaller patches. This is reduced
> version of above series.
>
> Changes that are intended to make migration easy are split into separate
> patches. Patches 1 to 3 drop features that cannot be supported under
> spi-mem at the moment (backward compatibility is maintained).
> Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to
> spi-mem and patch 7 moves the driver to drivers/spi folder.
>
> I have tested both INDAC mode (used by non TI platforms like Altera
> SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs.
>
> Patches to move move bindings over to
> "Documentation/devicetree/bindings/spi/" directory and also conversion
> of bindig doc to YAML will be posted separately. Support for Intel
> platform would follow that.
>
> Reference:
> https://lkml.org/lkml/2020/6/1/50
>
> ---
> v8:
> - As Mark suggested to add the dt-bindings documentation patches
> end of the series , so dropped.
Suggestion was to drop patches converting legacy binding doc to YAML schema.
You still need to include a patch documenting new compatible
"intel,lgm-qspi" in the existing (legacy) binding doc.
On 11/19/20 11:25 AM, Ramuthevar,Vadivel MuruganX wrote:
> Add QSPI controller support for Intel LGM SoC.
>
> Note from Vignesh(mtd subsystem maintainer):
> This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add
> support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX
> <[email protected]> that intended to move
> cadence-quadspi driver to spi-mem framework
>
> Those patches were trying to accomplish too many things in a single set
> of patches and need to split into smaller patches. This is reduced
> version of above series.
>
> Changes that are intended to make migration easy are split into separate
> patches. Patches 1 to 3 drop features that cannot be supported under
> spi-mem at the moment (backward compatibility is maintained).
> Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to
> spi-mem and patch 7 moves the driver to drivers/spi folder.
>
This text no longer makes sense anymore with few patches dropped and
others reordered
> I have tested both INDAC mode (used by non TI platforms like Altera
> SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs.
>
> Patches to move move bindings over to
> "Documentation/devicetree/bindings/spi/" directory and also conversion
> of bindig doc to YAML will be posted separately. Support for Intel
> platform would follow that.
>
> Reference:
> https://lkml.org/lkml/2020/6/1/50
>
> ---
> v8:
> - As Mark suggested to add the dt-bindings documentation patches
> end of the series , so dropped.
>
> Ramuthevar Vadivel Murugan (6):
> spi: cadence-quadspi: Add QSPI support for Intel LGM SoC
> spi: cadence-quadspi: Disable the DAC for Intel LGM SoC
> spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
> spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi
> dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml
> dt-bindings: spi: Add compatible for Intel LGM SoC
>
This is quite confusing... Summary/diffstat still shows patches 4 to 6
and so does the patch numbering in $subject while changelog says
otherwise and I received only 3 patches in my Inbox?
> .../devicetree/bindings/mtd/cadence-quadspi.txt | 67 ----------
> .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 148 +++++++++++++++++++++
> drivers/spi/Kconfig | 2 +-
> drivers/spi/spi-cadence-quadspi.c | 33 ++++-
> 4 files changed, 178 insertions(+), 72 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mtd/cadence-quadspi.txt
> create mode 100644 Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
>
So does the diffstat...
Hi Vignesh,
Thank you very much for the review comments...
On 19/11/2020 8:36 pm, Vignesh Raghavendra wrote:
>
>
> On 11/19/20 11:25 AM, Ramuthevar,Vadivel MuruganX wrote:
>> Add QSPI controller support for Intel LGM SoC.
>>
>> Note from Vignesh(mtd subsystem maintainer):H
>> This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add
>> support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX
>> <[email protected]> that intended to move
>> cadence-quadspi driver to spi-mem framework
>>
>> Those patches were trying to accomplish too many things in a single set
>> of patches and need to split into smaller patches. This is reduced
>> version of above series.
>>
>> Changes that are intended to make migration easy are split into separate
>> patches. Patches 1 to 3 drop features that cannot be supported under
>> spi-mem at the moment (backward compatibility is maintained).
>> Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to
>> spi-mem and patch 7 moves the driver to drivers/spi folder.
>>
>> I have tested both INDAC mode (used by non TI platforms like Altera
>> SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs.
>>
>> Patches to move move bindings over to
>> "Documentation/devicetree/bindings/spi/" directory and also conversion
>> of bindig doc to YAML will be posted separately. Support for Intel
>> platform would follow that.
>>
>> Reference:
>> https://lkml.org/lkml/2020/6/1/50
>>
>> ---
>> v8:
>> - As Mark suggested to add the dt-bindings documentation patches
>> end of the series , so dropped.
>
> Suggestion was to drop patches converting legacy binding doc to YAML schema.
> You still need to include a patch documenting new compatible
> "intel,lgm-qspi" in the existing (legacy) binding doc.
Noted, will do that.
Regards
Vadivel
>
Hi Vignesh,
Thank you for the review comments...
On 19/11/2020 9:06 pm, Vignesh Raghavendra wrote:
>
>
> On 11/19/20 11:25 AM, Ramuthevar,Vadivel MuruganX wrote:
>> Add QSPI controller support for Intel LGM SoC.
>>
>> Note from Vignesh(mtd subsystem maintainer):
>> This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add
>> support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX
>> <[email protected]> that intended to move
>> cadence-quadspi driver to spi-mem framework
>>
>> Those patches were trying to accomplish too many things in a single set
>> of patches and need to split into smaller patches. This is reduced
>> version of above series.
>>
>> Changes that are intended to make migration easy are split into separate
>> patches. Patches 1 to 3 drop features that cannot be supported under
>> spi-mem at the moment (backward compatibility is maintained).
>> Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to
>> spi-mem and patch 7 moves the driver to drivers/spi folder.
>>
>
> This text no longer makes sense anymore with few patches dropped and
> others reordered
Just for reference added, will drop it.
>
>> I have tested both INDAC mode (used by non TI platforms like Altera
>> SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs.
>>
>> Patches to move move bindings over to
>> "Documentation/devicetree/bindings/spi/" directory and also conversion
>> of bindig doc to YAML will be posted separately. Support for Intel
>> platform would follow that.
>>
>> Reference:
>> https://lkml.org/lkml/2020/6/1/50
>>
>> ---
>> v8:
>> - As Mark suggested to add the dt-bindings documentation patches
>> end of the series , so dropped.
>
>
>>
>> Ramuthevar Vadivel Murugan (6):
>> spi: cadence-quadspi: Add QSPI support for Intel LGM SoC
>> spi: cadence-quadspi: Disable the DAC for Intel LGM SoC
>> spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
>> spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi
>> dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml
>> dt-bindings: spi: Add compatible for Intel LGM SoC
>>
>
> This is quite confusing... Summary/diffstat still shows patches 4 to 6
> and so does the patch numbering in $subject while changelog says
> otherwise and I received only 3 patches in my Inbox?
oh my bad, while patch creation wrongly added, will correct it, thanks!
Regards
Vadivel
>
>
>> .../devicetree/bindings/mtd/cadence-quadspi.txt | 67 ----------
>> .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 148 +++++++++++++++++++++
>> drivers/spi/Kconfig | 2 +-
>> drivers/spi/spi-cadence-quadspi.c | 33 ++++-
>> 4 files changed, 178 insertions(+), 72 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/mtd/cadence-quadspi.txt
>> create mode 100644 Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
>>
>
> So does the diffstat...
>