Hi,
The Cypress Semper S28 flash family uses 2-bit ECC by default. Under
this ECC scheme, multi-pass page programs result in a program error.
This means that unlike many other SPI NOR flashes, bit-walking cannot be
done. In other words, once a page is programmed, its bits cannot then be
flipped to 0 without an erase in between.
This causes problems with UBIFS because it uses bit-walking to clear EC
and VID magic numbers from a PEB before issuing an erase to preserve the
file system correctness in case of power cuts.
This series fixes that by setting mtd->writesize to the ECC block size
(16) and making sure UBIFS does not try to do a multi-pass write on
flashes with writesize > 1.
It is based on the xSPI/8D series that adds support for Cypress S28
flash [0] (it is in next now). The patches themselves are independent of
that series in the sense that they don't rely on 8D support. But since
S28 flash is not supported without that series, these patches don't make
much sense without it.
Tested on Cypress S28HS512T and MT35XU512ABA on J7200 and J721E
respectively.
[0] https://lore.kernel.org/linux-mtd/[email protected]/
Pratyush Yadav (3):
UBI: Do not zero out EC and VID on ECC-ed NOR flashes
mtd: spi-nor: core: Allow flashes to specify MTD writesize
mtd: spi-nor: spansion: Set ECC block size
drivers/mtd/spi-nor/core.c | 3 ++-
drivers/mtd/spi-nor/core.h | 3 +++
drivers/mtd/spi-nor/spansion.c | 1 +
drivers/mtd/ubi/build.c | 4 +---
drivers/mtd/ubi/io.c | 9 ++++++++-
5 files changed, 15 insertions(+), 5 deletions(-)
--
2.28.0
The S28 flash family uses 2-bit ECC by default with each ECC block being
16 bytes. Under this scheme multi-pass programming to an ECC block is
not allowed. Set the writesize to make sure multi-pass programming is
not attempted on the flash.
Signed-off-by: Pratyush Yadav <[email protected]>
Reviewed-by: Tudor Ambarus <[email protected]>
---
Notes:
No changes in v3
New in v2.
drivers/mtd/spi-nor/spansion.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index e487fd341a56..b0c5521c1e27 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -109,6 +109,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable)
static void s28hs512t_default_init(struct spi_nor *nor)
{
nor->params->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable;
+ nor->params->writesize = 16;
}
static void s28hs512t_post_sfdp_fixup(struct spi_nor *nor)
--
2.28.0
On 12/1/20 3:57 PM, Pratyush Yadav wrote:
> The S28 flash family uses 2-bit ECC by default with each ECC block being
> 16 bytes. Under this scheme multi-pass programming to an ECC block is
> not allowed. Set the writesize to make sure multi-pass programming is
> not attempted on the flash.
>
> Signed-off-by: Pratyush Yadav <[email protected]>
> Reviewed-by: Tudor Ambarus <[email protected]>
> ---
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git spi-nor/next, thanks!
[3/3] mtd: spi-nor: spansion: Set ECC block size
https://git.kernel.org/mtd/c/294cca6ce5
>
> Notes:
> No changes in v3
>
> New in v2.
>
> drivers/mtd/spi-nor/spansion.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
> index e487fd341a56..b0c5521c1e27 100644
> --- a/drivers/mtd/spi-nor/spansion.c
> +++ b/drivers/mtd/spi-nor/spansion.c
> @@ -109,6 +109,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable)
> static void s28hs512t_default_init(struct spi_nor *nor)
> {
> nor->params->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable;
> + nor->params->writesize = 16;
> }
>
> static void s28hs512t_post_sfdp_fixup(struct spi_nor *nor)
>