On Wed, Dec 09, 2020 at 11:15:35PM +0300, Serge Semin wrote:
> On Wed, Dec 09, 2020 at 07:54:20PM +0000, Mark Brown wrote:
> > Right, in general we aim to do this sort of fixup on the transfers
> > and messages rather than the devices, I guess we might be missing
> > validation in some of the flash acceleration paths or was this an issue
> > seen through inspection?
> In case of DW SPI driver we just make sure the SPI-client device
> speed set in the max_speed_hz doesn't exceed the controller SPI-bus
> clock frequency and clamp it if it does. So the driver is safe in that
> matter.
Ideally the driver wouldn't have to check though (no harm in doing so of
course).
On Wed, Dec 09, 2020 at 08:25:52PM +0000, Mark Brown wrote:
> On Wed, Dec 09, 2020 at 11:15:35PM +0300, Serge Semin wrote:
> > On Wed, Dec 09, 2020 at 07:54:20PM +0000, Mark Brown wrote:
>
> > > Right, in general we aim to do this sort of fixup on the transfers
> > > and messages rather than the devices, I guess we might be missing
> > > validation in some of the flash acceleration paths or was this an issue
> > > seen through inspection?
>
> > In case of DW SPI driver we just make sure the SPI-client device
> > speed set in the max_speed_hz doesn't exceed the controller SPI-bus
> > clock frequency and clamp it if it does. So the driver is safe in that
> > matter.
>
> Ideally the driver wouldn't have to check though (no harm in doing so of
> course).
If so then we'd need to have a dedicated speed-related field in the
spi_mem_op structure, which would be accordingly initialized by the
SPI-mem core.
-Sergey