Add bindings to APDMA for MT8516 SoC. MT8516 is compatible with MT6577.
Signed-off-by: Fabien Parent <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
V3: remove unicode symbol that slips into patch summary
V2: no change
Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt b/Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt
index 2117db0ce4f2..fef9c1eeb264 100644
--- a/Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt
+++ b/Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt
@@ -4,6 +4,7 @@ Required properties:
- compatible should contain:
* "mediatek,mt2712-uart-dma" for MT2712 compatible APDMA
* "mediatek,mt6577-uart-dma" for MT6577 and all of the above
+ * "mediatek,mt8516-uart-dma", "mediatek,mt6577" for MT8516 SoC
- reg: The base address of the APDMA register bank.
--
2.29.2
Add support the APDMA IP on MT8516. APDMA is a DMA controller
for UARTs.
Signed-off-by: Fabien Parent <[email protected]>
---
V3: remove unicode symbol that slips into patch summary
V2: Add missing dma-names properties on uart nodes
arch/arm64/boot/dts/mediatek/mt8516.dtsi | 30 ++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi
index e6e4d9d60094..b80e95574bef 100644
--- a/arch/arm64/boot/dts/mediatek/mt8516.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8516.dtsi
@@ -276,6 +276,27 @@ gic: interrupt-controller@10310000 {
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ apdma: dma-controller@11000480 {
+ compatible = "mediatek,mt8516-uart-dma",
+ "mediatek,mt6577-uart-dma";
+ reg = <0 0x11000480 0 0x80>,
+ <0 0x11000500 0 0x80>,
+ <0 0x11000580 0 0x80>,
+ <0 0x11000600 0 0x80>,
+ <0 0x11000980 0 0x80>,
+ <0 0x11000a00 0 0x80>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 99 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 100 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 101 IRQ_TYPE_LEVEL_LOW>;
+ dma-requests = <6>;
+ clocks = <&topckgen CLK_TOP_APDMA>;
+ clock-names = "apdma";
+ #dma-cells = <1>;
+ };
+
uart0: serial@11005000 {
compatible = "mediatek,mt8516-uart",
"mediatek,mt6577-uart";
@@ -284,6 +305,9 @@ uart0: serial@11005000 {
clocks = <&topckgen CLK_TOP_UART0_SEL>,
<&topckgen CLK_TOP_UART0>;
clock-names = "baud", "bus";
+ dmas = <&apdma 0
+ &apdma 1>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -295,6 +319,9 @@ uart1: serial@11006000 {
clocks = <&topckgen CLK_TOP_UART1_SEL>,
<&topckgen CLK_TOP_UART1>;
clock-names = "baud", "bus";
+ dmas = <&apdma 2
+ &apdma 3>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -306,6 +333,9 @@ uart2: serial@11007000 {
clocks = <&topckgen CLK_TOP_UART2_SEL>,
<&topckgen CLK_TOP_UART2>;
clock-names = "baud", "bus";
+ dmas = <&apdma 4
+ &apdma 5>;
+ dma-names = "tx", "rx";
status = "disabled";
};
--
2.29.2
On 09-12-20, 12:47, Fabien Parent wrote:
> Add bindings to APDMA for MT8516 SoC. MT8516 is compatible with MT6577.
>
> Signed-off-by: Fabien Parent <[email protected]>
> Reviewed-by: Matthias Brugger <[email protected]>
> Acked-by: Rob Herring <[email protected]>
Applied, thanks
--
~Vinod
On 09/12/2020 12:47, Fabien Parent wrote:
> Add support the APDMA IP on MT8516. APDMA is a DMA controller
> for UARTs.
>
> Signed-off-by: Fabien Parent <[email protected]>
> ---
>
Applied to v5.11-next/dts64
Thanks a lot!
> V3: remove unicode symbol that slips into patch summary
> V2: Add missing dma-names properties on uart nodes
>
> arch/arm64/boot/dts/mediatek/mt8516.dtsi | 30 ++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi
> index e6e4d9d60094..b80e95574bef 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8516.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8516.dtsi
> @@ -276,6 +276,27 @@ gic: interrupt-controller@10310000 {
> (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> };
>
> + apdma: dma-controller@11000480 {
> + compatible = "mediatek,mt8516-uart-dma",
> + "mediatek,mt6577-uart-dma";
> + reg = <0 0x11000480 0 0x80>,
> + <0 0x11000500 0 0x80>,
> + <0 0x11000580 0 0x80>,
> + <0 0x11000600 0 0x80>,
> + <0 0x11000980 0 0x80>,
> + <0 0x11000a00 0 0x80>;
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 99 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 100 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 101 IRQ_TYPE_LEVEL_LOW>;
> + dma-requests = <6>;
> + clocks = <&topckgen CLK_TOP_APDMA>;
> + clock-names = "apdma";
> + #dma-cells = <1>;
> + };
> +
> uart0: serial@11005000 {
> compatible = "mediatek,mt8516-uart",
> "mediatek,mt6577-uart";
> @@ -284,6 +305,9 @@ uart0: serial@11005000 {
> clocks = <&topckgen CLK_TOP_UART0_SEL>,
> <&topckgen CLK_TOP_UART0>;
> clock-names = "baud", "bus";
> + dmas = <&apdma 0
> + &apdma 1>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -295,6 +319,9 @@ uart1: serial@11006000 {
> clocks = <&topckgen CLK_TOP_UART1_SEL>,
> <&topckgen CLK_TOP_UART1>;
> clock-names = "baud", "bus";
> + dmas = <&apdma 2
> + &apdma 3>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -306,6 +333,9 @@ uart2: serial@11007000 {
> clocks = <&topckgen CLK_TOP_UART2_SEL>,
> <&topckgen CLK_TOP_UART2>;
> clock-names = "baud", "bus";
> + dmas = <&apdma 4
> + &apdma 5>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
>