This is the initial series to support Engicam i.Core MX8M Mini SOM
and it's associated carrier board dts(i) support.
i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam.
i.Core MX8M Mini needs to mount on top of Engicam baseboards for
creating complete platform boards.
Possible baseboards are,
- EDIMM2.2
- C.TOUCH 2.0
Changes for v3:
- don't maintain common nodes and include it, if no feature diff
- keep min/max regulator hoping
- collect Krzysztof r-b
- fix dt-bindings
Any inputs?
Jagan.
Jagan Teki (6):
arm64: defconfig: Enable REGULATOR_PF8X00
dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM
arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
.../devicetree/bindings/arm/fsl.yaml | 8 +
arch/arm64/boot/dts/freescale/Makefile | 2 +
.../dts/freescale/imx8mm-engicam-ctouch2.dtsi | 82 +++++++
.../freescale/imx8mm-engicam-edimm2.2.dtsi | 82 +++++++
.../freescale/imx8mm-icore-mx8mm-ctouch2.dts | 21 ++
.../freescale/imx8mm-icore-mx8mm-edimm2.2.dts | 21 ++
.../dts/freescale/imx8mm-icore-mx8mm.dtsi | 232 ++++++++++++++++++
arch/arm64/configs/defconfig | 1 +
8 files changed, 449 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi
--
2.25.1
Enable PF8X00 regulator driver by default as it used in
some of i.MX8MM hardware platforms.
Cc: Catalin Marinas <[email protected]>
Cc: Will Deacon <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- collect Krzysztof r-b
Changes for v2:
- updated commit message
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index fae83673c3c3..e952c76ee970 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -594,6 +594,7 @@ CONFIG_REGULATOR_HI655X=y
CONFIG_REGULATOR_MAX77620=y
CONFIG_REGULATOR_MAX8973=y
CONFIG_REGULATOR_PCA9450=y
+CONFIG_REGULATOR_PF8X00=y
CONFIG_REGULATOR_PFUZE100=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_QCOM_RPMH=y
--
2.25.1
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini
from Engicam.
General features:
- NXP i.MX8M Mini
- Up to 2GB LDDR4
- 8/16GB eMMC
- Gigabit Ethernet
- USB 2.0 Host/OTG
- PCIe Gen2 interface
- I2S
- MIPI DSI to LVDS
- rest of i.MX8M Mini features
i.Core MX8M Mini needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Add support for it.
Signed-off-by: Matteo Lisi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- keep regulator min/max hoping
Changes for v2:
- updated commit message
- add cpu nodes
- add fec1 node
- fixed pmic tree comments
- dropped engicam from filename since it aligned with imx6 engicam
dts files naming conventions.
.../dts/freescale/imx8mm-icore-mx8mm.dtsi | 232 ++++++++++++++++++
1 file changed, 232 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi
new file mode 100644
index 000000000000..b40148d728ea
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi
@@ -0,0 +1,232 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutons(India)
+ */
+
+/ {
+ compatible = "engicam,icore-mx8mm", "fsl,imx8mm";
+};
+
+&A53_0 {
+ cpu-supply = <®_buck4>;
+};
+
+&A53_1 {
+ cpu-supply = <®_buck4>;
+};
+
+&A53_2 {
+ cpu-supply = <®_buck4>;
+};
+
+&A53_3 {
+ cpu-supply = <®_buck4>;
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
+ phy-mode = "rgmii-id";
+ phy-handle = <ðphy>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy: ethernet-phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <3>;
+ reset-gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ pmic@8 {
+ compatible = "nxp,pf8121a";
+ reg = <0x08>;
+
+ regulators {
+ reg_ldo1: ldo1 {
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_ldo2: ldo2 {
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_ldo3: ldo3 {
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_ldo4: ldo4 {
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck1: buck1 {
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck2: buck2 {
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck3: buck3 {
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck4: buck4 {
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck5: buck5 {
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck6: buck6 {
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck7: buck7 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_vsnvs: vsnvs {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+ };
+};
+
+&iomuxc {
+ pinctrl_fec1: fec1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
+ MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
+ MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
+ MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
+ MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
+ MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
+ MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
+ MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
+ MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
+ MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
+ MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
+ MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
+ MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
+ MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
+ MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x19
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
+ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
+ >;
+ };
+
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
+ >;
+ };
+
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
+ >;
+ };
+};
+
+/* eMMC */
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
--
2.25.1
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
Add bindings for it.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- add proper bindings
Changes for v2:
- updated commit message
Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 67980dcef66d..f1de68341873 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -673,6 +673,12 @@ properties:
- variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module
- const: fsl,imx8mm
+ - description: Engicam i.Core MX8M Mini SoM based boards
+ items:
+ - const: engicam,icore-mx8mm-ctouch2 # i.MX8MM Engicam i.Core MX8M Mini C.TOUCH 2.0
+ - const: engicam,icore-mx8mm # i.MX8MM Engicam i.Core MX8M Mini SoM
+ - const: fsl,imx8mm
+
- description: Kontron BL i.MX8MM (N801X S) Board
items:
- const: kontron,imx8mm-n801x-s
--
2.25.1
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.
Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
Add support for it.
Signed-off-by: Matteo Lisi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- don't maintain common nodes and include it, if no feature diff
Changes for v2:
- enabled fec1 node
- updated commit message
- dropped engicam from filename since it aligned with imx6 engicam
dts files naming conventions.
- add i2c nodes
- fixed v1 comments
arch/arm64/boot/dts/freescale/Makefile | 1 +
.../dts/freescale/imx8mm-engicam-ctouch2.dtsi | 82 +++++++++++++++++++
.../freescale/imx8mm-icore-mx8mm-ctouch2.dts | 21 +++++
3 files changed, 104 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 6f0777ee6cd6..8d49a2c74604 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
new file mode 100644
index 000000000000..f7870efd9dab
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+&fec1 {
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c4 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
+ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
+ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
+ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
+ >;
+ };
+
+ pinctrl_usdhc1_gpio: usdhc1gpiogrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
+ MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
+ MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
+ MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
+ MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
+ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
+ >;
+ };
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+/* SD */
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
+ cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ max-frequency = <50000000>;
+ bus-width = <4>;
+ no-1-8-v;
+ pm-ignore-notify;
+ keep-power-in-suspend;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts
new file mode 100644
index 000000000000..8eb01b1f882a
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "imx8mm.dtsi"
+#include "imx8mm-engicam-ctouch2.dtsi"
+#include "imx8mm-icore-mx8mm.dtsi"
+
+/ {
+ model = "Engicam i.Core MX8M Mini C.TOUCH 2.0";
+ compatible = "engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm",
+ "fsl,imx8mm";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+};
--
2.25.1
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
PCIe, DSI, CSI nodes will add it into imx8mm-engicam-edimm2.2.dtsi once
Mainline Linux supported.
Add support for it.
Signed-off-by: Matteo Lisi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- don't maintain common nodes and include it, if no feature diff
Changes for v2:
- updated commit message
- dropped engicam from filename since it aligned with imx6 engicam
dts files naming conventions.
arch/arm64/boot/dts/freescale/Makefile | 1 +
.../freescale/imx8mm-engicam-edimm2.2.dtsi | 82 +++++++++++++++++++
.../freescale/imx8mm-icore-mx8mm-edimm2.2.dts | 21 +++++
3 files changed, 104 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 8d49a2c74604..43783076f856 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -33,6 +33,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
new file mode 100644
index 000000000000..f7870efd9dab
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+&fec1 {
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c4 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
+ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
+ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
+ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
+ >;
+ };
+
+ pinctrl_usdhc1_gpio: usdhc1gpiogrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
+ MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
+ MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
+ MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
+ MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
+ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
+ >;
+ };
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+/* SD */
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
+ cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ max-frequency = <50000000>;
+ bus-width = <4>;
+ no-1-8-v;
+ pm-ignore-notify;
+ keep-power-in-suspend;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts
new file mode 100644
index 000000000000..672aee1800c4
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "imx8mm.dtsi"
+#include "imx8mm-engicam-edimm2.2.dtsi"
+#include "imx8mm-icore-mx8mm.dtsi"
+
+/ {
+ model = "Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit";
+ compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm",
+ "fsl,imx8mm";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+};
--
2.25.1
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation
Board from Engicam.
i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
Add bindings for it.
Signed-off-by: Jagan Teki <[email protected]>
---
Changes for v3:
- fix dt-bindings
Changes for v2:
- update commit message
Documentation/devicetree/bindings/arm/fsl.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index f1de68341873..2dab4b5bf99a 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -675,7 +675,9 @@ properties:
- description: Engicam i.Core MX8M Mini SoM based boards
items:
- - const: engicam,icore-mx8mm-ctouch2 # i.MX8MM Engicam i.Core MX8M Mini C.TOUCH 2.0
+ - enum:
+ - engicam,icore-mx8mm-ctouch2 # i.MX8MM Engicam i.Core MX8M Mini C.TOUCH 2.0
+ - engicam,icore-mx8mm-edimm2.2 # i.MX8MM Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
- const: engicam,icore-mx8mm # i.MX8MM Engicam i.Core MX8M Mini SoM
- const: fsl,imx8mm
--
2.25.1
On Wed, Dec 23, 2020 at 04:33:39PM +0530, Jagan Teki wrote:
> i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
>
> C.TOUCH 2.0 is a general purpose carrier board with capacitive
> touch interface support.
>
> i.Core MX8M Mini needs to mount on top of this Carrier board for
> creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
>
> Add bindings for it.
>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> Changes for v3:
> - add proper bindings
> Changes for v2:
> - updated commit message
>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Wed, Dec 23, 2020 at 04:33:40PM +0530, Jagan Teki wrote:
> i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini
> from Engicam.
>
> General features:
> - NXP i.MX8M Mini
> - Up to 2GB LDDR4
> - 8/16GB eMMC
> - Gigabit Ethernet
> - USB 2.0 Host/OTG
> - PCIe Gen2 interface
> - I2S
> - MIPI DSI to LVDS
> - rest of i.MX8M Mini features
>
> i.Core MX8M Mini needs to mount on top of Engicam baseboards
> for creating complete platform solutions.
>
> Add support for it.
>
> Signed-off-by: Matteo Lisi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> Changes for v3:
> - keep regulator min/max hoping
> Changes for v2:
> - updated commit message
> - add cpu nodes
> - add fec1 node
> - fixed pmic tree comments
> - dropped engicam from filename since it aligned with imx6 engicam
> dts files naming conventions.
>
> .../dts/freescale/imx8mm-icore-mx8mm.dtsi | 232 ++++++++++++++++++
> 1 file changed, 232 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Wed, Dec 23, 2020 at 04:33:41PM +0530, Jagan Teki wrote:
> Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
> board.
>
> Genaral features:
> - Ethernet 10/100
> - Wifi/BT
> - USB Type A/OTG
> - Audio Out
> - CAN
> - LVDS panel connector
>
> i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
>
> i.Core MX8M Mini needs to mount on top of this Carrier board for
> creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
>
> Add support for it.
>
> Signed-off-by: Matteo Lisi <[email protected]>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> Changes for v3:
> - don't maintain common nodes and include it, if no feature diff
> Changes for v2:
> - enabled fec1 node
> - updated commit message
> - dropped engicam from filename since it aligned with imx6 engicam
> dts files naming conventions.
> - add i2c nodes
> - fixed v1 comments
>
> arch/arm64/boot/dts/freescale/Makefile | 1 +
> .../dts/freescale/imx8mm-engicam-ctouch2.dtsi | 82 +++++++++++++++++++
> .../freescale/imx8mm-icore-mx8mm-ctouch2.dts | 21 +++++
> 3 files changed, 104 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
You split some common part to ctouch2.dtsi so it can be reused in
multiple places. I saw so far only one usage, where are the others?
Best regards,
Krzysztof
On Wed, Dec 23, 2020 at 5:29 PM Krzysztof Kozlowski <[email protected]> wrote:
>
> On Wed, Dec 23, 2020 at 04:33:41PM +0530, Jagan Teki wrote:
> > Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
> > board.
> >
> > Genaral features:
> > - Ethernet 10/100
> > - Wifi/BT
> > - USB Type A/OTG
> > - Audio Out
> > - CAN
> > - LVDS panel connector
> >
> > i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
> >
> > i.Core MX8M Mini needs to mount on top of this Carrier board for
> > creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
> >
> > Add support for it.
> >
> > Signed-off-by: Matteo Lisi <[email protected]>
> > Signed-off-by: Jagan Teki <[email protected]>
> > ---
> > Changes for v3:
> > - don't maintain common nodes and include it, if no feature diff
> > Changes for v2:
> > - enabled fec1 node
> > - updated commit message
> > - dropped engicam from filename since it aligned with imx6 engicam
> > dts files naming conventions.
> > - add i2c nodes
> > - fixed v1 comments
> >
> > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > .../dts/freescale/imx8mm-engicam-ctouch2.dtsi | 82 +++++++++++++++++++
> > .../freescale/imx8mm-icore-mx8mm-ctouch2.dts | 21 +++++
> > 3 files changed, 104 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
>
> You split some common part to ctouch2.dtsi so it can be reused in
> multiple places. I saw so far only one usage, where are the others?
To be clear, ctouch2.dtsi not mean for common it is C.TOUCH2 carrier
board dtsi. The other carrier is C.TOUCH2 10.1" Open Frame(display),
since DSI is not yet mainlined, I didn't add this yet.
Jagan.
On Wed, 23 Dec 2020 at 13:07, Jagan Teki <[email protected]> wrote:
>
> On Wed, Dec 23, 2020 at 5:29 PM Krzysztof Kozlowski <[email protected]> wrote:
> >
> > On Wed, Dec 23, 2020 at 04:33:41PM +0530, Jagan Teki wrote:
> > > Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
> > > board.
> > >
> > > Genaral features:
> > > - Ethernet 10/100
> > > - Wifi/BT
> > > - USB Type A/OTG
> > > - Audio Out
> > > - CAN
> > > - LVDS panel connector
> > >
> > > i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
> > >
> > > i.Core MX8M Mini needs to mount on top of this Carrier board for
> > > creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
> > >
> > > Add support for it.
> > >
> > > Signed-off-by: Matteo Lisi <[email protected]>
> > > Signed-off-by: Jagan Teki <[email protected]>
> > > ---
> > > Changes for v3:
> > > - don't maintain common nodes and include it, if no feature diff
> > > Changes for v2:
> > > - enabled fec1 node
> > > - updated commit message
> > > - dropped engicam from filename since it aligned with imx6 engicam
> > > dts files naming conventions.
> > > - add i2c nodes
> > > - fixed v1 comments
> > >
> > > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > > .../dts/freescale/imx8mm-engicam-ctouch2.dtsi | 82 +++++++++++++++++++
> > > .../freescale/imx8mm-icore-mx8mm-ctouch2.dts | 21 +++++
> > > 3 files changed, 104 insertions(+)
> > > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
> >
> > You split some common part to ctouch2.dtsi so it can be reused in
> > multiple places. I saw so far only one usage, where are the others?
>
> To be clear, ctouch2.dtsi not mean for common it is C.TOUCH2 carrier
> board dtsi. The other carrier is C.TOUCH2 10.1" Open Frame(display),
> since DSI is not yet mainlined, I didn't add this yet.
If I understand correctly: it is a DTSI which is included only by one
DTS... and DTS does not have any other nodes. This as well is not the
design which makes any sense. We do not create empty DTS files which
only include one more DTSI. The contents of
imx8mm-engicam-ctouch2.dtsi should be directly in
imx8mm-icore-mx8mm-ctouch2.dts. That's the same problem as with v1 -
you overcomplicate simple stuff. It really looks like you ignored the
comments from v1 in multiple places.
The same applies to imx8mm-engicam-edimm2.2.dtsi.
Best regards,
Krzysztof
On Thu, Dec 24, 2020 at 2:48 PM Krzysztof Kozlowski <[email protected]> wrote:
>
> On Wed, 23 Dec 2020 at 13:07, Jagan Teki <[email protected]> wrote:
> >
> > On Wed, Dec 23, 2020 at 5:29 PM Krzysztof Kozlowski <[email protected]> wrote:
> > >
> > > On Wed, Dec 23, 2020 at 04:33:41PM +0530, Jagan Teki wrote:
> > > > Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
> > > > board.
> > > >
> > > > Genaral features:
> > > > - Ethernet 10/100
> > > > - Wifi/BT
> > > > - USB Type A/OTG
> > > > - Audio Out
> > > > - CAN
> > > > - LVDS panel connector
> > > >
> > > > i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
> > > >
> > > > i.Core MX8M Mini needs to mount on top of this Carrier board for
> > > > creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
> > > >
> > > > Add support for it.
> > > >
> > > > Signed-off-by: Matteo Lisi <[email protected]>
> > > > Signed-off-by: Jagan Teki <[email protected]>
> > > > ---
> > > > Changes for v3:
> > > > - don't maintain common nodes and include it, if no feature diff
> > > > Changes for v2:
> > > > - enabled fec1 node
> > > > - updated commit message
> > > > - dropped engicam from filename since it aligned with imx6 engicam
> > > > dts files naming conventions.
> > > > - add i2c nodes
> > > > - fixed v1 comments
> > > >
> > > > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > > > .../dts/freescale/imx8mm-engicam-ctouch2.dtsi | 82 +++++++++++++++++++
> > > > .../freescale/imx8mm-icore-mx8mm-ctouch2.dts | 21 +++++
> > > > 3 files changed, 104 insertions(+)
> > > > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
> > >
> > > You split some common part to ctouch2.dtsi so it can be reused in
> > > multiple places. I saw so far only one usage, where are the others?
> >
> > To be clear, ctouch2.dtsi not mean for common it is C.TOUCH2 carrier
> > board dtsi. The other carrier is C.TOUCH2 10.1" Open Frame(display),
> > since DSI is not yet mainlined, I didn't add this yet.
>
> If I understand correctly: it is a DTSI which is included only by one
> DTS... and DTS does not have any other nodes. This as well is not the
This is not mandatory as per my understanding, including exiting DTS
topologies in Mainline.
There are several places where more than one dtsi has been included,
Simple example of imx8mm tree is
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts
/dts-v1/;
#include "imx8mm.dtsi"
#include "imx8mm-beacon-som.dtsi"
#include "imx8mm-beacon-baseboard.dtsi"
(SoC dtsi, SoM dtsi, Carrier board dtsi)
> design which makes any sense. We do not create empty DTS files which
> only include one more DTSI. The contents of
> imx8mm-engicam-ctouch2.dtsi should be directly in
> imx8mm-icore-mx8mm-ctouch2.dts. That's the same problem as with v1 -
> you overcomplicate simple stuff. It really looks like you ignored the
> comments from v1 in multiple places.
As explained above, the design is pretty much the same as the existing SoM's.
imx8mm-engicam-ctouch2.dtsi is not just a dtsi file where nodes are
enabled. It has nodes enabled for Carrier board, so keeping nodes
separately will
1. More verbose for which IP's are available in the carrier board
2. Easy to extend if someone can create another SoM with a similar Carrier.
Ie is the whole idea to keep carrier board dtsi and includes them in dts.
As I suggest, if you can look into px30 you can understand more easily.
Jagan.
On Thu, 24 Dec 2020 at 11:08, Jagan Teki <[email protected]> wrote:
>
> On Thu, Dec 24, 2020 at 2:48 PM Krzysztof Kozlowski <[email protected]> wrote:
> >
> > On Wed, 23 Dec 2020 at 13:07, Jagan Teki <[email protected]> wrote:
> > >
> > > On Wed, Dec 23, 2020 at 5:29 PM Krzysztof Kozlowski <[email protected]> wrote:
> > > >
> > > > On Wed, Dec 23, 2020 at 04:33:41PM +0530, Jagan Teki wrote:
> > > > > Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
> > > > > board.
> > > > >
> > > > > Genaral features:
> > > > > - Ethernet 10/100
> > > > > - Wifi/BT
> > > > > - USB Type A/OTG
> > > > > - Audio Out
> > > > > - CAN
> > > > > - LVDS panel connector
> > > > >
> > > > > i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
> > > > >
> > > > > i.Core MX8M Mini needs to mount on top of this Carrier board for
> > > > > creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
> > > > >
> > > > > Add support for it.
> > > > >
> > > > > Signed-off-by: Matteo Lisi <[email protected]>
> > > > > Signed-off-by: Jagan Teki <[email protected]>
> > > > > ---
> > > > > Changes for v3:
> > > > > - don't maintain common nodes and include it, if no feature diff
> > > > > Changes for v2:
> > > > > - enabled fec1 node
> > > > > - updated commit message
> > > > > - dropped engicam from filename since it aligned with imx6 engicam
> > > > > dts files naming conventions.
> > > > > - add i2c nodes
> > > > > - fixed v1 comments
> > > > >
> > > > > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > > > > .../dts/freescale/imx8mm-engicam-ctouch2.dtsi | 82 +++++++++++++++++++
> > > > > .../freescale/imx8mm-icore-mx8mm-ctouch2.dts | 21 +++++
> > > > > 3 files changed, 104 insertions(+)
> > > > > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
> > > >
> > > > You split some common part to ctouch2.dtsi so it can be reused in
> > > > multiple places. I saw so far only one usage, where are the others?
> > >
> > > To be clear, ctouch2.dtsi not mean for common it is C.TOUCH2 carrier
> > > board dtsi. The other carrier is C.TOUCH2 10.1" Open Frame(display),
> > > since DSI is not yet mainlined, I didn't add this yet.
> >
> > If I understand correctly: it is a DTSI which is included only by one
> > DTS... and DTS does not have any other nodes. This as well is not the
>
> This is not mandatory as per my understanding, including exiting DTS
> topologies in Mainline.
>
> There are several places where more than one dtsi has been included,
> Simple example of imx8mm tree is
It's not the problem of including more than one DTSI. It's the problem
of creating fake DTS or DTSI files whose purpose is only to include
others. Keep it simple. Don't create unnecessary files. "Entities
should not be multiplied without necessity."
>
> arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts
Which was wrong as well. Don't create unnecessary files.
>
> /dts-v1/;
>
> #include "imx8mm.dtsi"
> #include "imx8mm-beacon-som.dtsi"
> #include "imx8mm-beacon-baseboard.dtsi"
>
> (SoC dtsi, SoM dtsi, Carrier board dtsi)
>
> > design which makes any sense. We do not create empty DTS files which
> > only include one more DTSI. The contents of
> > imx8mm-engicam-ctouch2.dtsi should be directly in
> > imx8mm-icore-mx8mm-ctouch2.dts. That's the same problem as with v1 -
> > you overcomplicate simple stuff. It really looks like you ignored the
> > comments from v1 in multiple places.
>
> As explained above, the design is pretty much the same as the existing SoM's.
>
> imx8mm-engicam-ctouch2.dtsi is not just a dtsi file where nodes are
> enabled. It has nodes enabled for Carrier board, so keeping nodes
> separately will
The files represent real devices or their components. So you have a
SOM - a DTSI file. You have a carrier board - a DTS file. That's
simple design which is mostly followed, unless something over
complicated passes the review.
> 1. More verbose for which IP's are available in the carrier board
No difference when carrier DTSI is the DTS. Exactly the same.
> 2. Easy to extend if someone can create another SoM with a similar Carrier.
Not really, if they include carrier DTSI they need to override a lot.
So usually (including practice - I did it) they *copy* the carrier to
create their own design.
>
> Ie is the whole idea to keep carrier board dtsi and includes them in dts.
>
> As I suggest, if you can look into px30 you can understand more easily.
NAK from my side. I explained my reasoning. You created a fake, empty
DTSI which included only other DTSI. After review, you agreed to fix
it. However you still create a fake DTS which includes only a DTSI.
"Entities should not be multiplied without necessity."
Best regards,
Krzysztof
On Thu, Dec 24, 2020 at 3:51 PM Krzysztof Kozlowski <[email protected]> wrote:
>
> On Thu, 24 Dec 2020 at 11:08, Jagan Teki <[email protected]> wrote:
> >
> > On Thu, Dec 24, 2020 at 2:48 PM Krzysztof Kozlowski <[email protected]> wrote:
> > >
> > > On Wed, 23 Dec 2020 at 13:07, Jagan Teki <[email protected]> wrote:
> > > >
> > > > On Wed, Dec 23, 2020 at 5:29 PM Krzysztof Kozlowski <[email protected]> wrote:
> > > > >
> > > > > On Wed, Dec 23, 2020 at 04:33:41PM +0530, Jagan Teki wrote:
> > > > > > Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
> > > > > > board.
> > > > > >
> > > > > > Genaral features:
> > > > > > - Ethernet 10/100
> > > > > > - Wifi/BT
> > > > > > - USB Type A/OTG
> > > > > > - Audio Out
> > > > > > - CAN
> > > > > > - LVDS panel connector
> > > > > >
> > > > > > i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
> > > > > >
> > > > > > i.Core MX8M Mini needs to mount on top of this Carrier board for
> > > > > > creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
> > > > > >
> > > > > > Add support for it.
> > > > > >
> > > > > > Signed-off-by: Matteo Lisi <[email protected]>
> > > > > > Signed-off-by: Jagan Teki <[email protected]>
> > > > > > ---
> > > > > > Changes for v3:
> > > > > > - don't maintain common nodes and include it, if no feature diff
> > > > > > Changes for v2:
> > > > > > - enabled fec1 node
> > > > > > - updated commit message
> > > > > > - dropped engicam from filename since it aligned with imx6 engicam
> > > > > > dts files naming conventions.
> > > > > > - add i2c nodes
> > > > > > - fixed v1 comments
> > > > > >
> > > > > > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > > > > > .../dts/freescale/imx8mm-engicam-ctouch2.dtsi | 82 +++++++++++++++++++
> > > > > > .../freescale/imx8mm-icore-mx8mm-ctouch2.dts | 21 +++++
> > > > > > 3 files changed, 104 insertions(+)
> > > > > > create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-ctouch2.dtsi
> > > > >
> > > > > You split some common part to ctouch2.dtsi so it can be reused in
> > > > > multiple places. I saw so far only one usage, where are the others?
> > > >
> > > > To be clear, ctouch2.dtsi not mean for common it is C.TOUCH2 carrier
> > > > board dtsi. The other carrier is C.TOUCH2 10.1" Open Frame(display),
> > > > since DSI is not yet mainlined, I didn't add this yet.
> > >
> > > If I understand correctly: it is a DTSI which is included only by one
> > > DTS... and DTS does not have any other nodes. This as well is not the
> >
> > This is not mandatory as per my understanding, including exiting DTS
> > topologies in Mainline.
> >
> > There are several places where more than one dtsi has been included,
> > Simple example of imx8mm tree is
>
> It's not the problem of including more than one DTSI. It's the problem
> of creating fake DTS or DTSI files whose purpose is only to include
> others. Keep it simple. Don't create unnecessary files. "Entities
> should not be multiplied without necessity."
>
> >
> > arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dts
>
> Which was wrong as well. Don't create unnecessary files.
>
> >
> > /dts-v1/;
> >
> > #include "imx8mm.dtsi"
> > #include "imx8mm-beacon-som.dtsi"
> > #include "imx8mm-beacon-baseboard.dtsi"
> >
> > (SoC dtsi, SoM dtsi, Carrier board dtsi)
> >
> > > design which makes any sense. We do not create empty DTS files which
> > > only include one more DTSI. The contents of
> > > imx8mm-engicam-ctouch2.dtsi should be directly in
> > > imx8mm-icore-mx8mm-ctouch2.dts. That's the same problem as with v1 -
> > > you overcomplicate simple stuff. It really looks like you ignored the
> > > comments from v1 in multiple places.
> >
> > As explained above, the design is pretty much the same as the existing SoM's.
> >
> > imx8mm-engicam-ctouch2.dtsi is not just a dtsi file where nodes are
> > enabled. It has nodes enabled for Carrier board, so keeping nodes
> > separately will
>
> The files represent real devices or their components. So you have a
> SOM - a DTSI file. You have a carrier board - a DTS file. That's
> simple design which is mostly followed, unless something over
> complicated passes the review.
>
> > 1. More verbose for which IP's are available in the carrier board
>
> No difference when carrier DTSI is the DTS. Exactly the same.
>
> > 2. Easy to extend if someone can create another SoM with a similar Carrier.
>
> Not really, if they include carrier DTSI they need to override a lot.
> So usually (including practice - I did it) they *copy* the carrier to
> create their own design.
But what if the new board has slite change to use exiting carrier like
what ctouch2 10" OF. Can we add ctouch2 dtsi as a separate file for
this case?
>
> >
> > Ie is the whole idea to keep carrier board dtsi and includes them in dts.
> >
> > As I suggest, if you can look into px30 you can understand more easily.
>
> NAK from my side. I explained my reasoning. You created a fake, empty
> DTSI which included only other DTSI. After review, you agreed to fix
> it. However you still create a fake DTS which includes only a DTSI.
Not sure. I have updated the series according to comments by dropping
-common.dtsi ie what I was thought of "empty DTSI inclusion" you have
pointed at previous versions.
Jagan.
On Mon, 28 Dec 2020 at 09:21, Jagan Teki <[email protected]> wrote:
> > > #include "imx8mm.dtsi"
> > > #include "imx8mm-beacon-som.dtsi"
> > > #include "imx8mm-beacon-baseboard.dtsi"
> > >
> > > (SoC dtsi, SoM dtsi, Carrier board dtsi)
> > >
> > > > design which makes any sense. We do not create empty DTS files which
> > > > only include one more DTSI. The contents of
> > > > imx8mm-engicam-ctouch2.dtsi should be directly in
> > > > imx8mm-icore-mx8mm-ctouch2.dts. That's the same problem as with v1 -
> > > > you overcomplicate simple stuff. It really looks like you ignored the
> > > > comments from v1 in multiple places.
> > >
> > > As explained above, the design is pretty much the same as the existing SoM's.
> > >
> > > imx8mm-engicam-ctouch2.dtsi is not just a dtsi file where nodes are
> > > enabled. It has nodes enabled for Carrier board, so keeping nodes
> > > separately will
> >
> > The files represent real devices or their components. So you have a
> > SOM - a DTSI file. You have a carrier board - a DTS file. That's
> > simple design which is mostly followed, unless something over
> > complicated passes the review.
> >
> > > 1. More verbose for which IP's are available in the carrier board
> >
> > No difference when carrier DTSI is the DTS. Exactly the same.
> >
> > > 2. Easy to extend if someone can create another SoM with a similar Carrier.
> >
> > Not really, if they include carrier DTSI they need to override a lot.
> > So usually (including practice - I did it) they *copy* the carrier to
> > create their own design.
>
> But what if the new board has slite change to use exiting carrier like
> what ctouch2 10" OF. Can we add ctouch2 dtsi as a separate file for
> this case?
If you submit another DTS using the imx8mm-engicam-ctouch2.dtsi - with
its own differences of course (not copying other DTS...) - then having
a DTSI makes sense. In current form, still NAK for all the reasons I
explained more than once.
Best regards,
Krzysztof
On Mon, Dec 28, 2020 at 2:04 PM Krzysztof Kozlowski <[email protected]> wrote:
>
> On Mon, 28 Dec 2020 at 09:21, Jagan Teki <[email protected]> wrote:
> > > > #include "imx8mm.dtsi"
> > > > #include "imx8mm-beacon-som.dtsi"
> > > > #include "imx8mm-beacon-baseboard.dtsi"
> > > >
> > > > (SoC dtsi, SoM dtsi, Carrier board dtsi)
> > > >
> > > > > design which makes any sense. We do not create empty DTS files which
> > > > > only include one more DTSI. The contents of
> > > > > imx8mm-engicam-ctouch2.dtsi should be directly in
> > > > > imx8mm-icore-mx8mm-ctouch2.dts. That's the same problem as with v1 -
> > > > > you overcomplicate simple stuff. It really looks like you ignored the
> > > > > comments from v1 in multiple places.
> > > >
> > > > As explained above, the design is pretty much the same as the existing SoM's.
> > > >
> > > > imx8mm-engicam-ctouch2.dtsi is not just a dtsi file where nodes are
> > > > enabled. It has nodes enabled for Carrier board, so keeping nodes
> > > > separately will
> > >
> > > The files represent real devices or their components. So you have a
> > > SOM - a DTSI file. You have a carrier board - a DTS file. That's
> > > simple design which is mostly followed, unless something over
> > > complicated passes the review.
> > >
> > > > 1. More verbose for which IP's are available in the carrier board
> > >
> > > No difference when carrier DTSI is the DTS. Exactly the same.
> > >
> > > > 2. Easy to extend if someone can create another SoM with a similar Carrier.
> > >
> > > Not really, if they include carrier DTSI they need to override a lot.
> > > So usually (including practice - I did it) they *copy* the carrier to
> > > create their own design.
> >
> > But what if the new board has slite change to use exiting carrier like
> > what ctouch2 10" OF. Can we add ctouch2 dtsi as a separate file for
> > this case?
>
> If you submit another DTS using the imx8mm-engicam-ctouch2.dtsi - with
> its own differences of course (not copying other DTS...) - then having
> a DTSI makes sense. In current form, still NAK for all the reasons I
> explained more than once.
Okay, thanks for the review.
Jagan.
On Wed, 23 Dec 2020 16:33:39 +0530, Jagan Teki wrote:
> i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
>
> C.TOUCH 2.0 is a general purpose carrier board with capacitive
> touch interface support.
>
> i.Core MX8M Mini needs to mount on top of this Carrier board for
> creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
>
> Add bindings for it.
>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> Changes for v3:
> - add proper bindings
> Changes for v2:
> - updated commit message
>
> Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
Acked-by: Rob Herring <[email protected]>
On Wed, 23 Dec 2020 16:33:42 +0530, Jagan Teki wrote:
> i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
>
> EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation
> Board from Engicam.
>
> i.Core MX8M Mini needs to mount on top of this Evaluation board for
> creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
>
> Add bindings for it.
>
> Signed-off-by: Jagan Teki <[email protected]>
> ---
> Changes for v3:
> - fix dt-bindings
> Changes for v2:
> - update commit message
>
> Documentation/devicetree/bindings/arm/fsl.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
Acked-by: Rob Herring <[email protected]>