2021-02-11 18:24:49

by Jonathan Marek

[permalink] [raw]
Subject: [PATCH 2/2] arm64: dts: qcom: sm8250: fix display nodes

Apply these fixes to the newly added sm8250 display ndoes
- Use sm8250 compatibles instead of sdm845 compatibles
- Remove "notused" interconnect (which apparently was blindly copied from
my old patches)
- Use dispcc node example from dt-bindings, removing clocks which aren't
documented or used by the driver and fixing the region size.

Note: also removed the mmcx-supply for dispcc which wasn't documented when
it was added. I would have left it there but it is also breaking my
use-case (setting a lower power level than what the bootloader sets?).

Fixes: 7c1dffd471b1 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Signed-off-by: Jonathan Marek <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 34 ++++++++--------------------
1 file changed, 9 insertions(+), 25 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 947e1accae3a..20a3ff30e924 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2323,14 +2323,13 @@ usb_2_dwc3: dwc3@a800000 {
};

mdss: mdss@ae00000 {
- compatible = "qcom,sdm845-mdss";
+ compatible = "qcom,sm8250-mdss";
reg = <0 0x0ae00000 0 0x1000>;
reg-names = "mdss";

- interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_DISPLAY_CFG>,
- <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
+ interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
<&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
- interconnect-names = "notused", "mdp0-mem", "mdp1-mem";
+ interconnect-names = "mdp0-mem", "mdp1-mem";

power-domains = <&dispcc MDSS_GDSC>;

@@ -2356,7 +2355,7 @@ mdss: mdss@ae00000 {
ranges;

mdss_mdp: mdp@ae01000 {
- compatible = "qcom,sdm845-dpu";
+ compatible = "qcom,sm8250-dpu";
reg = <0 0x0ae01000 0 0x8f000>,
<0 0x0aeb0000 0 0x2008>;
reg-names = "mdp", "vbif";
@@ -2580,36 +2579,21 @@ opp-358000000 {

dispcc: clock-controller@af00000 {
compatible = "qcom,sm8250-dispcc";
- reg = <0 0x0af00000 0 0x20000>;
- mmcx-supply = <&mmcx_reg>;
+ reg = <0 0x0af00000 0 0x10000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&dsi0_phy 0>,
<&dsi0_phy 1>,
<&dsi1_phy 0>,
<&dsi1_phy 1>,
- <0>,
- <0>,
- <0>,
- <0>,
- <0>,
- <0>,
- <0>,
- <0>,
- <&sleep_clk>;
+ <&dp_phy 0>,
+ <&dp_phy 1>;
clock-names = "bi_tcxo",
"dsi0_phy_pll_out_byteclk",
"dsi0_phy_pll_out_dsiclk",
"dsi1_phy_pll_out_byteclk",
"dsi1_phy_pll_out_dsiclk",
- "dp_link_clk_divsel_ten",
- "dp_vco_divided_clk_src_mux",
- "dptx1_phy_pll_link_clk",
- "dptx1_phy_pll_vco_div_clk",
- "dptx2_phy_pll_link_clk",
- "dptx2_phy_pll_vco_div_clk",
- "edp_phy_pll_link_clk",
- "edp_phy_pll_vco_div_clk",
- "sleep_clk";
+ "dp_phy_pll_link_clk",
+ "dp_phy_pll_vco_div_clk";
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
--
2.26.1


2021-02-11 20:13:05

by Dmitry Baryshkov

[permalink] [raw]
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sm8250: fix display nodes

On Thu, 11 Feb 2021 at 21:11, Jonathan Marek <[email protected]> wrote:
>
> Apply these fixes to the newly added sm8250 display ndoes
> - Use sm8250 compatibles instead of sdm845 compatibles
> - Remove "notused" interconnect (which apparently was blindly copied from
> my old patches)
> - Use dispcc node example from dt-bindings, removing clocks which aren't
> documented or used by the driver and fixing the region size.
>
> Note: also removed the mmcx-supply for dispcc which wasn't documented when
> it was added. I would have left it there but it is also breaking my
> use-case (setting a lower power level than what the bootloader sets?).

In our use case dispcc does not work w/o mmcx-supply. Compare this
with the downstream kernel, which actively uses MMCX domain.

> Fixes: 7c1dffd471b1 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
> Signed-off-by: Jonathan Marek <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 34 ++++++++--------------------
> 1 file changed, 9 insertions(+), 25 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 947e1accae3a..20a3ff30e924 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -2323,14 +2323,13 @@ usb_2_dwc3: dwc3@a800000 {
> };
>
> mdss: mdss@ae00000 {
> - compatible = "qcom,sdm845-mdss";
> + compatible = "qcom,sm8250-mdss";
> reg = <0 0x0ae00000 0 0x1000>;
> reg-names = "mdss";
>
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_DISPLAY_CFG>,
> - <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
> + interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
> <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
> - interconnect-names = "notused", "mdp0-mem", "mdp1-mem";
> + interconnect-names = "mdp0-mem", "mdp1-mem";
>
> power-domains = <&dispcc MDSS_GDSC>;
>
> @@ -2356,7 +2355,7 @@ mdss: mdss@ae00000 {
> ranges;
>
> mdss_mdp: mdp@ae01000 {
> - compatible = "qcom,sdm845-dpu";
> + compatible = "qcom,sm8250-dpu";
> reg = <0 0x0ae01000 0 0x8f000>,
> <0 0x0aeb0000 0 0x2008>;
> reg-names = "mdp", "vbif";
> @@ -2580,36 +2579,21 @@ opp-358000000 {
>
> dispcc: clock-controller@af00000 {
> compatible = "qcom,sm8250-dispcc";
> - reg = <0 0x0af00000 0 0x20000>;
> - mmcx-supply = <&mmcx_reg>;
> + reg = <0 0x0af00000 0 0x10000>;
> clocks = <&rpmhcc RPMH_CXO_CLK>,
> <&dsi0_phy 0>,
> <&dsi0_phy 1>,
> <&dsi1_phy 0>,
> <&dsi1_phy 1>,
> - <0>,
> - <0>,
> - <0>,
> - <0>,
> - <0>,
> - <0>,
> - <0>,
> - <0>,
> - <&sleep_clk>;
> + <&dp_phy 0>,
> + <&dp_phy 1>;

There is no dp_phy on sm8250 yet.

> clock-names = "bi_tcxo",
> "dsi0_phy_pll_out_byteclk",
> "dsi0_phy_pll_out_dsiclk",
> "dsi1_phy_pll_out_byteclk",
> "dsi1_phy_pll_out_dsiclk",
> - "dp_link_clk_divsel_ten",
> - "dp_vco_divided_clk_src_mux",
> - "dptx1_phy_pll_link_clk",
> - "dptx1_phy_pll_vco_div_clk",
> - "dptx2_phy_pll_link_clk",
> - "dptx2_phy_pll_vco_div_clk",
> - "edp_phy_pll_link_clk",
> - "edp_phy_pll_vco_div_clk",
> - "sleep_clk";
> + "dp_phy_pll_link_clk",
> + "dp_phy_pll_vco_div_clk";
> #clock-cells = <1>;
> #reset-cells = <1>;
> #power-domain-cells = <1>;



--
With best wishes
Dmitry

2021-02-11 20:17:30

by kernel test robot

[permalink] [raw]
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sm8250: fix display nodes

Hi Jonathan,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on linux-next/master]
[cannot apply to robh/for-next linux/master linus/master v5.11-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Jonathan-Marek/arm64-dts-qcom-sm8250-fix-display-nodes/20210212-021729
base: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 671176b0016c80b3943cb5387312c886aba3308d
config: arm64-randconfig-r025-20210209 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project c9439ca36342fb6013187d0a69aef92736951476)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# https://github.com/0day-ci/linux/commit/5dfea33502f2797f0d94037a7987da8e8c9e2789
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Jonathan-Marek/arm64-dts-qcom-sm8250-fix-display-nodes/20210212-021729
git checkout 5dfea33502f2797f0d94037a7987da8e8c9e2789
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>

All errors (new ones prefixed by >>):

>> ERROR: Input tree has errors, aborting (use -f to force output)

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/[email protected]


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2021-02-15 17:30:13

by Jonathan Marek

[permalink] [raw]
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sm8250: fix display nodes

On 2/11/21 3:05 PM, Dmitry Baryshkov wrote:
> On Thu, 11 Feb 2021 at 21:11, Jonathan Marek <[email protected]> wrote:
>>
>> Apply these fixes to the newly added sm8250 display ndoes
>> - Use sm8250 compatibles instead of sdm845 compatibles
>> - Remove "notused" interconnect (which apparently was blindly copied from
>> my old patches)
>> - Use dispcc node example from dt-bindings, removing clocks which aren't
>> documented or used by the driver and fixing the region size.
>>
>> Note: also removed the mmcx-supply for dispcc which wasn't documented when
>> it was added. I would have left it there but it is also breaking my
>> use-case (setting a lower power level than what the bootloader sets?).
>
> In our use case dispcc does not work w/o mmcx-supply. Compare this
> with the downstream kernel, which actively uses MMCX domain.
>

I sent a v2/v3 leaving the mmcx-supply untouched (I can fix my problem
by using rpmhpd_opp_nom in the mmcx-supply instead, so its not a problem
with adding it to dispcc). But mmcx-supply still needs to be added to
documentation.

>> Fixes: 7c1dffd471b1 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
>> Signed-off-by: Jonathan Marek <[email protected]>
>> ---
>> arch/arm64/boot/dts/qcom/sm8250.dtsi | 34 ++++++++--------------------
>> 1 file changed, 9 insertions(+), 25 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> index 947e1accae3a..20a3ff30e924 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> @@ -2323,14 +2323,13 @@ usb_2_dwc3: dwc3@a800000 {
>> };
>>
>> mdss: mdss@ae00000 {
>> - compatible = "qcom,sdm845-mdss";
>> + compatible = "qcom,sm8250-mdss";
>> reg = <0 0x0ae00000 0 0x1000>;
>> reg-names = "mdss";
>>
>> - interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_DISPLAY_CFG>,
>> - <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
>> + interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
>> <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
>> - interconnect-names = "notused", "mdp0-mem", "mdp1-mem";
>> + interconnect-names = "mdp0-mem", "mdp1-mem";
>>
>> power-domains = <&dispcc MDSS_GDSC>;
>>
>> @@ -2356,7 +2355,7 @@ mdss: mdss@ae00000 {
>> ranges;
>>
>> mdss_mdp: mdp@ae01000 {
>> - compatible = "qcom,sdm845-dpu";
>> + compatible = "qcom,sm8250-dpu";
>> reg = <0 0x0ae01000 0 0x8f000>,
>> <0 0x0aeb0000 0 0x2008>;
>> reg-names = "mdp", "vbif";
>> @@ -2580,36 +2579,21 @@ opp-358000000 {
>>
>> dispcc: clock-controller@af00000 {
>> compatible = "qcom,sm8250-dispcc";
>> - reg = <0 0x0af00000 0 0x20000>;
>> - mmcx-supply = <&mmcx_reg>;
>> + reg = <0 0x0af00000 0 0x10000>;
>> clocks = <&rpmhcc RPMH_CXO_CLK>,
>> <&dsi0_phy 0>,
>> <&dsi0_phy 1>,
>> <&dsi1_phy 0>,
>> <&dsi1_phy 1>,
>> - <0>,
>> - <0>,
>> - <0>,
>> - <0>,
>> - <0>,
>> - <0>,
>> - <0>,
>> - <0>,
>> - <&sleep_clk>;
>> + <&dp_phy 0>,
>> + <&dp_phy 1>;
>
> There is no dp_phy on sm8250 yet.
>
>> clock-names = "bi_tcxo",
>> "dsi0_phy_pll_out_byteclk",
>> "dsi0_phy_pll_out_dsiclk",
>> "dsi1_phy_pll_out_byteclk",
>> "dsi1_phy_pll_out_dsiclk",
>> - "dp_link_clk_divsel_ten",
>> - "dp_vco_divided_clk_src_mux",
>> - "dptx1_phy_pll_link_clk",
>> - "dptx1_phy_pll_vco_div_clk",
>> - "dptx2_phy_pll_link_clk",
>> - "dptx2_phy_pll_vco_div_clk",
>> - "edp_phy_pll_link_clk",
>> - "edp_phy_pll_vco_div_clk",
>> - "sleep_clk";
>> + "dp_phy_pll_link_clk",
>> + "dp_phy_pll_vco_div_clk";
>> #clock-cells = <1>;
>> #reset-cells = <1>;
>> #power-domain-cells = <1>;
>
>
>