2020-03-05 17:53:16

by Dave Hansen

[permalink] [raw]
Subject: [RFC][PATCH 1/2] x86: remove duplicate TSC DEADLINE MSR definitions


There are two definitions for the TSC deadline MSR in msr-index.h,
one with an underscore and one without. Axe one of them and move
all the references over to the other one.

Cc: [email protected]
Cc: Peter Zijlstra <[email protected]>

---

b/arch/x86/include/asm/msr-index.h | 2 --
b/arch/x86/kvm/x86.c | 6 +++---
b/tools/arch/x86/include/asm/msr-index.h | 2 --
b/tools/perf/trace/beauty/tracepoints/x86_msr.sh | 2 +-
b/tools/testing/selftests/kvm/include/x86_64/processor.h | 2 --
5 files changed, 4 insertions(+), 10 deletions(-)

diff -puN arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE arch/x86/include/asm/msr-index.h
--- a/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.049901042 -0800
+++ b/arch/x86/include/asm/msr-index.h 2020-03-05 09:42:37.062901042 -0800
@@ -576,8 +576,6 @@
#define MSR_IA32_APICBASE_ENABLE (1<<11)
#define MSR_IA32_APICBASE_BASE (0xfffff<<12)

-#define MSR_IA32_TSCDEADLINE 0x000006e0
-
#define MSR_IA32_UCODE_WRITE 0x00000079
#define MSR_IA32_UCODE_REV 0x0000008b

diff -puN arch/x86/kvm/x86.c~kill-dup-MSR_IA32_TSCDEADLINE arch/x86/kvm/x86.c
--- a/arch/x86/kvm/x86.c~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.051901042 -0800
+++ b/arch/x86/kvm/x86.c 2020-03-05 09:42:37.065901042 -0800
@@ -1200,7 +1200,7 @@ static const u32 emulated_msrs_all[] = {
MSR_KVM_PV_EOI_EN,

MSR_IA32_TSC_ADJUST,
- MSR_IA32_TSCDEADLINE,
+ MSR_IA32_TSC_DEADLINE,
MSR_IA32_ARCH_CAPABILITIES,
MSR_IA32_MISC_ENABLE,
MSR_IA32_MCG_STATUS,
@@ -2688,7 +2688,7 @@ int kvm_set_msr_common(struct kvm_vcpu *
return kvm_set_apic_base(vcpu, msr_info);
case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
return kvm_x2apic_msr_write(vcpu, msr, data);
- case MSR_IA32_TSCDEADLINE:
+ case MSR_IA32_TSC_DEADLINE:
kvm_set_lapic_tscdeadline_msr(vcpu, data);
break;
case MSR_IA32_TSC_ADJUST:
@@ -3009,7 +3009,7 @@ int kvm_get_msr_common(struct kvm_vcpu *
case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
break;
- case MSR_IA32_TSCDEADLINE:
+ case MSR_IA32_TSC_DEADLINE:
msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
break;
case MSR_IA32_TSC_ADJUST:
diff -puN tools/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE tools/arch/x86/include/asm/msr-index.h
--- a/tools/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.055901042 -0800
+++ b/tools/arch/x86/include/asm/msr-index.h 2020-03-05 09:42:37.066901042 -0800
@@ -576,8 +576,6 @@
#define MSR_IA32_APICBASE_ENABLE (1<<11)
#define MSR_IA32_APICBASE_BASE (0xfffff<<12)

-#define MSR_IA32_TSCDEADLINE 0x000006e0
-
#define MSR_IA32_UCODE_WRITE 0x00000079
#define MSR_IA32_UCODE_REV 0x0000008b

diff -puN tools/perf/trace/beauty/tracepoints/x86_msr.sh~kill-dup-MSR_IA32_TSCDEADLINE tools/perf/trace/beauty/tracepoints/x86_msr.sh
--- a/tools/perf/trace/beauty/tracepoints/x86_msr.sh~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.057901042 -0800
+++ b/tools/perf/trace/beauty/tracepoints/x86_msr.sh 2020-03-05 09:42:37.066901042 -0800
@@ -15,7 +15,7 @@ x86_msr_index=${arch_x86_header_dir}/msr

printf "static const char *x86_MSRs[] = {\n"
regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0x00000[[:xdigit:]]+)[[:space:]]*.*'
-egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|AMD64|IA32_TSCDEADLINE|IDT_FCR4)' | \
+egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|AMD64|IA32_TSC_DEADLINE|IDT_FCR4)' | \
sed -r "s/$regex/\2 \1/g" | sort -n | \
xargs printf "\t[%s] = \"%s\",\n"
printf "};\n\n"
diff -puN tools/testing/selftests/kvm/include/x86_64/processor.h~kill-dup-MSR_IA32_TSCDEADLINE tools/testing/selftests/kvm/include/x86_64/processor.h
--- a/tools/testing/selftests/kvm/include/x86_64/processor.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.058901042 -0800
+++ b/tools/testing/selftests/kvm/include/x86_64/processor.h 2020-03-05 09:42:37.067901042 -0800
@@ -813,8 +813,6 @@ void kvm_get_cpu_address_width(unsigned
#define APIC_VECTOR_MASK 0x000FF
#define APIC_ICR2 0x310

-#define MSR_IA32_TSCDEADLINE 0x000006e0
-
#define MSR_IA32_UCODE_WRITE 0x00000079
#define MSR_IA32_UCODE_REV 0x0000008b

_


2020-03-09 23:51:56

by Sean Christopherson

[permalink] [raw]
Subject: Re: [RFC][PATCH 1/2] x86: remove duplicate TSC DEADLINE MSR definitions

On Thu, Mar 05, 2020 at 09:47:06AM -0800, Dave Hansen wrote:
>
> There are two definitions for the TSC deadline MSR in msr-index.h,
> one with an underscore and one without. Axe one of them and move
> all the references over to the other one.

It's worth calling out that you're keeping the one that matches Intel's
SDM.

I was going to suggest renaming KVM's functions/variables to add the
underscore, but after looking at the code it's probably best to leave
that churn for a different time.

> Cc: [email protected]
> Cc: Peter Zijlstra <[email protected]>
>
> ---
>
> b/arch/x86/include/asm/msr-index.h | 2 --
> b/arch/x86/kvm/x86.c | 6 +++---
> b/tools/arch/x86/include/asm/msr-index.h | 2 --
> b/tools/perf/trace/beauty/tracepoints/x86_msr.sh | 2 +-
> b/tools/testing/selftests/kvm/include/x86_64/processor.h | 2 --
> 5 files changed, 4 insertions(+), 10 deletions(-)
>
> diff -puN arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE arch/x86/include/asm/msr-index.h
> --- a/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.049901042 -0800
> +++ b/arch/x86/include/asm/msr-index.h 2020-03-05 09:42:37.062901042 -0800
> @@ -576,8 +576,6 @@
> #define MSR_IA32_APICBASE_ENABLE (1<<11)
> #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
>
> -#define MSR_IA32_TSCDEADLINE 0x000006e0
> -
> #define MSR_IA32_UCODE_WRITE 0x00000079
> #define MSR_IA32_UCODE_REV 0x0000008b
>
> diff -puN arch/x86/kvm/x86.c~kill-dup-MSR_IA32_TSCDEADLINE arch/x86/kvm/x86.c
> --- a/arch/x86/kvm/x86.c~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.051901042 -0800
> +++ b/arch/x86/kvm/x86.c 2020-03-05 09:42:37.065901042 -0800
> @@ -1200,7 +1200,7 @@ static const u32 emulated_msrs_all[] = {
> MSR_KVM_PV_EOI_EN,
>
> MSR_IA32_TSC_ADJUST,
> - MSR_IA32_TSCDEADLINE,
> + MSR_IA32_TSC_DEADLINE,
> MSR_IA32_ARCH_CAPABILITIES,
> MSR_IA32_MISC_ENABLE,
> MSR_IA32_MCG_STATUS,
> @@ -2688,7 +2688,7 @@ int kvm_set_msr_common(struct kvm_vcpu *
> return kvm_set_apic_base(vcpu, msr_info);
> case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
> return kvm_x2apic_msr_write(vcpu, msr, data);
> - case MSR_IA32_TSCDEADLINE:
> + case MSR_IA32_TSC_DEADLINE:
> kvm_set_lapic_tscdeadline_msr(vcpu, data);
> break;
> case MSR_IA32_TSC_ADJUST:
> @@ -3009,7 +3009,7 @@ int kvm_get_msr_common(struct kvm_vcpu *
> case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
> return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
> break;
> - case MSR_IA32_TSCDEADLINE:
> + case MSR_IA32_TSC_DEADLINE:
> msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
> break;
> case MSR_IA32_TSC_ADJUST:
> diff -puN tools/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE tools/arch/x86/include/asm/msr-index.h
> --- a/tools/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.055901042 -0800
> +++ b/tools/arch/x86/include/asm/msr-index.h 2020-03-05 09:42:37.066901042 -0800
> @@ -576,8 +576,6 @@
> #define MSR_IA32_APICBASE_ENABLE (1<<11)
> #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
>
> -#define MSR_IA32_TSCDEADLINE 0x000006e0
> -
> #define MSR_IA32_UCODE_WRITE 0x00000079
> #define MSR_IA32_UCODE_REV 0x0000008b
>
> diff -puN tools/perf/trace/beauty/tracepoints/x86_msr.sh~kill-dup-MSR_IA32_TSCDEADLINE tools/perf/trace/beauty/tracepoints/x86_msr.sh
> --- a/tools/perf/trace/beauty/tracepoints/x86_msr.sh~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.057901042 -0800
> +++ b/tools/perf/trace/beauty/tracepoints/x86_msr.sh 2020-03-05 09:42:37.066901042 -0800
> @@ -15,7 +15,7 @@ x86_msr_index=${arch_x86_header_dir}/msr
>
> printf "static const char *x86_MSRs[] = {\n"
> regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0x00000[[:xdigit:]]+)[[:space:]]*.*'
> -egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|AMD64|IA32_TSCDEADLINE|IDT_FCR4)' | \
> +egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|AMD64|IA32_TSC_DEADLINE|IDT_FCR4)' | \
> sed -r "s/$regex/\2 \1/g" | sort -n | \
> xargs printf "\t[%s] = \"%s\",\n"
> printf "};\n\n"
> diff -puN tools/testing/selftests/kvm/include/x86_64/processor.h~kill-dup-MSR_IA32_TSCDEADLINE tools/testing/selftests/kvm/include/x86_64/processor.h
> --- a/tools/testing/selftests/kvm/include/x86_64/processor.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.058901042 -0800
> +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h 2020-03-05 09:42:37.067901042 -0800
> @@ -813,8 +813,6 @@ void kvm_get_cpu_address_width(unsigned
> #define APIC_VECTOR_MASK 0x000FF
> #define APIC_ICR2 0x310
>
> -#define MSR_IA32_TSCDEADLINE 0x000006e0
> -
> #define MSR_IA32_UCODE_WRITE 0x00000079
> #define MSR_IA32_UCODE_REV 0x0000008b
>
> _

2021-02-05 09:36:13

by Borislav Petkov

[permalink] [raw]
Subject: Re: [RFC][PATCH 1/2] x86: remove duplicate TSC DEADLINE MSR definitions

On Thu, Mar 05, 2020 at 09:47:06AM -0800, Dave Hansen wrote:
>
> There are two definitions for the TSC deadline MSR in msr-index.h,
> one with an underscore and one without. Axe one of them and move
> all the references over to the other one.
>
> Cc: [email protected]
> Cc: Peter Zijlstra <[email protected]>
>
> ---
>
> b/arch/x86/include/asm/msr-index.h | 2 --
> b/arch/x86/kvm/x86.c | 6 +++---
> b/tools/arch/x86/include/asm/msr-index.h | 2 --
> b/tools/perf/trace/beauty/tracepoints/x86_msr.sh | 2 +-
> b/tools/testing/selftests/kvm/include/x86_64/processor.h | 2 --

acme, ACK to take the perf bits through tip?

Leaving in the rest.

> 5 files changed, 4 insertions(+), 10 deletions(-)
>
> diff -puN arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE arch/x86/include/asm/msr-index.h
> --- a/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.049901042 -0800
> +++ b/arch/x86/include/asm/msr-index.h 2020-03-05 09:42:37.062901042 -0800
> @@ -576,8 +576,6 @@
> #define MSR_IA32_APICBASE_ENABLE (1<<11)
> #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
>
> -#define MSR_IA32_TSCDEADLINE 0x000006e0
> -
> #define MSR_IA32_UCODE_WRITE 0x00000079
> #define MSR_IA32_UCODE_REV 0x0000008b
>
> diff -puN arch/x86/kvm/x86.c~kill-dup-MSR_IA32_TSCDEADLINE arch/x86/kvm/x86.c
> --- a/arch/x86/kvm/x86.c~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.051901042 -0800
> +++ b/arch/x86/kvm/x86.c 2020-03-05 09:42:37.065901042 -0800
> @@ -1200,7 +1200,7 @@ static const u32 emulated_msrs_all[] = {
> MSR_KVM_PV_EOI_EN,
>
> MSR_IA32_TSC_ADJUST,
> - MSR_IA32_TSCDEADLINE,
> + MSR_IA32_TSC_DEADLINE,
> MSR_IA32_ARCH_CAPABILITIES,
> MSR_IA32_MISC_ENABLE,
> MSR_IA32_MCG_STATUS,
> @@ -2688,7 +2688,7 @@ int kvm_set_msr_common(struct kvm_vcpu *
> return kvm_set_apic_base(vcpu, msr_info);
> case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
> return kvm_x2apic_msr_write(vcpu, msr, data);
> - case MSR_IA32_TSCDEADLINE:
> + case MSR_IA32_TSC_DEADLINE:
> kvm_set_lapic_tscdeadline_msr(vcpu, data);
> break;
> case MSR_IA32_TSC_ADJUST:
> @@ -3009,7 +3009,7 @@ int kvm_get_msr_common(struct kvm_vcpu *
> case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
> return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
> break;
> - case MSR_IA32_TSCDEADLINE:
> + case MSR_IA32_TSC_DEADLINE:
> msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
> break;
> case MSR_IA32_TSC_ADJUST:
> diff -puN tools/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE tools/arch/x86/include/asm/msr-index.h
> --- a/tools/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.055901042 -0800
> +++ b/tools/arch/x86/include/asm/msr-index.h 2020-03-05 09:42:37.066901042 -0800
> @@ -576,8 +576,6 @@
> #define MSR_IA32_APICBASE_ENABLE (1<<11)
> #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
>
> -#define MSR_IA32_TSCDEADLINE 0x000006e0
> -
> #define MSR_IA32_UCODE_WRITE 0x00000079
> #define MSR_IA32_UCODE_REV 0x0000008b
>
> diff -puN tools/perf/trace/beauty/tracepoints/x86_msr.sh~kill-dup-MSR_IA32_TSCDEADLINE tools/perf/trace/beauty/tracepoints/x86_msr.sh
> --- a/tools/perf/trace/beauty/tracepoints/x86_msr.sh~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.057901042 -0800
> +++ b/tools/perf/trace/beauty/tracepoints/x86_msr.sh 2020-03-05 09:42:37.066901042 -0800
> @@ -15,7 +15,7 @@ x86_msr_index=${arch_x86_header_dir}/msr
>
> printf "static const char *x86_MSRs[] = {\n"
> regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0x00000[[:xdigit:]]+)[[:space:]]*.*'
> -egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|AMD64|IA32_TSCDEADLINE|IDT_FCR4)' | \
> +egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|AMD64|IA32_TSC_DEADLINE|IDT_FCR4)' | \
> sed -r "s/$regex/\2 \1/g" | sort -n | \
> xargs printf "\t[%s] = \"%s\",\n"
> printf "};\n\n"
> diff -puN tools/testing/selftests/kvm/include/x86_64/processor.h~kill-dup-MSR_IA32_TSCDEADLINE tools/testing/selftests/kvm/include/x86_64/processor.h
> --- a/tools/testing/selftests/kvm/include/x86_64/processor.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.058901042 -0800
> +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h 2020-03-05 09:42:37.067901042 -0800
> @@ -813,8 +813,6 @@ void kvm_get_cpu_address_width(unsigned
> #define APIC_VECTOR_MASK 0x000FF
> #define APIC_ICR2 0x310
>
> -#define MSR_IA32_TSCDEADLINE 0x000006e0
> -
> #define MSR_IA32_UCODE_WRITE 0x00000079
> #define MSR_IA32_UCODE_REV 0x0000008b
>
> _

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette

2021-02-12 21:39:17

by Arnaldo Carvalho de Melo

[permalink] [raw]
Subject: Re: [RFC][PATCH 1/2] x86: remove duplicate TSC DEADLINE MSR definitions

Em Fri, Feb 05, 2021 at 10:31:05AM +0100, Borislav Petkov escreveu:
> On Thu, Mar 05, 2020 at 09:47:06AM -0800, Dave Hansen wrote:
> >
> > There are two definitions for the TSC deadline MSR in msr-index.h,
> > one with an underscore and one without. Axe one of them and move
> > all the references over to the other one.
> >
> > Cc: [email protected]
> > Cc: Peter Zijlstra <[email protected]>
> >
> > ---
> >
> > b/arch/x86/include/asm/msr-index.h | 2 --
> > b/arch/x86/kvm/x86.c | 6 +++---
> > b/tools/arch/x86/include/asm/msr-index.h | 2 --
> > b/tools/perf/trace/beauty/tracepoints/x86_msr.sh | 2 +-
> > b/tools/testing/selftests/kvm/include/x86_64/processor.h | 2 --
>
> acme, ACK to take the perf bits through tip?

Sure

> Leaving in the rest.
>
> > 5 files changed, 4 insertions(+), 10 deletions(-)
> >
> > diff -puN arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE arch/x86/include/asm/msr-index.h
> > --- a/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.049901042 -0800
> > +++ b/arch/x86/include/asm/msr-index.h 2020-03-05 09:42:37.062901042 -0800
> > @@ -576,8 +576,6 @@
> > #define MSR_IA32_APICBASE_ENABLE (1<<11)
> > #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
> >
> > -#define MSR_IA32_TSCDEADLINE 0x000006e0
> > -
> > #define MSR_IA32_UCODE_WRITE 0x00000079
> > #define MSR_IA32_UCODE_REV 0x0000008b
> >
> > diff -puN arch/x86/kvm/x86.c~kill-dup-MSR_IA32_TSCDEADLINE arch/x86/kvm/x86.c
> > --- a/arch/x86/kvm/x86.c~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.051901042 -0800
> > +++ b/arch/x86/kvm/x86.c 2020-03-05 09:42:37.065901042 -0800
> > @@ -1200,7 +1200,7 @@ static const u32 emulated_msrs_all[] = {
> > MSR_KVM_PV_EOI_EN,
> >
> > MSR_IA32_TSC_ADJUST,
> > - MSR_IA32_TSCDEADLINE,
> > + MSR_IA32_TSC_DEADLINE,
> > MSR_IA32_ARCH_CAPABILITIES,
> > MSR_IA32_MISC_ENABLE,
> > MSR_IA32_MCG_STATUS,
> > @@ -2688,7 +2688,7 @@ int kvm_set_msr_common(struct kvm_vcpu *
> > return kvm_set_apic_base(vcpu, msr_info);
> > case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
> > return kvm_x2apic_msr_write(vcpu, msr, data);
> > - case MSR_IA32_TSCDEADLINE:
> > + case MSR_IA32_TSC_DEADLINE:
> > kvm_set_lapic_tscdeadline_msr(vcpu, data);
> > break;
> > case MSR_IA32_TSC_ADJUST:
> > @@ -3009,7 +3009,7 @@ int kvm_get_msr_common(struct kvm_vcpu *
> > case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
> > return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
> > break;
> > - case MSR_IA32_TSCDEADLINE:
> > + case MSR_IA32_TSC_DEADLINE:
> > msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
> > break;
> > case MSR_IA32_TSC_ADJUST:
> > diff -puN tools/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE tools/arch/x86/include/asm/msr-index.h
> > --- a/tools/arch/x86/include/asm/msr-index.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.055901042 -0800
> > +++ b/tools/arch/x86/include/asm/msr-index.h 2020-03-05 09:42:37.066901042 -0800
> > @@ -576,8 +576,6 @@
> > #define MSR_IA32_APICBASE_ENABLE (1<<11)
> > #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
> >
> > -#define MSR_IA32_TSCDEADLINE 0x000006e0
> > -
> > #define MSR_IA32_UCODE_WRITE 0x00000079
> > #define MSR_IA32_UCODE_REV 0x0000008b
> >
> > diff -puN tools/perf/trace/beauty/tracepoints/x86_msr.sh~kill-dup-MSR_IA32_TSCDEADLINE tools/perf/trace/beauty/tracepoints/x86_msr.sh
> > --- a/tools/perf/trace/beauty/tracepoints/x86_msr.sh~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.057901042 -0800
> > +++ b/tools/perf/trace/beauty/tracepoints/x86_msr.sh 2020-03-05 09:42:37.066901042 -0800
> > @@ -15,7 +15,7 @@ x86_msr_index=${arch_x86_header_dir}/msr
> >
> > printf "static const char *x86_MSRs[] = {\n"
> > regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0x00000[[:xdigit:]]+)[[:space:]]*.*'
> > -egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|AMD64|IA32_TSCDEADLINE|IDT_FCR4)' | \
> > +egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|AMD64|IA32_TSC_DEADLINE|IDT_FCR4)' | \
> > sed -r "s/$regex/\2 \1/g" | sort -n | \
> > xargs printf "\t[%s] = \"%s\",\n"
> > printf "};\n\n"
> > diff -puN tools/testing/selftests/kvm/include/x86_64/processor.h~kill-dup-MSR_IA32_TSCDEADLINE tools/testing/selftests/kvm/include/x86_64/processor.h
> > --- a/tools/testing/selftests/kvm/include/x86_64/processor.h~kill-dup-MSR_IA32_TSCDEADLINE 2020-03-05 09:42:37.058901042 -0800
> > +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h 2020-03-05 09:42:37.067901042 -0800
> > @@ -813,8 +813,6 @@ void kvm_get_cpu_address_width(unsigned
> > #define APIC_VECTOR_MASK 0x000FF
> > #define APIC_ICR2 0x310
> >
> > -#define MSR_IA32_TSCDEADLINE 0x000006e0
> > -
> > #define MSR_IA32_UCODE_WRITE 0x00000079
> > #define MSR_IA32_UCODE_REV 0x0000008b
> >
> > _
>
> --
> Regards/Gruss,
> Boris.
>
> https://people.kernel.org/tglx/notes-about-netiquette

--

- Arnaldo

2021-03-07 01:38:18

by Dave Hansen

[permalink] [raw]
Subject: Re: [RFC][PATCH 1/2] x86: remove duplicate TSC DEADLINE MSR definitions

On 3/5/20 9:47 AM, Dave Hansen wrote:
> There are two definitions for the TSC deadline MSR in msr-index.h,
> one with an underscore and one without. Axe one of them and move
> all the references over to the other one.
>
> Cc: [email protected]
> Cc: Peter Zijlstra <[email protected]>

Better late than never:

Signed-off-by: Dave Hansen <[email protected]>

2021-03-08 11:49:41

by tip-bot2 for Haifeng Xu

[permalink] [raw]
Subject: [tip: x86/cleanups] x86: Remove duplicate TSC DEADLINE MSR definitions

The following commit has been merged into the x86/cleanups branch of tip:

Commit-ID: 09141ec0e4efede4fb5e2aa68cb819fba974325c
Gitweb: https://git.kernel.org/tip/09141ec0e4efede4fb5e2aa68cb819fba974325c
Author: Dave Hansen <[email protected]>
AuthorDate: Thu, 05 Mar 2020 09:47:06 -08:00
Committer: Borislav Petkov <[email protected]>
CommitterDate: Mon, 08 Mar 2021 11:05:20 +01:00

x86: Remove duplicate TSC DEADLINE MSR definitions

There are two definitions for the TSC deadline MSR in msr-index.h,
one with an underscore and one without. Axe one of them and move
all the references over to the other one.

[ bp: Fixup the MSR define in handle_fastpath_set_msr_irqoff() too. ]

Signed-off-by: Dave Hansen <[email protected]>
Signed-off-by: Borislav Petkov <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
---
arch/x86/include/asm/msr-index.h | 2 --
arch/x86/kvm/x86.c | 8 ++++----
tools/arch/x86/include/asm/msr-index.h | 2 --
tools/perf/trace/beauty/tracepoints/x86_msr.sh | 2 +-
4 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 546d6ec..4502935 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -628,8 +628,6 @@
#define MSR_IA32_APICBASE_ENABLE (1<<11)
#define MSR_IA32_APICBASE_BASE (0xfffff<<12)

-#define MSR_IA32_TSCDEADLINE 0x000006e0
-
#define MSR_IA32_UCODE_WRITE 0x00000079
#define MSR_IA32_UCODE_REV 0x0000008b

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 2a20ce6..c020499 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1288,7 +1288,7 @@ static const u32 emulated_msrs_all[] = {
MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,

MSR_IA32_TSC_ADJUST,
- MSR_IA32_TSCDEADLINE,
+ MSR_IA32_TSC_DEADLINE,
MSR_IA32_ARCH_CAPABILITIES,
MSR_IA32_PERF_CAPABILITIES,
MSR_IA32_MISC_ENABLE,
@@ -1841,7 +1841,7 @@ fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
ret = EXIT_FASTPATH_EXIT_HANDLED;
}
break;
- case MSR_IA32_TSCDEADLINE:
+ case MSR_IA32_TSC_DEADLINE:
data = kvm_read_edx_eax(vcpu);
if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
kvm_skip_emulated_instruction(vcpu);
@@ -3075,7 +3075,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
return kvm_set_apic_base(vcpu, msr_info);
case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
return kvm_x2apic_msr_write(vcpu, msr, data);
- case MSR_IA32_TSCDEADLINE:
+ case MSR_IA32_TSC_DEADLINE:
kvm_set_lapic_tscdeadline_msr(vcpu, data);
break;
case MSR_IA32_TSC_ADJUST:
@@ -3437,7 +3437,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
break;
case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
- case MSR_IA32_TSCDEADLINE:
+ case MSR_IA32_TSC_DEADLINE:
msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
break;
case MSR_IA32_TSC_ADJUST:
diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
index 546d6ec..4502935 100644
--- a/tools/arch/x86/include/asm/msr-index.h
+++ b/tools/arch/x86/include/asm/msr-index.h
@@ -628,8 +628,6 @@
#define MSR_IA32_APICBASE_ENABLE (1<<11)
#define MSR_IA32_APICBASE_BASE (0xfffff<<12)

-#define MSR_IA32_TSCDEADLINE 0x000006e0
-
#define MSR_IA32_UCODE_WRITE 0x00000079
#define MSR_IA32_UCODE_REV 0x0000008b

diff --git a/tools/perf/trace/beauty/tracepoints/x86_msr.sh b/tools/perf/trace/beauty/tracepoints/x86_msr.sh
index 27ee1ea..9b0614a 100755
--- a/tools/perf/trace/beauty/tracepoints/x86_msr.sh
+++ b/tools/perf/trace/beauty/tracepoints/x86_msr.sh
@@ -15,7 +15,7 @@ x86_msr_index=${arch_x86_header_dir}/msr-index.h

printf "static const char *x86_MSRs[] = {\n"
regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0x00000[[:xdigit:]]+)[[:space:]]*.*'
-egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|IA32_(TSCDEADLINE|UCODE_REV)|IDT_FCR4)' | \
+egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|IA32_(TSC_DEADLINE|UCODE_REV)|IDT_FCR4)' | \
sed -r "s/$regex/\2 \1/g" | sort -n | \
xargs printf "\t[%s] = \"%s\",\n"
printf "};\n\n"