2021-03-26 19:33:46

by Max Filippov

[permalink] [raw]
Subject: [PATCH 0/2] xtensa: add GDBIO implementation to semihosting interface

Hello,

this series adds GDBIO implementation to the semihosting interface and
makes it a configuration time choice. GDBIO interface is useful for
development hardware platforms that don't offer any peripherals and only
accessible via JTAG. xtensa kernel built for ISS may be run on such
platforms using GDBIO implementation of the semihosting interface.

Max Filippov (2):
xtensa: ISS: split simcall implementation from semihosting interface
xtensa: ISS: add GDBIO implementation to semihosting interface

arch/xtensa/Kconfig | 22 ++++
.../iss/include/platform/simcall-gdbio.h | 34 ++++++
.../iss/include/platform/simcall-iss.h | 73 ++++++++++++
.../platforms/iss/include/platform/simcall.h | 104 +++++++-----------
4 files changed, 166 insertions(+), 67 deletions(-)
create mode 100644 arch/xtensa/platforms/iss/include/platform/simcall-gdbio.h
create mode 100644 arch/xtensa/platforms/iss/include/platform/simcall-iss.h

--
2.20.1


2021-03-26 19:33:48

by Max Filippov

[permalink] [raw]
Subject: [PATCH 1/2] xtensa: ISS: split simcall implementation from semihosting interface

Disconnect existing ISS simcall implementation from the semihosting
interface to allow for alternative implementations selectable at
configure time.

Signed-off-by: Max Filippov <[email protected]>
---
.../iss/include/platform/simcall-iss.h | 73 +++++++++++++++++++
.../platforms/iss/include/platform/simcall.h | 70 +-----------------
2 files changed, 75 insertions(+), 68 deletions(-)
create mode 100644 arch/xtensa/platforms/iss/include/platform/simcall-iss.h

diff --git a/arch/xtensa/platforms/iss/include/platform/simcall-iss.h b/arch/xtensa/platforms/iss/include/platform/simcall-iss.h
new file mode 100644
index 000000000000..5a1e7a1f182e
--- /dev/null
+++ b/arch/xtensa/platforms/iss/include/platform/simcall-iss.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (C) 2021 Cadence Design Systems Inc. */
+
+#ifndef _XTENSA_PLATFORM_ISS_SIMCALL_ISS_H
+#define _XTENSA_PLATFORM_ISS_SIMCALL_ISS_H
+
+/*
+ * System call like services offered by the simulator host.
+ */
+
+#define SYS_nop 0 /* unused */
+#define SYS_exit 1 /*x*/
+#define SYS_fork 2
+#define SYS_read 3 /*x*/
+#define SYS_write 4 /*x*/
+#define SYS_open 5 /*x*/
+#define SYS_close 6 /*x*/
+#define SYS_rename 7 /*x 38 - waitpid */
+#define SYS_creat 8 /*x*/
+#define SYS_link 9 /*x (not implemented on WIN32) */
+#define SYS_unlink 10 /*x*/
+#define SYS_execv 11 /* n/a - execve */
+#define SYS_execve 12 /* 11 - chdir */
+#define SYS_pipe 13 /* 42 - time */
+#define SYS_stat 14 /* 106 - mknod */
+#define SYS_chmod 15
+#define SYS_chown 16 /* 202 - lchown */
+#define SYS_utime 17 /* 30 - break */
+#define SYS_wait 18 /* n/a - oldstat */
+#define SYS_lseek 19 /*x*/
+#define SYS_getpid 20
+#define SYS_isatty 21 /* n/a - mount */
+#define SYS_fstat 22 /* 108 - oldumount */
+#define SYS_time 23 /* 13 - setuid */
+#define SYS_gettimeofday 24 /*x 78 - getuid (not implemented on WIN32) */
+#define SYS_times 25 /*X 43 - stime (Xtensa-specific implementation) */
+#define SYS_socket 26
+#define SYS_sendto 27
+#define SYS_recvfrom 28
+#define SYS_select_one 29 /* not compatible select, one file descriptor at the time */
+#define SYS_bind 30
+#define SYS_ioctl 31
+
+#define SYS_iss_argc 1000 /* returns value of argc */
+#define SYS_iss_argv_size 1001 /* bytes needed for argv & arg strings */
+#define SYS_iss_set_argv 1002 /* saves argv & arg strings at given addr */
+
+/*
+ * SYS_select_one specifiers
+ */
+
+#define XTISS_SELECT_ONE_READ 1
+#define XTISS_SELECT_ONE_WRITE 2
+#define XTISS_SELECT_ONE_EXCEPT 3
+
+static int errno;
+
+static inline int __simc(int a, int b, int c, int d)
+{
+ register int a1 asm("a2") = a;
+ register int b1 asm("a3") = b;
+ register int c1 asm("a4") = c;
+ register int d1 asm("a5") = d;
+ __asm__ __volatile__ (
+ "simcall\n"
+ : "+r"(a1), "+r"(b1)
+ : "r"(c1), "r"(d1)
+ : "memory");
+ errno = b1;
+ return a1;
+}
+
+#endif /* _XTENSA_PLATFORM_ISS_SIMCALL_ISS_H */
diff --git a/arch/xtensa/platforms/iss/include/platform/simcall.h b/arch/xtensa/platforms/iss/include/platform/simcall.h
index 5ba2454e6c37..612080bf0b3d 100644
--- a/arch/xtensa/platforms/iss/include/platform/simcall.h
+++ b/arch/xtensa/platforms/iss/include/platform/simcall.h
@@ -6,78 +6,13 @@
* for more details.
*
* Copyright (C) 2001 Tensilica Inc.
- * Copyright (C) 2017 Cadence Design Systems Inc.
+ * Copyright (C) 2017 - 2021 Cadence Design Systems Inc.
*/

#ifndef _XTENSA_PLATFORM_ISS_SIMCALL_H
#define _XTENSA_PLATFORM_ISS_SIMCALL_H

-
-/*
- * System call like services offered by the simulator host.
- */
-
-#define SYS_nop 0 /* unused */
-#define SYS_exit 1 /*x*/
-#define SYS_fork 2
-#define SYS_read 3 /*x*/
-#define SYS_write 4 /*x*/
-#define SYS_open 5 /*x*/
-#define SYS_close 6 /*x*/
-#define SYS_rename 7 /*x 38 - waitpid */
-#define SYS_creat 8 /*x*/
-#define SYS_link 9 /*x (not implemented on WIN32) */
-#define SYS_unlink 10 /*x*/
-#define SYS_execv 11 /* n/a - execve */
-#define SYS_execve 12 /* 11 - chdir */
-#define SYS_pipe 13 /* 42 - time */
-#define SYS_stat 14 /* 106 - mknod */
-#define SYS_chmod 15
-#define SYS_chown 16 /* 202 - lchown */
-#define SYS_utime 17 /* 30 - break */
-#define SYS_wait 18 /* n/a - oldstat */
-#define SYS_lseek 19 /*x*/
-#define SYS_getpid 20
-#define SYS_isatty 21 /* n/a - mount */
-#define SYS_fstat 22 /* 108 - oldumount */
-#define SYS_time 23 /* 13 - setuid */
-#define SYS_gettimeofday 24 /*x 78 - getuid (not implemented on WIN32) */
-#define SYS_times 25 /*X 43 - stime (Xtensa-specific implementation) */
-#define SYS_socket 26
-#define SYS_sendto 27
-#define SYS_recvfrom 28
-#define SYS_select_one 29 /* not compatible select, one file descriptor at the time */
-#define SYS_bind 30
-#define SYS_ioctl 31
-
-#define SYS_iss_argc 1000 /* returns value of argc */
-#define SYS_iss_argv_size 1001 /* bytes needed for argv & arg strings */
-#define SYS_iss_set_argv 1002 /* saves argv & arg strings at given addr */
-
-/*
- * SYS_select_one specifiers
- */
-
-#define XTISS_SELECT_ONE_READ 1
-#define XTISS_SELECT_ONE_WRITE 2
-#define XTISS_SELECT_ONE_EXCEPT 3
-
-static int errno;
-
-static inline int __simc(int a, int b, int c, int d)
-{
- register int a1 asm("a2") = a;
- register int b1 asm("a3") = b;
- register int c1 asm("a4") = c;
- register int d1 asm("a5") = d;
- __asm__ __volatile__ (
- "simcall\n"
- : "+r"(a1), "+r"(b1)
- : "r"(c1), "r"(d1)
- : "memory");
- errno = b1;
- return a1;
-}
+#include <platform/simcall-iss.h>

static inline int simc_exit(int exit_code)
{
@@ -137,4 +72,3 @@ static inline void simc_argv(void *buf)
}

#endif /* _XTENSA_PLATFORM_ISS_SIMCALL_H */
-
--
2.20.1

2021-03-26 19:35:09

by Max Filippov

[permalink] [raw]
Subject: [PATCH 2/2] xtensa: ISS: add GDBIO implementation to semihosting interface

Add GDBIO implementation for the xtensa semihosting interface. It offers
less functions than the simcall interface, so make some semihosting
functions optional and return error when implementation is not
available.
Add Kconfig menu to select semihosting implementation and add simcall and
GDBIO choices there.

Signed-off-by: Max Filippov <[email protected]>
---
arch/xtensa/Kconfig | 22 ++++++++++++
.../iss/include/platform/simcall-gdbio.h | 34 ++++++++++++++++++
.../platforms/iss/include/platform/simcall.h | 36 +++++++++++++++++++
3 files changed, 92 insertions(+)
create mode 100644 arch/xtensa/platforms/iss/include/platform/simcall-gdbio.h

diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index d637b396f81c..6ad4c1161518 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -393,6 +393,28 @@ config PARSE_BOOTPARAM

If unsure, say Y.

+choice
+ prompt "Semihosting interface"
+ default XTENSA_SIMCALL_ISS
+ depends on XTENSA_PLATFORM_ISS
+ help
+ Choose semihosting interface that will be used for serial port,
+ block device and networking.
+
+config XTENSA_SIMCALL_ISS
+ bool "simcall"
+ help
+ Use simcall instruction. simcall is only available on simulators,
+ it does nothing on hardware.
+
+config XTENSA_SIMCALL_GDBIO
+ bool "GDBIO"
+ help
+ Use break instruction. It is available on real hardware when GDB
+ is attached to it via JTAG.
+
+endchoice
+
config BLK_DEV_SIMDISK
tristate "Host file-based simulated block device support"
default n
diff --git a/arch/xtensa/platforms/iss/include/platform/simcall-gdbio.h b/arch/xtensa/platforms/iss/include/platform/simcall-gdbio.h
new file mode 100644
index 000000000000..e642860e25a8
--- /dev/null
+++ b/arch/xtensa/platforms/iss/include/platform/simcall-gdbio.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (C) 2021 Cadence Design Systems Inc. */
+
+#ifndef _XTENSA_PLATFORM_ISS_SIMCALL_GDBIO_H
+#define _XTENSA_PLATFORM_ISS_SIMCALL_GDBIO_H
+
+/*
+ * System call like services offered by the GDBIO host.
+ */
+
+#define SYS_open -2
+#define SYS_close -3
+#define SYS_read -4
+#define SYS_write -5
+#define SYS_lseek -6
+
+static int errno;
+
+static inline int __simc(int a, int b, int c, int d)
+{
+ register int a1 asm("a2") = a;
+ register int b1 asm("a6") = b;
+ register int c1 asm("a3") = c;
+ register int d1 asm("a4") = d;
+ __asm__ __volatile__ (
+ "break 1, 14\n"
+ : "+r"(a1), "+r"(c1)
+ : "r"(b1), "r"(d1)
+ : "memory");
+ errno = c1;
+ return a1;
+}
+
+#endif /* _XTENSA_PLATFORM_ISS_SIMCALL_GDBIO_H */
diff --git a/arch/xtensa/platforms/iss/include/platform/simcall.h b/arch/xtensa/platforms/iss/include/platform/simcall.h
index 612080bf0b3d..e1ec50ce39ee 100644
--- a/arch/xtensa/platforms/iss/include/platform/simcall.h
+++ b/arch/xtensa/platforms/iss/include/platform/simcall.h
@@ -12,11 +12,23 @@
#ifndef _XTENSA_PLATFORM_ISS_SIMCALL_H
#define _XTENSA_PLATFORM_ISS_SIMCALL_H

+#include <linux/bug.h>
+
+#ifdef CONFIG_XTENSA_SIMCALL_ISS
#include <platform/simcall-iss.h>
+#endif
+#ifdef CONFIG_XTENSA_SIMCALL_GDBIO
+#include <platform/simcall-gdbio.h>
+#endif

static inline int simc_exit(int exit_code)
{
+#ifdef SYS_exit
return __simc(SYS_exit, exit_code, 0, 0);
+#else
+ WARN_ONCE(1, "%s: not implemented\n", __func__);
+ return -1;
+#endif
}

static inline int simc_open(const char *file, int flags, int mode)
@@ -31,7 +43,12 @@ static inline int simc_close(int fd)

static inline int simc_ioctl(int fd, int request, void *arg)
{
+#ifdef SYS_ioctl
return __simc(SYS_ioctl, fd, request, (int) arg);
+#else
+ WARN_ONCE(1, "%s: not implemented\n", __func__);
+ return -1;
+#endif
}

static inline int simc_read(int fd, void *buf, size_t count)
@@ -46,9 +63,14 @@ static inline int simc_write(int fd, const void *buf, size_t count)

static inline int simc_poll(int fd)
{
+#ifdef SYS_select_one
long timeval[2] = { 0, 0 };

return __simc(SYS_select_one, fd, XTISS_SELECT_ONE_READ, (int)&timeval);
+#else
+ WARN_ONCE(1, "%s: not implemented\n", __func__);
+ return -1;
+#endif
}

static inline int simc_lseek(int fd, uint32_t off, int whence)
@@ -58,17 +80,31 @@ static inline int simc_lseek(int fd, uint32_t off, int whence)

static inline int simc_argc(void)
{
+#ifdef SYS_iss_argc
return __simc(SYS_iss_argc, 0, 0, 0);
+#else
+ WARN_ONCE(1, "%s: not implemented\n", __func__);
+ return 0;
+#endif
}

static inline int simc_argv_size(void)
{
+#ifdef SYS_iss_argv_size
return __simc(SYS_iss_argv_size, 0, 0, 0);
+#else
+ WARN_ONCE(1, "%s: not implemented\n", __func__);
+ return 0;
+#endif
}

static inline void simc_argv(void *buf)
{
+#ifdef SYS_iss_set_argv
__simc(SYS_iss_set_argv, (int)buf, 0, 0);
+#else
+ WARN_ONCE(1, "%s: not implemented\n", __func__);
+#endif
}

#endif /* _XTENSA_PLATFORM_ISS_SIMCALL_H */
--
2.20.1