While implementing support for this USB controller in U-Boot, I noticed
that the reset line alsp affects they PHY. It looks like most platforms
use a separate glue node to represent this, and in fact there is already
a compatible for the H6 listed in drivers/usb/dwc3/dwc3-of-simple.c.
Since this layout matches the usual way of modeling this hardware, it
allows using the existing drivers without adding platform-specific code.
I tried to follow the existing DWC3 glue bindings (most of which are
still .txt). With this version, `make dt_binding_check` still raises a
couple of issues, which I do not know how best to fix:
- Warning (unit_address_vs_reg): /example-0/usb@5200000: node has a
unit name, but no reg or ranges property
=> Since there is no MMIO translation, an empty `ranges;` seemed
appropriate, but it causes this warning.
- usb@5200000: usb@5200000:phy-names:0: 'usb2-phy' was expected
=> This may be an issue with the snps,dwc3 binding, where the
`items` list overrides `minItems`. I believe the intention is
that both PHY references are optional. This implementation has
only one PHY.
Changes from v1 to v2:
- Updated the binding to reference the PHY binding by path correctly
- Dropped DT updates for Pine H64
Samuel Holland (2):
dt-bindings: usb: Document the Allwinner H6 DWC3 glue
arm64: dts: allwinner: h6: Wrap DWC3 and PHY in glue layer
.../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++
.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 6 +-
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 6 +-
.../dts/allwinner/sun50i-h6-tanix-tx6.dts | 6 +-
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 ++++++++-------
5 files changed, 111 insertions(+), 42 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
--
2.26.3
The USB3 IP in the H6 is organized such that the reset line affects both
the DWC3 core and the PHY. To model that, following the example of
several other platforms, wrap those nodes in a glue layer node.
The inner nodes no longer need to be disabled, since the glue layer is
disabled by default to keep it in reset.
Signed-off-by: Samuel Holland <[email protected]>
---
.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 6 +-
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 6 +-
.../dts/allwinner/sun50i-h6-tanix-tx6.dts | 6 +-
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 ++++++++++---------
4 files changed, 36 insertions(+), 42 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index b5808047d6e4..5f6292db808c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
@@ -86,10 +86,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -309,6 +305,6 @@ &usb2phy {
status = "okay";
};
-&usb3phy {
+&usb3 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 7e83f6146f8a..ae3c24584f65 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -101,10 +101,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -340,6 +336,6 @@ &usb2phy {
status = "okay";
};
-&usb3phy {
+&usb3 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
index be81330db14f..8cb06df231ab 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
@@ -55,10 +55,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -119,6 +115,6 @@ &usb2phy {
status = "okay";
};
-&usb3phy {
+&usb3 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index af8b7d0ef750..b4ce5eff2822 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -700,36 +700,42 @@ ohci0: usb@5101400 {
status = "disabled";
};
- dwc3: usb@5200000 {
- compatible = "snps,dwc3";
- reg = <0x05200000 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_XHCI>,
- <&ccu CLK_BUS_XHCI>,
- <&rtc 0>;
- clock-names = "ref", "bus_early", "suspend";
+ usb3: usb@5200000 {
+ compatible = "allwinner,sun50i-h6-dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
resets = <&ccu RST_BUS_XHCI>;
- /*
- * The datasheet of the chip doesn't declare the
- * peripheral function, and there's no boards known
- * to have a USB Type-B port routed to the port.
- * In addition, no one has tested the peripheral
- * function yet.
- * So set the dr_mode to "host" in the DTSI file.
- */
- dr_mode = "host";
- phys = <&usb3phy>;
- phy-names = "usb3-phy";
status = "disabled";
- };
- usb3phy: phy@5210000 {
- compatible = "allwinner,sun50i-h6-usb3-phy";
- reg = <0x5210000 0x10000>;
- clocks = <&ccu CLK_USB_PHY1>;
- resets = <&ccu RST_USB_PHY1>;
- #phy-cells = <0>;
- status = "disabled";
+ dwc3: usb@5200000 {
+ compatible = "snps,dwc3";
+ reg = <0x05200000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_XHCI>,
+ <&ccu CLK_BUS_XHCI>,
+ <&rtc 0>;
+ clock-names = "ref", "bus_early", "suspend";
+ /*
+ * The datasheet of the chip doesn't declare the
+ * peripheral function, and there's no boards known
+ * to have a USB Type-B port routed to the port.
+ * In addition, no one has tested the peripheral
+ * function yet.
+ * So set the dr_mode to "host" in the DTSI file.
+ */
+ dr_mode = "host";
+ phys = <&usb3phy>;
+ phy-names = "usb3-phy";
+ };
+
+ usb3phy: phy@5210000 {
+ compatible = "allwinner,sun50i-h6-usb3-phy";
+ reg = <0x5210000 0x10000>;
+ clocks = <&ccu CLK_USB_PHY1>;
+ resets = <&ccu RST_USB_PHY1>;
+ #phy-cells = <0>;
+ };
};
ehci3: usb@5311000 {
--
2.26.3